Fabrication of 3D Air-core MEMS Inductors for High Frequency Power Electronic Applications

Transcription

1 Downloded from orit.dtu.dk on: Nov 24, 218 Friction of 3D Air-core MEMS Inductors for High Frequency Power Electronic Applictions Lê Thnh, Hoà; Mizushim, Io; Nour, Ysser; Tng, Peter Toren; Knott, Arnold; Ouyng, Ziwei; Jensen, Flemming; Hn, Anpn Pulished in: Link to rticle, DOI:.38/micronno Puliction dte: 218 Document Version Pulisher's PDF, lso known s Version of record Link ck to DTU Orit Cittion (APA): Lê Thnh, H., Mizushim, I., Nour, Y., Tng, P. T., Knott, A., Ouyng, Z.,... Hn, A. (218). Friction of 3D Air-core MEMS Inductors for High Frequency Power Electronic Applictions., 3, [1782]. DOI:.38/micronno enerl rights Copyright nd morl rights for the pulictions mde ccessile in the pulic portl re retined y the uthors nd/or other copyright owners nd it is condition of ccessing pulictions tht users recognise nd ide y the legl requirements ssocited with these rights. Users my downlod nd print one copy of ny puliction from the pulic portl for the purpose of privte study or reserch. You my not further distriute the mteril or use it for ny profit-mking ctivity or commercil gin You my freely distriute the URL identifying the puliction in the pulic portl If you elieve tht this document reches copyright plese contct us providing detils, nd we will remove ccess to the work immeditely nd investigte your clim.

2 OPEN (217) 3, 1782; doi:.38/micronno ARTICLE Friction of 3D ir-core MEMS inductors for very-highfrequency power conversions Ho Thnh Le 1,2, Io Mizushim 3, Ysser Nour 2, Peter Toren Tng 3, Arnold Knott 2, Ziwei Ouyng 2, Flemming Jensen 1 nd Anpn Hn 1 We report friction technology for 3D ir-core inductors for smll footprint nd very-high-frequency power conversions. Our process is sclle nd highly generic for fricting inductors with wide rnge of geometries nd core shpes. We demonstrte spirl, solenoid, nd toroidl inductors, toroidl trnsformer nd inductor with dvnced geometries tht cnnot e produced y wire winding technology. The inductors re emedded in silicon sustrte nd consist of through-silicon vis nd suspended windings. The inductors fricted with 2 nd 25 turns nd μm heights on 4-16 mm 2 footprints hve n inductnce from 34.2 to 44.6 nh nd qulity fctor from to 13 t frequencies rnging from 3 to 72 MHz. The ir-core inductors show threefold lower prsitic cpcitnce nd up to 14% higher-qulity fctor nd 23% higher-opertion frequency thn silicon-core inductors. A 33 MHz oost converter mounted with n ir-core toroidl inductor chieves n efficiency of 68.2%, which is etter thn converters mounted with Si-core inductor (64.1%). Our inductors show good therml cycling stility, nd they re mechniclly stle fter virtion nd 2-m-drop tests. Keywords: MEMS inductor; PwrSoC; TSVs; very high frequency; 3D (217) 3, 1782; doi:.38/micronno ; Pulished online: 29 Jnury 218 INTRODUCTION Inductors nd trnsformers re the fundmentl uilding locks of electronics, nd they re found in every electronic device. Microinductors nd trnsformers (now referred to s inductors) re used in, for exmple, rdio frequency microelectromechnicl systems (RF MEMS) 1 4, microctutors 5,6, nd iosensors 7. Micro-inductors for power electronics is n emerging ppliction in which inductors re used s energy storge elements for switched mode power supplies (SMPS). Minituriztion of SMPS hs ecome the min focus for developing future genertion power supplies, tht is, power supply in pckge (PwrSiP) nd power supply on chip (PwrSoC) 8. The PwrSoC vision is to integrte ll power electronics components on one chip. Higher integrtion lowers the cost nd increses oth efficiency nd power density. Therefore, one of the most importnt inductor requirements for PwrSoC technology is the CMOS comptiility for on-chip integrtion. Other requirements re compct physicl dimensions, high-current cpcity, nd high-qulity fctor for high efficiency. Switching t very high frequencies (VHF, 3 3 MHz) is one route towrd PwrSiP nd PwrSoC 11,12. In the VHF rnge, inductors with n ir core or non-mgnetic core re preferred, s suitle mgnetic mterils working t these frequencies re limited nd the core implementtion is very chllenging 13. For exmple, t 5 MHz, NiZn nd CoNiZn hve low mgnetic sturtion fluxes nd cuse detrimentl core heting in high-flux power electronics pplictions 14. In ddition, VHF converters require inductnce vlues of s of nh, which is in the inductnce rnge of ir-core inductors, therey lending themselves to promising solution 15. The reported MEMS inductor friction technologies cn e clssified into two min ctegories: on-sustrte inductors nd sustrte-emedded inductors. To fricte on-sustrte plnr inductors, surfce micromchining technology hs een widely used, prticulrly for low-spect-rtio inductors. These methods re sed on scrificil lyers 16, molding 17, or comintion of the two 18. One method to fricte on-sustrte high-spect-rtio 3D inductors is to use UV-LIA lithogrphy with SU-8 negtive resist. The resist structures serve s electroplting molds nd scrificil lyer or supporting pillrs 22,23 for the electrodeposition of conducting metls. The second ctegory is emedded inductors, in which the inductors re emedded inside the Si sustrte nd utilize the unused sustrte volume. Consequently, the inductor height ove the sustrte surfce cn e lowered, which is n dvntge for integrted circuit implementtion 14. Si-emedded inductors re lso n ttrctive solution for the dvnced pckging of ultr-compct power supplies with the pssive interposer 24. There re prior-rt studies of etched Si cvities for emedded inductors (wet-etched 25 nd dry-etched 26 ) or through-silicon vis (TSV) 24, Yu et l. 26 reported Si-emedded inductor using friction process using 3D shdow msks nd multiple lithogrphicl exposures with SU-8. The interconnections re not through wfer. By contrst, TSV inductors 27 hve the dvntge of integrted circuit (IC) integrtion, tht is, co-pckged or stcked systems in pckge 29,3. MEMS TSVs re known to e promising technology for miniturized RF MEMS nd dvnced system pckging nd integrtion 31,32. With the necessity of high-spect-rtio TSVs for compct 3D inductors, friction technology for Si-emedded inductors is still chllenge. 1 Ntionl Center for Micro- nd Nnofriction, Dnchip, Technicl University of Denmrk, 28 Kongens Lyngy, Denmrk; 2 Deprtment of Electricl Engineering, Technicl University of Denmrk, 28 Kongens Lyngy, Denmrk nd 3 IPU, Nils Koppels Allé, 28 Kongens Lyngy, Denmrk Correspondence: Anpn Hn (nph@dtu.dk) Received: 6 Mrch 217; revised: 22 August 217; ccepted: 14 Septemer 217

3 2 3D ir-core inductors for VHF power conversion The ner-idel design of n ir-core MEMS inductor involves free-stnding windings where the remining silicon is fr from the windings ecuse the silicon negtively ffects the opertion frequency nd energy conversion efficiency due to prsitic cpcitnce (C p ) nd eddy-current losses tht ultimtely cuses undesired heting. The prsitic cpcitnces etween the Cu windings nd the Si sustrte deteriortes the qulity fctor nd decreses the opertion frequency 26,33. In ddition, there is lso n eddy-current loss in the Si core 34. In this pper, we implement friction process of Si-emedded 3D ir-core inductors for VHF power conversion pplictions. The inductors re emedded in the silicon sustrte, nd the suspended Cu windings re secured y Si fixtures (Figure 1). Our process hs three min dvntges. First, the process is CMOS-comptile with mximum processing temperture lower thn 2 C. This llows MEMS processing of CMOS electronics wfers without hrming the CMOS electronics. Second, the process is highly generic nd enles the friction of lrge diversity of inductor geometries. We demonstrte the diversity y fricting spirl, solenoid, toroid, trnsformer, nd the DTU inductor, which cnnot e fricted using wire-winding technology. The toroid geometry is especilly well mtched for PwrSoC pplictions ecuse the mgnetic field is confined in the windings to reduce EMI nd minimize the cross-tlk effects on other proximity electronic components 35. Third, the TSV-sed inductor technology enles the friction of pssive interposer with emedded 3D inductors for PwrSiP. The pper is presented s follows: The mterils nd friction method re descried with process overview emphsizing the criticl steps. Then, the friction nd chrcteriztion results re presented. The inductors were tested with smll-signl mesurement, reliility tests with therml nd mechnicl shocks, nd lrge-signl testing in VHF converters. The lst section concludes the pper. MATERIALS AND METHODS Friction process overview The friction process includes three min stges, 12 steps nd 4 UV lithogrphy msks (Figure 2). A 3D nimtion of the process is in Supplementry Video S1. We used -mm dimeter, douleside polished, [] crystl orienttion, Si wfers. Stge 1 focuses on deep rective ion etching (DRIE) TSV etching nd egins with depositing 5-nm-thick luminum oxide (Al 2 O 3 ) on oth wfer sides y tomic lyer deposition (ALD). On the wfer front side, n Al 2 O 3 hrd msk is ptterned y uffered hydrofluoric cid (BHF) A Toroidl windings Solenoid windings I in I out I in S S I out Si support A Si support Figure 1 3D illustrtions of the ir-core toroidl inductor (), nd solenoid inductor (). The input current (I in ) nd output current (I out ) re indicted y the rrows. round-signl-ground (S) pds were designed for RF mesurements. For the friction process of the cross section A -A, see Figure 2. Stge 1: creting vis Stge 2: copper filling Stge 3: Si-core etching Deposition of Al 2 O 3 (Flt) Deposition Al 2 O 3 nd SiO 2 Deposition of Al 2 O 3 (deep-trench) PR spin-coting + ptterning Electroplting (top conductor) PR spry-coting + ptterning Al 2 O 3 etching (BHF) 3 μm 7 μm Bottom-up electroplting Al 2 O 3 nd SiO 2 etching (BHF) Through-silicon etching (DRIE) + PR stripping Electroplting (ottom conductor) Si-core etching (DRIE) Si fixture 5 15 Al 2 O 3 removl (BHF) Silicon (Si) Aluminum oxide (Al 2 O 3 ) Copper wet etching Photoresist (PR) Silicon dioxide (SiO 2 ) Inductor relesing (BHF) Seed lyers (Ti/Au) Electroplted copper (Cu) Figure 2 Cross-sectionl illustrtion of the friction process flow (section A-A in Figure 1). BHF, uffered hydrofluoric cid; DRIE, deep rective ion etching. doi:.38/micronno

4 etch using photoresist msk (AZ MiR 71). Next, TSVs re creted y DRIE. The spect rtio is from 9 to 12. The core shpe is lso defined in this step y the fixture trenches, which re etween 3 μm nd 7 μm wide. Finlly, the remining resist nd Al 2 O 3 re removed with n oxygen plsm nd BHF. Stge 1 is finlized y n RCA clening step, which is n importnt preprtion for stge 2. Stge 2 focuses on creting Cu TSVs nd windings. First, Al 2 O 3 is deposited ecuse it is crucil to cover nd protect the deep fixture trenches (AR43) during the Si core removl (stge 3). Becuse of the high etching selectivity of Si over Al 2 O 3 in n SF 6 plsm ( :1) 36 only 5 nm of Al 2 O 3 thin film is sufficient to protect the Si support nd fixtures (Figure 1) while removing the Si core. Step 6 lso includes the deposition of 1.5 μm SiO 2 y plsm-enhnced chemicl deposition. It prtly sels the 3-μmwide fixture trenches to void defects on the top windings. Susequently, three electroplting steps re performed to form Cu windings. We first plte 3-μm-thick top lyer nd sel of the TSVs (step 7), followed y ottom-up plting step to fill the TSVs (step 8); finlly, 3-μm-thick ottom lyer (step 9) is plted. For the electroplting seed lyer, we use n electron em evported nm Cr nd nm Au thin-film stck. The inductor windings re ptterned y Cu wet etching using resist msk, thus otining the Si-core inductor (step ). In stge 3, the Si core is selectively removed y inductively coupled plsm (ICP) etching. During the ICP etch, Cu is protected y 5-nm-thick Al 2 O 3 lyer from the plsm environment s n dditionl precution (step 11). A spry-coted photoresist uniformly covers the 3-μm-tll Cu windings nd, more importntly, sels the fixture trench (step 12). The spry-coting recipe ws crefully developed. Photolithogrphy is then performed on the wfer front side, followed y BHF etching of Al 2 O 3 nd SiO 2 to expose the silicon (step 13) for isotropic silicon ICP etching (step 14). The Al 2 O 3 lyers on the fixture trenches nd t the wfer ckside ct s n ICP etch stop, llowing complete removl of the Si core. The windings re nchored y severl Si fixtures nd suspended on the Al 2 O 3 /SiO 2 memrne. The finl ir-core inductor is otined y removing the oxides in BHF. Criticl processes nd process prmeters In this section, we descrie the criticl equipment, mterils, nd process prmeters optimized for our process flow. We focus on the ALD of Al 2 O 3 (steps 1, 6, nd 11), DRIE for TSV etching (step 4), Cu electroplting for TSVs nd inductor windings (steps 7 9), photoresist spry coting for BHF etching of Al 2 O 3 nd SiO 2 (step 12), nd isotropic ICP etching of the Si core (step 14). For steps 1, 6, nd 11, therml ALD instrument (Picosun R2, Espoo, Finlnd) deposits Al 2 O 3, which serves s oth the DRIE etch msk nd the stopping rrier. Here 5-nm-thick Al 2 O 3 film is ALD-deposited t 2 C using lternting exposures of trimethylluminium (TMA) (Strem Chemicl, MA, USA) nd H 2 O. The rector pressure ws elow 2 kp during deposition. We developed two recipes for flt surfce (step 1) nd deep trenches (AR = 32) (steps 6 nd 11), respectively. For flt wfers, one ALD rection cycle consists of one pulse nd purge step for ech precursor. Together with the crrier gs (N 2 ), the precursor gsses re pulse injected into the rector, nd the rector is susequently purged with the crrier gs. The pulse time is.1 s, nd the purge time for TMA nd H 2 O re 3 nd 4 s, respectively. For deep trenches, the second recipe hs two pulse nd purge steps for ech precursor. For oth precursors, the first pulse is.1 s followed y.5 s of purging, wheres the second pulse is.1 s followed y 2 s of purging 37. The crrier gs flow is 15 sccm nd 2 sccm for the TMA nd H 2 O precursor, respectively. The deposition rtes of oth recipes re 1 Å per cycle. The thin-film thickness is mesured using spectroscopic ellipsometry (M-2V, HAWoollm, Inc., Lincoln, Nersk, USA). 3D ir-core inductors for VHF power conversion For step 4, DRIE tool (Pegsus, SPTS, UK) etches TSVs nd the fixture trenches. The etch msk stck includes 2-μm-thick MiR 71 photoresist (Microchem, Inc., USA) nd 5-nm-thick Al 2 O 3 lyer. The Al 2 O 3 lyer on the wfer ck side cts s stopping lyer when etching through the Si wfer. For etching silicon TSVs nd fixtures, we developed two-segment recipe including fst etching segment (segment A) nd notching-compenstion etching segment (segment B) for the finl prt of the TSV. For oth segments, coil powers re 28 W nd 2 W in the etch nd pssivtion steps, respectively. The process temperture is 2 C for segment A nd C for segment B. Segment A is used to etch 95% of Si in the wfer thickness, wheres the reminder is etched with segment B. The plsm chmer is pre-conditioned y min of n oxygen plsm efore DRIE of silicon. Segment A is optimized for high-speed etching with n etch rte of 11 μm min 1 with 5% etch lod. This recipe is sed on the Bosch process with three lternting steps, including sidewll pssivtion (4 s, 2 sccm C 4 F 8, 25 mtorr), oost (1.5 s, 35 sccm SF6, 25 mtorr, plten power 14 W), nd Si etch (5 s, 55 sccm SF6, 15 mtorr). Segment B uses low-frequency plten genertor (38 KHz) to minimize notching 38 t the Al 2 O 3 stop lyer. The two min steps re Si etching (3 s, 4 sccm SF 6 nd 4 sccm O 2 ) nd pssivtion (2 s, 25 sccm C 4 F 8 ). For steps 7 9, electroplting is used to deposit Cu s the conductor mteril. It is done in custom-designed chemicl th nd setup 39. Briefly, the electroplting th consists of two titnium rs holding Cu node nd cthode, which is connected to the smple. The electrolyte contins 14 g L 1 CuSO 4, 14 g L 1 H 2 SO 4, nd 66 mg L 1 NCl. Air uling is used for electrolyte gittion. Electroplting is performed t room temperture. Two processes re developed for, respectively, plting 3-μm-thick Cu lyer on plnr surfce (steps 7 nd 9) nd ottom-up filling into TSVs (step 8). Dedicted wfer holders for ech processes hve een designed. One key feture of the holder for the first process is the stinless steel current thief for excellent plting-thickness uniformity cross -mm wfer (o5% pek to pek). The holder for the second process hs stinless steel plte connected to pin to chieve electric contct from the ottom of the wfer nd plstic cover to fix the wfer nd void plting t the edge. First, for the plnr plting step, it is importnt to sel the TSVs to provide n electricl pth for TSV filling. A pulsed current with n verge current density of 2.57 A dm 2 is tested to e effective in closing the TSVs. Second, for TSV filling, direct DC current t density of.3 A dm 2 is used. A degssing step is required for oth TSV closing nd filling to chieve void-free Cu-filled TSVs. For degssing, the Si wfer is immersed in wter nd kept in vcuum (desicctor) for min efore rupt venting. Trpped ir ules expnd in vcuum nd escpe from cvities. This step is repeted severl times until no ules pper, fter which the wfer is mounted on the plting holder. Despite degssing, the plting process is not uniform, nd some TSVs would e filled nd over-plted efore others. This prolem is solved y removing over-plted Cu with shving process using stinless-steel lde. Becuse silicon dioxide nd lumin re much hrder thn stinless steel, the shving process does not scrtch the smple mirror finish, which is required for susequent processes. The filling process is then continued for the unfilled TSVs. This shving-filling procedure is repeted severl times until ll TSVs re uniformly filled. More thn 98% of TSVs re filled successfully with this process. Top nd ottom Cu lyers re then etched with photoresist msk (AZ 4562, Microchem, Inc.) using commercil wet etchnt (APS, Trnsene, MA, USA). The etch rte is ~.5 μm min 1 t room temperture. For step 12, spry-coting instrument (ExctCot, Sono Tek Co.) is used for uniform resist-lyer coting of the 3-μm-tll Cu windings nd, more importntly, for seling the fixture trenches. The spry-coted resist is then used (step 12) s msk for etching 3 doi:.38/micronno

5 4 3D ir-core inductors for VHF power conversion Al 2 O 3 nd SiO 2 using BHF (step 13). The photoresist, AZ4562, is diluted in methyl ethyl ketone nd propylene glycol monomethyl ether cette with n optimized mixing rtio of :2:1. A two-step spry coting recipe is developed to simultneously cover the Cu windings nd sel the fixture trenches, which re 3 nd 7 μm wide. The resist is spryed twice with 1-min witing time t 28 C nd the following prmeters: The spry nozzle is 3 mm ove the sustrte, moving long mendering pth t speed of mm s 1. The resist dispense rte is 25 μl min 1. The distnce etween two sprying lines is 5 mm. The sustrte temperture is kept t 28 C. To void ir ules in the resist, the resist solvents trpped in the trenches re slowly evported y storing the smples for 5 h t room temperture. Then, the resist is pre-exposure ked in convection oven t 9 C for 3 min. The resist thickness on flt res is 6 μm. Multiple exposures (4 exposures, s witing time etween exposures, nd totl dosge of 42 mj cm 2 ) re necessry to void resist overheting. The smple is then developed for 3 s using AZ 351B (Microchem, Inc.) diluted in deionized wter with volume rtio of 1:5. Hrd-king is done in convection oven t 15 C for 3 min. For step 14, n ICP silicon-etching tool (STS MESC Multiplex ICP, SPTS, Newport, UK) removes the silicon core nd relizes the finl ir-core inductors. We developed fluorine-sed isotropic ICP recipe utilizing the undercut effect to etch Si in the toroidl core. The etch gsses re 23 sccm SF 6 nd 23 sccm O 2. The coil power is 28 W, nd miniml plten power of 3 W is pplied for mximl isotropic etching. The etch rte of the Si core is μm min 1. The spry-coted resist nd 5-nm-thick Al 2 O 3 stck serve s the etch msk. The wfer ckside is coted y 5- nm-thick Al 2 O 3 nd two lyers of the spry-coted resist. The Al 2 O 3 lyer stops the etching nd prevents leking of helium for ckside sustrte cooling. RESULTS AND DISCUSSION Friction results We successfully fricted 3D ir-core inductors. Scnning electron microscopy (SEM) microgrphs show toroidl inductors, solenoids, spirls, nd 1:1 trnsformer (Figure 3). In ddition, we cn lso crete inductors with ritrry shpes; this is demonstrted y the DTU inductor. The process chieved yield of 64 95% (Supplementry Figure S4). In this study, we fricted 15 different toroidl inductor designs with footprints from 4 mm 2 to 16 mm 2, n outer rdius (R o ) from.5 mm to 2 mm, nd n inner rdius (R i ) from.5 to 1 mm. The numer of turns vries from 15 to 35 turns. Inductors with 3-μm-dimeter TSVs were relized on 28-μm-thick nd 35-μm-thick Si sustrtes. Thicker sustrtes cn lso e used with our process. We creted inductors on 5-μm-thick sustrte with 5-μm TSVs. The inductors were designed with severl TSVs in the outer ring to enhnce volume coverge nd minimize resistnce. In ddition, the identicl dimeter of TSVs chieves uniform through-wfer etching nd Cu TSV filling. As descried efore, the Si core hs een removed to relize the desired ir-core nd suspended windings structure. The relese process includes BHF dipping, deionized wter rinsing, nd gentle nitrogen gs drying. After the relese, we did not oserve ny deformtion of the windings. The inductors re suspended on the Si support nd secured y symmetriclly plced Si fixtures. Our inductors re mde of only Si nd Cu; no polymers (for exmple, PDMS or SU-8) re used. We expect the inductors to hve good therml stility, nd low stresses re nticipted due to the lower therml expnsion coefficient (CTE) mismtch etween Cu nd Si (Δ CTE Cu-Si = 14.1 ppm per C), compred with Cu nd SU-8 (Δ CTE Cu-SU-8 = 35.3 ppm per C). The inductor windings re free hnging nd only secured in the Si fixtures. Only t the fixtures, there my e higher stress due to the direct Si-Cu contct. To I in Primry coil S Secondry coil c S e I out d Figure 3 SEM microgrphs of the fricted 3D ir-core MEMS inductors, () toroidl inductors with 16 mm 2 (1.5 mm outer rdius,.75 mm inner rdius, nd 25 turns) nd 4 mm 2 footprint (inset). Presented y the lines nd rrows, the current flows from the top wire onding pd, through the TSV interconnects, then psses through the windings nd exits t the lower pd. The mesurement pds re designed in ground-signl-ground configurtion t oth terminls for wfer-level proing. Four 8 μm y 8 μm pds t the corners re for flip-chip onding. () 1:1 toroidl trnsformer. The primry coil hs lrger conductors thn tht of the secondry coil. (c) Solenoid inductor, (d) spirl inductor, (e) DTU inductor. SEM, scnning electron microscopy; MEMS, microelectromechnicl systems; TSV, through-silicon vis. doi:.38/micronno

6 3D ir-core inductors for VHF power conversion 3 μm trench 7 μm trench C C section 5 Step 5: DRIE profile C C TSVs d 7 μm = 37 μm TSV 3 μm trench d 3 μm = 233 μm μm Etch depth line 5 μm Figure 4 Etching profile fter DRIE (step 5). () An SEM microgrph of cleved Si wfer showing the etching profile t the Si fixture. Enclosed in the fixture re three TSVs tht hve een etched through. As depicted in the inset tken from the process flow, the fixture trenches re etched with shllower depths of 233 nd 37 μm for the 3- nd 7-μm-wide fixture trenches, respectively. () A cross-sectionl SEM microgrph (C-C direction) of the TSV nd 3-μm-wide trench. This smple ws cut with dimond lde. DRIE, deep rective ion etching; SEM, scnning electron microscopy; TSV, through-silicon vis. enle post processing of CMOS wfers, we kept ll process tempertures elow 2 C. In the following, the friction results of ech step re presented nd discussed. Design considertions nd technology chllenges re descried. DRIE etching We creted the TSVs nd fixture trench y DRIE (step 4). The Si fixture is designed tking dvntge of the loding effects nd the spect rtio dependent etch (ARDE) effect 4, which mens tht wider ptterns re etched with deeper thn nrrower ptterns s presented in the inset of Figure 4. Figure 4 shows tilted view of the Si fixture trench fter through-wfer etching. Figure 4 shows tht the TSVs hve een etched through while the nrrow fixture trench is not. The fixture trench hs 3- nd 7-μm-wide sections. The 7-μm-wide trench defines the core shpe, nd the 3-μm-wide trench defines the shpe of the Si fixture. The semicircle trench must e 3-μm wide to void defects tht re trnsferred to the top inductor windings during copper plting. Illustrted y the dshed line in Figure 4, the ARDE leds to n etch depth of 37 μm for the 7-μm-wide section nd 233-μm etch depth for the 3-μm-wide section. Copper electroplting nd wet etching After the first plting step of 32-μm-thick top Cu lyer (step 7), the 3-μm-dimeter TSVs were completely closed (Figure 5). Approximtely 35 μm of copper ws deposited into the TSVs (Figure 5, inset). Without ny voids or trpped ir, the TSVs were filled in the second plting process (step 8, Figure 5). While we completely filled the TSVs directly in the second plting step, nother friction method is to mke hollow TSVs with seed lyers covered uniformly on the TSVs sidewlls followed y electroplting. ALD is suitle technique to uniformly deposit seed lyers on high-spect-rtio TSVs 41,42. However, hollow TSVs re limited in current hndling cpility nd re less suitle for power electronic pplictions. We ptterned the inductor windings y Cu wet etching with photoresist msk. Due to undercutting of the isotropic Cu wet etching, we must consider etch compenstions on the msk design, mening tht, for exmple, winding gp ( w )of94μm requires msk design width of 4 μm (Figure 5c). Becuse of the isotropic etching profile, the pitch etween nery turns is limited. To reduce the winding pitch, lterntive methods re mould-sed electroplting 19,2,43 nd nisotropic plsm etching of Cu Both pproches cn esily e integrted into our process with minor dpttions t steps 8 nd. Spry coting nd Si-core isotropic dry etching This section presents the lst stge of Si-core removl to crete the finl ir-core inductors (Figure 6). To expose the Si core to the isotropic ICP etch, photolithogrphy is performed using sprycoted resist. Figure 6 shows BHF etching of SiO 2 nd Al 2 O 3 using spry-coted resist msk (step 13). Conforml coting of the resist is preferred, ut this is impossile for the deep fixture trenches; hence, we seled the trenches. Spryed resist flowed into the trenches nd resulted in very thin resist lyer (15 nm) on the fixture edge. This ws not enough to sustin the 2-min BHF etch to remove the 5-nm-thick Al 2 O 3 nd 1.5-μm-thick SiO 2 ecuse HF diffusion depends on the resist thickness. According to Fick s lw of diffusion, douling the resist thickness llows four-times-longer etching time in BHF. Therefore, we douled the resist thickness y developing two-step sprying recipe, wherey the resist covers the 3-μm-tll Cu windings nd sels the trenches simultneously. After the first sprying step, the resist ws optimized so tht the solvents quickly evported (6 s) efore the second spry coting, which gives resist lying on top of the first lyer nd sels the trenches. The sme resist thickness could e chieved with one-step sprying recipe; however, ll the resist will flow into the trenches nd result in d seling nd thin resist on the trench edges. Figure 6 shows good nd poor resist trench filling nd the corresponding results fter Si-core etching. With poor seling, Al 2 O 3 deposited on the fixture trench sidewlls is not protected in BHF etching (step 13), resulting in n eroded fixture during the ICP Si-core etch (step 14). After Si-core etching with good trench seling, hollow Al 2 O 3 stopping rrier remined s shown in Figure 6c. After the inductor relesing step with BHF etching, the finl ircore toroidl inductors were otined s shown in Figure 3. The Si core ws completely removed, leving the suspended windings secured y the symmetriclly plced Si fixtures. After the ICP etch, the windings were not deformed, indicting tht the residul stresses were extremely low due to the low processing temperture. We did not oserve winding deformtions fter the relese steps, indicting tht the structures cn withstnd wet processes nd tht no vpor or criticl-point drying steps were required. The two inductor terminls re plced on the front side for dvnced pckging nd chrcteriztion. We show outstnding inductor core design flexiility, nd our process uniqueness is demonstrted y the DTU core inductor. The doi:.38/micronno

7 3D ir-core inductors for VHF power conversion 6 c 3 μm trench w=94 μm TSVs 2 μm 4 μm 3 μm μm 7 μm trench μm Figure 5 Cu electroplting nd wet-etching results. () A top-view SEM microgrph fter the first plting of the 3-μm-thick Cu lyer (step 7). All TSVs nd the fixture trench re closed, which provides the electricl pth for ottom-up TSV filling. The trnsprent red line illustrtes the fixture trenches tht hve een closed. Copper is filled 35 μm into the TSVs, s shown in the sufigure. () A void-free Cu-filled TSV fter 13.5 h of plting t.5 A dm 2 (step 8). (c) Wet-etched toroidl Cu windings (step 9). The red lines re isotropic wet-etch compenstions on the photolithogrphy msk design. The winding pitch (w) is incresed from the designed 4 to 94.3 μm due to the lterl undercut. SEM, scnning electron microscopy; TSV, through-silicon vis. ood filling Si c 2 μm B Al2O3-coted fixture trench B B Resist Spry resist B Bd filling Si 2 μm Eroded Al2O3 d Bckside 87 μm 149 μm Figure 6 () Opticl top-view microgrph of the ptterned spry-coted resist t the Si fixture (step 12). ood nd d fixture trench resist seling re shown in the top nd ottom insets. () Si-core etching results corresponding to good nd d seling. (c) A hollow Al2O3 stopping rrier on the fixture trench (cross section is depicted in the inset) nd n Al2O3/SiO2 memrne t the ottom remined fter isotropic ICP Si etching. (d) A well-defined Si fixture ws on the finl inductor fter the BHF relesing step, nd the fixture ckside is shown in the inset. BHF, uffered hydrofluoric cid; ICP, inductively coupled plsm. other pproch to remove the Si core is potssium hydroxide (KOH) Si wet etching, ut the core geometries re hevily restricted, tht is, squre rectngulr cores re possile. The KOH is, however, cheper tch process. Smll signl mesurement Our MEMS inductors were electriclly chrcterized in the frequency rnge from 1 to 1 MHz using precision impednce nlyzer (Agilent 4294A, Agilent Technologies Inc., Snt Clr, CA, USA). The mesurements were done for four toroidl inductor designs: (i) 28μm-tll nd 25-turn ir-core inductors, (ii) 28-μm-tll nd 2-turn ir-core inductors, (iii) 35-μm-tll nd 2-turn ir-core inductors, nd (iv) 28-μm-tll nd 2-turn Si-core inductors. The inductors hve.75-mm inner rdius, 1.5-mm outer rdius, nd TSV dimeter of 3 μm. For ech design, we mesured three inductors, nd for Figure 7, 12 inductors in totl were mesured. More detils on the inductor design, modeling, nd mesurement will e presented in our upcoming pper. Figure 7 shows the mesurement results for three inductors of design (i). The mesured inductnce nd resistnce vlues re 2% lrger thn simplified nlyticl clcultions of idel toroid inductors. At the pek qulity fctor (Q) frequency (41.2 MHz), the inductnce is 34.3 nh ±.12 nh, nd Q is 12.9 ±.17. The resistnce is 18 ± 7 mω t 1 MHz. The inductors were from the sme wfer. For ll mesurement points, the verge pek-to-pek vritions re.56% (inductnce), 2.67% (qulity fctor), nd 2.56% (resistnce), respectively. We hve lso compred the inductors from two different process runs. Ten toroidl inductors with 28 μm thick nd 2 turns were mesured. The stndrd doi:.38/micronno

8 3D ir-core inductors for VHF power conversion 4 Inductnce (L ) Qulity fctor (Q ) AC resistnce (R AC ) L (28 μm) Q (28 μm) R AC (28 μm) 5 L (35 μm) Q (35 μm) R AC (35 μm) 7 L (nh) Q ; R AC (Ω) L (nh) Q ; R AC (Ω) Frequency (MHz) Frequency (MHz) 5 c 6 5 L (N = 2) Q (N = 2) L (N = 25) Q (N = 25) R AC (N = 2) R AC (N = 25) 3 d 6 5 L (ir core) L (Si core) Q (ir core) Q (Si core) R AC (ir core) R AC (Si core) 3 L (nh) Q ; R AC (Ω) L (nh) Q ; R AC (Ω) Frequency (MHz) Frequency (MHz) Figure 7 Comprison of the frequency-dependent inductnce (L), qulity fctor (Q), nd AC resistnce (R AC ) of selected toroidl inductors designs. () Mesurement of three inductors with the sme design (28-μm tll, 2-turn ir-core toroidl inductor). The men vlues nd error rs re plotted. () Compring 2-turn ir-core inductors fricted using 28- nd 35-μm-thick sustrtes. (c) Compring ir-core inductors with 2 nd 25 turns. (d) Compring ir-core nd Si-core inductors. Tle 1 Comprison of the electricl performnce of emedded ir-core toroidl inductors Inductor from R DC (mω) L density (nh mm 3 ) Q (MHz) This work (toroid) @ MHz Yu et l. 26 (toroid) @4 7 Li et l. 28 (toroid) @14 devitions re less thn 1.9% for inductnce, 8.4% for resistnce, nd 9.2% for qulity fctor. The inductnce tolernce of our inductor is lower thn tht of the wire-wound inductors (5 %). The reltively smll vritions indicte tht the friction process is reproducile. This is n essentil dvntge for SMPS nd electronic design. For PwrSoC inductors, high inductnce nd high Q fctor re desired. For toroidl inductor, this could e done y incresing the inductor height or numer of turns. We compred 35 to 28- μm-tll inductors nd 25 to 2-turn inductors. The results re shown in Figures 7 nd c. Our dt show tht there re trdeoffs etween the inductnce density, Q-fctor, nd optiml opertion frequency. By incresing the numer of turns, higher inductnce density (17.3 nh mm 3 ) is chieved, however t the sme time cusing lower pek Q-fctor () t lower frequency (31.8 MHz). Tller inductors show higher Q-fctor t higher frequencies, wheres the inductnce density is lower (14.2 nh mm 3 ). Figure 7d compres ir-core nd Si-core toroidl inductors fricted with 2 turns on 28-μm-thick wfer. Air-core inductors showed 14% higher-qulity fctor nd 23% higher-opertion frequency thn did the Si-core inductors (Q of 9.3 t 17.8 MHz). At high frequencies (45 MHz), the inductnce decreses nd the resistnce increses due to the incresed prsitic cpcitnces (C p ) nd the eddy-current losses in the Si core. C p ws mesured to 3.71 pf nd 11.5 pf for the ir core nd the Si core, respectively. A higher C p increses the effective resistnce with incresing frequency. Therefore, without removing the Si-core, R AC-eff is 8 nd 14% higher thn tht of the ir-core inductor t 5 nd MHz, respectively. We lso fricted inductors tht cn operte t higher frequency of 72.6 MHz with Q of 11.5 nd n L of 42.5 nh. This inductor (35-μm-tll, 5 mm 2 ) hs lower prsitic cpcitnce due to 2 times smller pds (Figure 1), compred with tht of the inductor in Figure 3. Tle 1 compres the electricl performnce of our MEMS toroidl inductors nd prior rt on emedded inductors. Our inductors hve four-times-higher inductnce density compred to other Si-emedded toroidl inductors with typicl densities of 3 4nHmm 3. This is ecuse our high-spect-rtio TSVs enle compct inductors to e emedded in Si wfer for decresed totl volume nd higher inductnce density. Our inductor DC resistnce is lower while the Q-fctor is similr to the previous work. Therml nd mechnicl reliility Our 3D MEMS toroidl inductors were tested with therml shock nd drop testing experiments. First, the therml shock test ws performed in temperture shock test chmer VT 7 S2 (Vötsch, Weiss Technik UK Loughorough, Leicestershire, UK). The temperture ws rpidly cycled from 4 to 15 C under vcuum doi:.38/micronno

9 8 3D ir-core inductors for VHF power conversion Lrge signl testing in VHF converters The lrge signl performnces of our ir-core toroidl inductors nd Si-core toroidl inductors were compred in 33 MHz clss E resonnt DC-DC oost converter (Figure 8). More detils out the converter design re in Ref. Le HT, Nour Y, Hn A, et l. Microfricted ir-core toroidl inductor in very high frequency power converters, unpulished oservtions. The input voltge rnges from. to 14. V DC, the output voltge rnges from 25.5 to 35.4 V DC, nd the output power rnges from 1.6 to 3.2 W. Figures 8 nd show therml imges of the converter with n input voltge of 12. V nd n output voltge of 3. V. Our Sicore inductor shows mximum temperture of 125 C, power converter efficiency (η) of 64.1%, nd converter power loss (P LOSS ) of 1.6 W. In contrst with the Si-core inductor, our ir-core inductor shows significntly lower pek temperture of 85 C, higher converter efficiency (68.2%), nd lower converter power loss (1.26 W). As the inductor geometries re identicl, our results imply tht the Si core cuses power loss of.34 W for the converter, which results in n dditionl 4 C temperture increse. This is consistent with our smll signl resistnce mesurements; t 33 MHz, the Si-core inductor hs higher resistnce (1 Ω) thn the ir-core inductor (.6 Ω). The incresed resistnce is due to the cpcitive nd the eddy-current loss in the Si core. c 8 5 Efficiency (%) η (ir-core) η (Si-core) 12 V IN (V) for 25 cycles. The heting rte ws 3 C min 1, nd the cooling rte ws 3.5 C min 1. We tested eight inductors: four ir-core inductors (TSV dimeters of 3 nd 5 μm) nd four Si-core inductors (TSV dimeters of 3 nd 5 μm). After 25 cycles, the inductors were opticlly inspected nd electriclly chrcterized. All inductors were electriclly functionl, nd no deformtion or crcks were oserved. More detils of the testing results cn e found in Supplementry Figures S1 nd S2. Second, drop testing experiments were conducted to proe the mechnicl stility of the suspended windings. The inductors were mounted on PCB test ord, which then ws dropped on n luminum plte from height of.5, 1, nd 2 m. Up to the height of 2 m, no winding deformtion ws oserved, nd the electricl properties were unchnged. Our results suggest tht the fricted inductors re stle for prcticl use in electronic circuits. The opticl imges of tested inductors re shown in Supplementry Figure S3. For pplictions tht require more roust windings, we suggest filling the ir core with epoxy or silicon ruer. We nticipte slight decrese in performnce. 13 P LOSS (ir-core) P LOSS (Si-core) Figure 8 Therml imges of the converter (V IN = 12 V) with () the ir-core inductor nd () the Si-core inductor. The imges were cptured y FLIR cmer T6 (FLIR, USA) using stndrd lens. (c) The efficiency nd the converter power loss re presented s function of the input voltge (V IN ) for the ir-core inductor nd the Si-core inductor P LOSS (W) CONCLUSION We successfully relized 3D ir-core MEMS inductors for VHF power electronic pplictions. Compred with prior rt on toroid inductors, we demonstrted fourfold lrger inductnce density while keeping good-qulity fctor nd opertion frequency. We hve demonstrted tht the proposed process is CMOScomptile for the post integrtion of 3D inductors nd highly generic for fricting lrge diversity of inductor geometries, for exmple, spirl, solenoid, nd toroidl inductor; toroidl trnsformer; nd DTU inductor. Our smll-signl nd lrgesignl mesurements show tht the ir-core inductors outperform the silicon core inductors in the MHz regime. Our technology of integrted 3D inductors with high-spect-rtio TSVs hs gret potentil for PwrSiP s n dvnced pssive interposer with the emedded 3D inductors. In the next step, we will focus on integrting mgnetic mterils s the core mteril, to expnd the frequency rnge in which the inductor cn e used. While our technology hs een developed for power systems on chip (PwrSoC) pplictions, we elieve tht our generic technology will find other pplictions, for exmple, integrted high-q LC filters my e used in RF MEMS for trnsmitters nd receivers. ACKNOWLEDEMENTS This work ws conducted t the Ntionl Center for Micro- nd Nnofriction (DTU Dnchip), IPU, nd DTU Electro. This project is prt of the TinyPower project, which is funded y the Innovtion Foundtion (No ). The uthors thnk Anders Jørgensen, Kren Birkelund, Jons Michel Lindhrd, nd Peter Windmnn for providing project mngement, experimentl ssistnce, nd technicl dvice. COMPETIN INTERESTS The uthors declre no conflict of interest. REFERENCES 1 Yo JJ. RF MEMS from device perspective. Journl of Micromechnics nd Microengineering 2; : Yoon JB, Kim BK, Hn CH et l. Surfce micromchined solenoid on-si nd onglss inductors for RF pplictions. IEEE Electron Device Letters 1999; 2: Krl A, Behhni F, Aidi AA RF-CMOS oscilltors with switched tuning. Proceedings of the IEEE in Custom Integrted Circuits Conference; Snt Clr, CA; 1998: doi:.38/micronno

10 4 Young DH, Ml V, Ou JJ et l. A low-noise RF voltge-controlled oscilltor using on-chip high-q three dimensionl coil inductor nd micromchined vrile cpcitor. Proceedings of the Solid-Stte Sensor nd Actutor Workshop; Clevelnd, OH, USA; 1998: Ahn CH, Allen M. A plnr micromchined spirl inductor for integrted mgnetic microctutor pplictions. Journl of Micromechnics Microengineering 1999; 3: Fulcrnd R, Bncud A, Escri C et l. On chip mgnetic ctutor for tch-mode dynmic mnipultion of mgnetic prticles in compct l-on-chip. Sensors nd Actutors B: Chemicl 211; 16: Olivo J, Crrr S, De Micheli. Micro-friction of high-thickness spirl inductors for the remote powering of implntle iosensors. Microelectronic Engineering 214; 113: Arghchini M, Memer S, Chen J et l. A technology overview of the powerchip development progrm. IEEE Trnsctions on Power Electronics 213; 28: Mthún SCÓ, O Donnell T, Wng N et l. Mgnetics on silicon: An enling technology for power supply on chip. IEEE Trnsctions on Power Electronics 25; 2: Mthún CÓ, Wng N, Kulkrni S et l. Review of integrted mgnetics for power supply on chip (PwrSoC). IEEE Trnsctions on Power Electronics 212; 27: Knott A, Andersen TM, Kmy P et l. Evolution of very high frequency power supplies. IEEE Journl of Emerging nd Selected Topics in Power Electronics 214; 2: Knott A, Andersen TM, Kmy P et l. On the ongoing evolution of very high frequency power supplies. Applied Power Electronics Conference nd Exposition (APEC), 213 Twenty-Eighth Annul IEEE; Mr 213; Long Bech, CA, USA; 213: Kim J, Kim J-K, Kim M et l. Microfriction of toroidl inductors integrted with nnolminted ferromgnetic metllic cores. Journl of Micromechnics nd Microengineering 213; 23: Sullivn CR. Integrting mgnetics for on-chip power: chllenges nd opportunities. Custom Integrted Circuits Conference; Sept 29; Rome, Itly; 29: Pilw-Podgurski R, Sgneri AD, Rivs JM et l. Very-high-frequency resonnt oost converters. IEEE Trnsctions on Power Electronics 29; 24: Jing H, Wng Y, Yeh JLA et l. On-chip spirl inductors suspended over deep copper-lined cvities. IEEE Trnsctions on Power Electronics 2; 48: Allen M. Surfce micromchined solenoid inductors for high frequency pplictions. IEEE Trnsctions on Components, Pckging, nd Mnufcturing Technology: Prt C 1998; 21: Ahn CH, Allen M. Micromchined plnr inductors on silicon wfers for MEMS pplictions. IEEE Trnsctions on Power Electronics 1998; 45: hntsl MK, Hyes JP, Hrvey EC et l. Ptterning, electroplting nd removl of SU-8 moulds y excimer lser micromchining. Journl of Micromechnics nd Microengineering 21; 11: Brunet M, O Donnell T, O Brien J et l. Thick photoresist development for the friction of high spect rtio mgnetic coils. Journl of Micromechnics nd Microengineering 22; 12: Allen M. MEMS technology for the friction of RF mgnetic components. IEEE Trnsctions on Mgnetics 23; 39: Yoon Y, Prk J, Allen M. Polymer-core conductor pproches for RF MEMS. Journl of Microelectromechnicl Systems 25; 14: Kim J, Herrult F, Yu X et l. Microfriction of ir core power inductors with metl-encpsulted polymer vis. Journl of Micromechnics nd Microengineering 213; 23: Wng M, Li J, Ngo KDT et l. A surfce-mountle microfricted power inductor in silicon for ultrcompct power supplies. IEEE Trnsctions on Power Electronics 211; 26: u L, Li X. High-Q solenoid inductors with CMOS-comptile concve-suspending MEMS process. Journl of Microelectromechnicl Systems 27; 16: Yu X, Kim M, Herrult F et l. Silicon-emedding pproches to 3-D toroidl inductor friction. Journl of Microelectromechnicl Systems 213; 22: Feng Z, Lueck MR, Temple DS et l. High-performnce solenoidl RF trnsformers on high-resistivity silicon sustrtes for 3D integrted circuits. IEEE Trnsctions on Microwve Theory nd Techniques 212; 6: D ir-core inductors for VHF power conversion 28 Li J, Ngo KDT, Lu et l. Wfer-level friction of high-power-density MEMS pssives sed on silicon molding technique. 7th Interntionl Conference on Integrted Power Electronics Systems (CIPS); 6-8 Mr 212; Nuremerg, ermny; 212: Yu X, Kim M, Herrult F et l. Silicon-emedded 3D toroidl ir-core inductor with through-wfer interconnect for on-chip integrtion. IEEE Micro Electro Mechnicl Systems 212, Li J, Tseng VF, Xio Z et l. A high-q in-silicon power inductor designed for wferlevel integrtion of compct. IEEE Trnsctions on Power Electronics 217; 32: Thdesr PA, u X, Memer S et l. Through-silicon vis: drivers, performnce, nd innovtions. IEEE Trnsctions on Components, Pckging nd Mnufcturing Technology 216; 6: Lieter N, Storås P, Breivik L et l. A mesh seed lyer for improved throughsilicon-vi friction. Journl of Micromechnics nd Microengineering 2; 2: Arghchini M, Lng JH. Modeling, design nd performnce of integrted power electronics using MEMS toroidl inductors. Applied Power Electronics Conference nd Exposition (APEC), 214 Twenty-Ninth Annul IEEE; 16-2 Mr 214; Fort Worth, TX, USA; 214: Yue CP, Wong SS. Physicl modeling of spirl inductors on silicon. IEEE Trnsctions on Electron Devices 2; 47: Kmy P, Knott A, Andersen MAE. Printed circuit ord integrted toroidl rdio frequency inductors. IECON th Annul Conference on IEEE Industril Electronics Society; Oct 212; Montrel, Cnd; 212: rigors K, Frnssil S, Airksinen VM. Investigtion of su-nm ALD luminum oxide films y plsm ssisted etch-through. Thin Solid Films 28; 516: Shkondin E, Tkym O, Lindhrd JM et l. Friction of high spect rtio TiO 2 nd Al 2 O 3 nnogrtings y tomic lyer deposition. Journl of Vcuum Science & Technology A: Vcuum, Surfces, nd Films 216; 34: Hwng S. On the origin of the notching effect during etching in uniform high density plsms. Journl of Vcuum Science & Technology B, Nnotechnology nd Microelectronics: Mterils, Processing, Mesurement, nd Phenomen 1997; 15: Tng PT, Jensen JD, Dm HC et l. Microstructure & other properties of pulseplted copper for electroforming pplictions. SUR/FIN 22 AESF Mnufcturing nd Technology Conference; Chicgo, IL, USA; 22: Li SL, Johnson D, Westermn R. Aspect rtio dependent etching lg reduction in deep silicon etch processes. Journl of Vcuum Science & Technology A: Vcuum, Surfces, nd Films 26; 24: Solnki R, Pthngey B. Atomic lyer deposition of copper seed lyers. Electrochemicl nd Solid-Stte Letters 2; 3: Wu L, Eisenrun E. Integrtion of tomic lyer deposition-grown copper seed lyers for Cu electroplting pplictions. Journl of The Electrochemicl Society 29; 156: H734 H Loechel B. Thick-lyer resists for surfce micromchining. Journl of Micromechnics nd Microengineering 2; : Lee S, Kuo Y. Chlorine plsm/copper rection in new copper dry etching process. Journl of The Electrochemicl Society 21; 148: Lee JW, Prk YD, Childress JR et l. Copper dry etching with Cl2/Ar plsm chemistry. Journl of The Electrochemicl Society 1998; 145: Howrd BJ, Steinruüchel CR. Rective ion etching of copper in SiCl4-sed plsms. Applied Physics Letters 1991; 59: 914. This work is licensed under Cretive Commons Attriution 4. Interntionl License. The imges or other third prty mteril in this rticle re included in the rticle s Cretive Commons license, unless indicted otherwise in the credit line; if the mteril is not included under the Cretive Commons license, users will need to otin permission from the license holder to reproduce the mteril. To view copy of this license, visit y/4./ The Author(s) Supplementry Informtion for this rticle cn e found on the wesite ( micronno) doi:.38/micronno