Heterodyne Sensing CMOS Array with High Density and Large Scale: A 240-GHz, 32-Unit Receiver Using a De-Centralized Architecture

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1 Heterodyne Sensing CMOS Array with High Density and Large Scale: A 240-GHz, 32-Unit Receiver Using a De-Centralized Architecture Zhi Hu, Cheng Wang, and Ruonan Han Massachusetts Institute of Technology Cambridge, MA, USA 1

2 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 2

3 Terahertz Radar as an Important Sensing Mode [Source: roboticsandautomationnews.com] Multiple sensing modes are needed in navigation applications where safety is a priority Examples: self-driving cars, unmanned aerial vehicles, etc. [Source: Getty Images] 3

4 Terahertz Radar as an Important Sensing Mode ~ GHz [Source: roboticsandautomationnews.com] [National Research Council, Assessment of Millimeter-Wave and Terahertz Technology for Detection and Identification of Concealed Explosives and Weapons, 2007] Multiple sensing modes are needed in navigation applications where safety is a priority Examples: self-driving cars, unmanned aerial vehicles, etc. [Source: Getty Images] Terahertz sensing is an important complement to light-based sensing (e.g. LiDAR) Sub-THz waves have much lower propagation loss than light 4

5 Possible Path Towards Sharp THz Beam If we use a single heterodyne receiver array, to obtain 1 beam width, an area of 6cm x 6cm (~ 10,000 units) is needed at 240 GHz 5

6 Possible Path Towards Sharp THz Beam If we use a single heterodyne receiver array, to obtain 1 beam width, an area of 6cm x 6cm (~ 10,000 units) is needed at 240 GHz Dense RX Array Sparse TX Array Power Response (db) Angle (Degree) RX Pattern TX Pattern Convoluted Pattern One possible solution is based on the two-way array pattern On-board sparse TX array generates sharp beams On-chip dense RX array synthesizes single beam to filter out TX sidelobes -- with relaxed, but still high, scale requirement 6

7 Review of Previous On-Chip THz Sensing Arrays Direct (Square-Law) Detector Arrays (large scale) [E. Öjefors, et al., JSSC, 2009] [R. Al Hadi et al., JSSC, 2012] [R. Han et al., JSSC, 2013] Techniques of building large-scale direct detector arrays have become mature Limitations of direct detection Low responsivity and low SNR, due to limited received RF power (P IF P RF2 ) Coherence of RF signals is lost, thus unable to perform beam-forming (electrical scanning) 7

8 Review of Previous On-Chip THz Sensing Arrays Heterodyne Detector Arrays (small scale) 2 x 2 array [K. Statnikov, et al., TMTT, 2015] 8-unit array [C. Jiang, et al., JSSC, 2016] Strengths of heterodyne detection High responsivity and high SNR, by leveraging high LO power (P IF P LO P RF ) Coherence of RF signals is preserved, thus inherently capable of beam-forming There are still challenges of designing large-scale heterodyne detector arrays to form sharp beam 8

9 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 9

10 RX Chip: Centralized vs. De-Centralized Arrays On-Chip Antennas Sensing Pixel Example Sub-THz Mixers f IF Sub-THz LO Signal, f LO Reference Clock, f ref On-Chip Sub-THz PLL LPF N PFD Centralized array relies on a single LO source, however, LO power of each unit scales down as array scales up Long LO feed lines are lossy and hard to route 8-unit array [C. Jiang, et al., JSSC, 2016] 10

11 RX Chip: Centralized vs. De-Centralized Arrays Sensing Pixel Sensing Pixel On-Chip Antennas On-Chip Antennas Sub-THz Mixers f IF Sub-THz LO Signal, f LO Reference Clock, f ref Sub-THz Mixers Coupled Local Oscillators f IF Sub-THz LO Signal, f LO Reference Clock, f ref On-Chip Sub-THz PLL LPF N PFD Phase/Frequency Control, v ctrl On-Chip Sub-THz PLL N PFD On-Chip Phase- LPF Locked Loop Centralized array relies on a single LO source, however, LO power of each unit scales down as array scales up Long LO feed lines are lossy and hard to route De-Centralized array ensures every unit having an LO source LO sources are coherently coupled; corporate feed is thus eliminated Oscillator power requirement is relaxed Bonus: LO phase noise improves as more units are coupled Phase Noise (dbc/hz, f =1MHz) Number of Coupled Units 11

12 Challenges of Scaling and Our Solutions Sensing Pixel On-Chip Antennas Sub-THz Mixers Coupled Local Oscillators f IF Sub-THz LO Signal, f LO Reference Clock, f ref Density challenge: Within λ/2 λ/2 area, antenna, oscillator, mixer, coupler etc. needs to be incorporated Phase/Frequency Control, v ctrl On-Chip Sub-THz PLL N PFD On-Chip Phase- LPF Locked Loop 12

13 Challenges of Scaling and Our Solutions λ RF / 2 λrf / 2 λrf / 4 RF Receiving from Pattern 1 Data Processing RF Receiving from Pattern 2 Data Processing Density challenge: Within λ/2 λ/2 area, antenna, oscillator, mixer, coupler etc. needs to be incorporated 32 IF Signals MUX (off-chip) V ctrl LO Signal Self-Oscillating Harmonic Mixer (SOHM) Slot Antenna LPF Charge Pump PFD Divider Chain ILFD ( ) 75-MHz Reference Slotline w/ LO signal LO Coupling 13

14 Challenges of Scaling and Our Solutions λ RF / 2 λrf / 2 λrf / 4 RF Receiving from Pattern 1 Data Processing RF Receiving from Pattern 2 Data Processing Density challenge: Within λ/2 λ/2 area, antenna, oscillator, mixer, coupler etc. needs to be incorporated 32 IF Signals MUX (off-chip) Self-Oscillating harmonic mixer (SOHM) employed Oscillator and mixer condensed into one component V ctrl LPF Charge Pump PFD Divider Chain ILFD ( ) 75-MHz Reference LO Signal Self-Oscillating Harmonic Mixer (SOHM) Slotline w/ LO signal Slot Antenna LO Coupling Slotline-resonator-based oscillator coupling employed Two interleaved 4x4 array integrated (A unit = λ/2 λ/2) 14

15 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 15

16 EM Structure of a Single Cell The array consists of 16 cells, each cell contains 2 units The boundaries of each unit is well-defined, as a result of LO coupler design The unit is structurally and electrically symmetric; a PEC boundary (AB) can be drawn in the middle at f 0 16

17 Highlight I: Multifunctional Structures 0 0 C 3 TL 4 TL 1 TL 2 TL 4 ' TL 1 ' EM structure as reference TL 3 TL 5 TL 3 ' TL 4 and TL 4 are slot antennas C 4 0 V IF V DD C 2 C 1 V ctrl TL 3 and TL 3 are resonator and coupler of oscillators TL 1, TL 1, TL 2, and TL 5 are integral components of oscillators 17

18 Highlight I: Multifunctional Structures C 3 TL 3 TL 4 TL 1 TL 2 TL 5 Virtual Ground C 2 C 1 18

19 Highlight I: Multifunctional Structures C 3 TL 3 TL 4 TL 1 TL 2 TL 5 Virtual Ground TL 1 Enhance instability Self-Feeding Oscillator M 1 C 1 TL 3 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 2 C 1 [Han et al., JSSC, 2013] 19

20 Highlight I: Multifunctional Structures C 3 V f,if f 0 TL 3 TL 4 TL 1 TL 2 TL 5 C 2 C 1 Virtual Ground Self-Feeding Oscillator TL 1 Enhance instability M 1 C 1 TL 3 TL 4 Coupler (Resonator I) Antenna (Resonator II) [Han et al., JSSC, 2013] TL 3 Down-converts V 2f0 from oscillator TL 1 + Receives V f,rf from antenna Oscillates 20

21 Highlight I: Multifunctional Structures V f,if f 0 TL 3 TL 4 TL 1 TL 2 TL 5 C 3 C 2 C 1 Virtual Ground Self-oscillating harmonic mixer (SOHM) can be regarded as an oscillator that Oscillates at f 0 = 120 GHz and simultaneously generates LO signal f LO = 2f 0 = 240 GHz Receives RF power from resonator (TL 4, Resonator II) Down-converts RF to IF, i.e. f IF = f RF 2f 0 (using the non-linearity of the transistor) TL 1 Enhance instability Self-Feeding Oscillator Oscillator is optimized to the optimal phase condition by choosing proper Z TL1 and φ TL1 M 1 C 1 TL 3 TL 4 Coupler (Resonator I) Antenna (Resonator II) [Han et al., JSSC, 2013] TL 3 Down-converts V 2f0 from oscillator TL 1 Oscillates + Receives V f,rf from antenna 21

22 Highlight II: Near-field Interference Resonator I and II are for coupling and radiation cancelling For explanation, E-field distributions are needed TL 1 TL 3 M 1 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 1 22

23 Highlight II: Near-field Interference at f 0 Resonator I and II are for coupling and radiation cancelling For explanation, E-field distributions are needed TL 1 TL 3 Theoretical prediction c d b a M 1 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 1 E- Field Power Flow TL2 TL5 At f 0 = f LO /2, waves in TL 3 induce coupling between oscillators E-Field polarizations in TL 3 and TL 4 of adjacent units ensure radiation cancellation at f 0 Full-wave Simulation (ports at drains are driven) TL 3 Dummy TL 4 C 3 Current Source TL 4 ' C 4 TL 3 ' TL 1 TL 2 TL 1 ' TL 5 23

24 Highlight II: Near-field Interference at 2f 0 Resonator I and II are for coupling and radiation cancelling For explanation, E-field distributions are needed Theoretical prediction TL 1 TL 3 M 1 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 1 E- Field Weak Power Leakage C gd TL2 TL5 LO Power Confinement At 2f 0 = f LO, waves are largely confined within the transistor Full-wave simulation (ports at drains are driven) Potential radiation is cancelled due to polarizations 24

25 Highlight II: Near-field Interference at f RF Resonator I and II are for coupling and radiation cancelling For explanation, E-field distributions are needed Theoretical prediction TL 1 TL 3 M 1 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 1 E- Field Power Injection TL2 TL5 At f RF, waves are received by antennas since they are from a far-field source with the same polarization Full-wave simulation (ports at antennas are driven) Down-converted IF signals are thus out-of-phase 25

26 Recap: Multi-functionality + Near-field Interference Resonator I and II are for coupling and radiation cancelling For explanation, E-field distributions are needed At 2f 0, waves are largely confined within the transistor Potential radiation is cancelled due to polarizations TL 1 TL 3 M 1 TL 4 Coupler (Resonator I) Antenna (Resonator II) C 1 At f 0, waves in TL 3 induce coupling between oscillators E-Field polarizations in TL 3 and TL 4 of adjacent units ensure radiation cancellation at f 0 At f RF, waves are received by antennas since they are from a far-field source with the same polarization E- Field Weak Power Leakage Cgd TL2 TL5 LO Power Confinement c d b a Power Flow TL2 Power Injection TL2 E- Field TL5 E- Field TL5 26

27 Simulation Results of SOHM Performance Directivity in E-Plane (dbi) DC Power per unit: 43.2 mw Conversion loss (CL): 16 db (with 50-Ω output load) Noise figure (NF): 46.5dB at f IF =5 MHz; 19.3 db at f IF =100 MHz Antenna peak directivity: 4.8 db; antenna efficiency: 40 % Theta (degree) Directivity in H-Plane (dbi) Simulated beam-steering results Phi (degree) IF Noise PSD (dbm/hz) Phase Noise of f 0 (dbc/hz) k 100k 1M 10M 100M 1G Frequency (Hz) Simulated IF noise floor k 10k 100k 1M 10M Frequency Offset (Hz) Simulated f 0 phase noise 27

28 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 28

29 Overview of the Phase Locking Circuitry Sub-THz LO Signal, f LO Reference Clock, f ref Phase/Frequency Control, v ctrl N PFD On-Chip Phase- LPF Locked Loop 29

30 Overview of the Phase Locking Circuitry Equivalent Circuit Pixel at Row 8, Col 2 Pixel at Row 8, Col 3 To Oscillators Sub-THz LO Signal, f LO AC Cap AC Cap Array Boundary V f0, DC 0 AC Cap 0 0 Open 0 Phase/Frequency Control, v ctrl Reference Clock, f ref N PFD On-Chip Phase- LPF Locked Loop ILFD Switch ILFD LO Power to ILFD ILFD 0 Bottom two pixel units inject a small amount of waves at f 0 = 120 GHz into the divider PLL components generate the VCO control voltage for the entire array Due to array-wide coupling, all units are locked 30

31 Design of the 120-GHz Divide-by-16 Divider V P V DD,osc 20 μm V DD 6 μm 6 μm V T 6 μm 6 μm V T 6 μm 6 μm V T 6 μm 6 μm V T V T 6 μm V DD, buf 0.29nH V f0 0.29nH V tune V DD, buf 0.54nH 2pF 10kΩ V B 10 μm 3 μm 4 μm 4 μm 10kΩ 0.54nH V f0/4, p 2pF 10kΩ V B 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 6 μm 1 μm V f0/16 V f0/4, n 1 st stage: div-by-4 ILFD, based on f inj = 4f osc mixing with 3f osc 2 nd stage: div-by-4 ILFD, based on injected signals modulating the current sources of the ring oscillator Total DC power consumption: 10.5 mw 31

32 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 32

33 Die Photo and Chip Packaging Details 1.4 mm IF Outputs MUX Output 1 MUX Output 2 MUX DC Biases 1.1 mm 2.0 mm 1.1 mm Array DC Biases MUX ADG726 Chip PLL DC Biases Drilled PCB CMOS Chip Interface Array High-Res Silicon Wafer Boundary Terminations ILFD & Buffers Dividers, PFD, Charge Pump Boundary Terminations V ctrl Output Reference Input Divider Output Hemispheric, High-Res Silicon Lens Technology: 65nm CMOS; chip area 2.8 mm 2 (1.21 mm 2 for the array) Silicon lens is attached to the backside of the chip (backside radiation) Off-Chip multiplexer is used to select the desired IF signal from 32 outputs 33

34 Overview of the Chip Measurement Power Supply LDO Board (ADP7157) DC Biases... f IF ZFL-500LN Amplifiers Agilent N9020A MXA Spectrum Analyzer 10cm VDI WR-3.4 Frequency Extender (TX Mode) -20 dbm Center: 73.2 MHz Span: 200 khz RBW: 10 Hz Chip f RF f LO / 3200 Silicon Lens Silicon Wafer 10 MHz Sync WR-3.4 Antenna f RF / dbm Keysight E-8257D Signal Generator HP 83732B Signal Generator Spectrum of the divider output Chip and PCB Spectrum Analyzer VDI WR-3.4 extender is used as the RF source VDI 220-to-320GHz Frequency Extender Frequency reference of the chip and the VDI source are synchronized Signal Generator Locking range of the array (obtained from divider output): GHz GHz 34

35 Measured IF Spectra at Low/High Frequencies 0 dbm Start: 1.0 MHz Stop: MHz RBW: 100 khz Flicker noise dominates until ~ 450 MHz (IF amp BW = 500 MHz) 4.6 MHz 475 MHz -100 dbm White Noise Floor IF noise spectrum (from spectrum analyzer) 35

36 Measured IF Spectra at Low/High Frequencies 0 dbm Start: 1.0 MHz Stop: MHz RBW: 100 khz Flicker noise dominates until ~ 450 MHz (IF amp BW = 500 MHz) 0 dbm 63 db SNR (normalized to 1-Hz RBW) Center: 4.60 MHz Span: 2.00 MHz RBW: 100 Hz 4.6-MHz IF Signal 4.6 MHz 475 MHz At 4.6 MHz (below corner frequency), SNR = 63 db (RBW = 1Hz) -100 dbm Noise Floor when RF Signal is Absent -100 dbm White Noise Floor At 475 MHz (beyond corner frequency), SNR = 87 db (RBW = 1Hz) IF spectrum (f IF = 4.6 MHz) 0 dbm Center: 475 MHz Span: 50.0 MHz RBW: 100 khz IF noise spectrum (from spectrum analyzer) Other pixels are also locked; they have similar responses, and their f IF all shifts simultaneously as f ref shifts 87 db SNR (normalized to 1-Hz RBW) -100 dbm 475-MHz IF Signal Noise Floor when RF Signal is Absent IF spectrum (f IF = 475 MHz) 36

37 Measured 4.6-MHz IF of Some Other Units Row 1, Col 3 Row 2, Col 2 Row 3, Col 4 Row 6, Col 3 Row 7, Col 2 Row 8, Col 2 37

38 Antenna Pattern and Performance Evaluation E-Plane Antenna Directivity (dbi) H-Plane Antenna Directivity (dbi) Measured Pattern -20 Simulated Pattern Theta (Degree) Measured and simulated antenna patterns (E-Plane) Measured Pattern Simulated Pattern Phi (Degree) Measured and simulated antenna patterns (H-Plane) Conversion gain (db) CG = P IF P RF, where P IF = P IF, analyzer G amp, and P RF = P RF, TX + D TX + G RX 20log 10 (λ/(4πd)) Noise figure (db) NF = P noise (-174 dbm) CG, where P noise = 10log 10 (10 (Pnoise, analyzer Gamp)/ ) (considering NF amp = 3dB) Here, we have G amp = 49 db, P RF,TX = -7.1 dbm, D TX = 24 dbi, D RX = 6.0 db, η RX = 40 % (simulated), λ = 1.28 mm, d = 0.1 m For f IF = 475 MHz (beyond corner frequency), CG = db, NF = 44.2 db Define Sensitivity = NEP 1000Hz = -174 dbm + NF + 30dB; for f IF = 475 MHz, Sensitivity = pw 38

39 Measured Phase Noise of the LO Signal Power Supply LDO Board (ADP7157) DC Biases... Agilent N9020A MXA Spectrum Analyzer VDI WR-3.4 Frequency Extender Near Field (RX Mode) ZFL-500LN Amplifiers 2f 0 - Δf -10 dbm -110 dbm Down-converted 2f 0 Center: 240 MHz Span: 2.00 MHz RBW: 20 Hz 0 dbc/hz -100 dbc/hz kHz Offset MHz Offset f LO / f 0 WR-3.4 Antenna Δf Spectrum of the leaked 2f 0 signal Measured phase noise of the 2f 0 signal Keysight E-8257D Signal Generator 10 MHz Sync HP 83732B Signal Generator VDI extender is placed very close to the chip to capture the leaked near-field radiation at 2f 0 Measured 2f 0 phase noise at 1 MHz offset is -84 dbc/hz 39

40 Performance Comparison References This Work [5] [1] [2] [3] Detection Method Heterodyne Detection Square-Law (Direct) Detection Array Size 4x8 8 4x4 Array Scalability Yes No Yes Yes Yes RF Frequency (GHz) Sensitivity (pw) DC Power (mw) Chip Area (mm 2 ) Technology 65nm CMOS 130nm SiGe 130nm CMOS 180nm SiGe 130nm SiGe Notes: Calculated based on P IF and P noise at f IF = 475 MHz 40

41 Performance Comparison References This Work [5] [1] [2] [3] Detection Method Heterodyne Detection Square-Law (Direct) Detection Array Size 4x8 8 4x4 Array Scalability Yes No Yes Yes Yes RF Frequency (GHz) Sensitivity (pw) DC Power (mw) Chip Area (mm 2 ) Technology 65nm CMOS 130nm SiGe 130nm CMOS 180nm SiGe 130nm SiGe Notes: Calculated based on P IF and P noise at f IF = 475 MHz 41

42 Outline Introduction Array Architecture Multi-functional Heterodyne Pixels Phase Locking Circuitry Measurement Results Conclusion 42

43 Conclusion For the first time, heterodyne receiver array has achieved large scale and high density that are comparable to those of square-law detector arrays Our array improves the sensitivity by 680x compared with the 8-unit heterodyne receiver array, and by 2400x compared with the best squarelaw detector arrays Scalability and sensitivity improvements make sub-thz array technology a more promising candidate for the implementation of high-resolution beamforming imagers in the future 43

44 Acknowledgement The authors would like to thank Guo Zhang, Jack Holloway and Dr. Xiang Yi at MIT for technical discussions Dr. Andrew Westwood and Kathleen Howard at Keysight Inc. for their support to the experimental instruments This work was supported by The National Science Foundation CAREER Award (ECCS ) Taiwan Semiconductor Manufacturing Company (TSMC) The Singapore-MIT Research Alliance 44

45 Heterodyne Sensing CMOS Array with High Density and Large Scale: A 240-GHz, 32-Unit Receiver Using a De-Centralized Architecture Zhi Hu, Cheng Wang, and Ruonan Han Massachusetts Institute of Technology Cambridge, MA, USA 45

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