Receiver Architecture

Transcription

1 Receiver Architecture Receiver basics Channel selection why not at RF? BPF first or LNA first? Direct digitization of RF signal Receiver architectures Sub-sampling receiver noise problem Heterodyne receiver image problem Super-heterodyne receiver more image problem Image-reject receivers Harley receiver Weaver architecture Homodyne (direct conversion, zero-if) DC offset Digital IF Wide-IF double-conversion Sliding IF Prof. C. Patrick Yue Slide 1

2 Fundamental Trade-off in Receiver Using one or more IF stages to relax the filter requirements, but need to deal with images Using image reject mixers with I&Q LO signals to eliminate the need of band-pass filters (to enable higher level of integration) RF ICs typically employ a combination of simple mixing with some image filtering and image reject mixing Prof. C. Patrick Yue Slide 2

3 Channel Selection at RF? GSM example: channel bandwidth is 200 khz, RF carriers at MHz Filter Q = 10 * RF / BW = 10 * 950 M / 200k = 47,500! (Impossible to achieve such high Q at RF, or too expensive!) Instead, we do band select, for GSM, the band is 25 MHz, so the filter Q required is 10 * RF / BW = 10 * 950 M / 25 M = 380, much more reasonable. Prof. C. Patrick Yue Slide 3

4 BPF First or LNA First? Trade-off between suppressing inter-modulation products due to interferers vs. noise figure BPF first: better interferer rejection, but higher noise figure due to the insertion loss of the filter LNA first: better noise figure, receiver can be desensitized due to interferers Interferers are bigger problem, so BPF first is adapted in all receivers Prof. C. Patrick Yue Slide 4

5 Receiver Using High-Speed DSP Directly sample the carrier at RF to facilitate the use of high-speed DSP. For input power ranging from 100 dbm (3.2 mvpeak) to 10 dbm (100 mvpeak), the ADC will need the following performance: A 1-GHz, 15-bit ADC is impossible to implement with reasonable power in the near future Prof. C. Patrick Yue Slide 5

6 Sub-Sampling Receiver Prof. C. Patrick Yue Slide 6

7 Noise in Sub-Sampling Receiver The noise floor is raised by a factor of 2m, where m is the sub-sampling factor Phase noise is increased by m 2 at the output of the sub-sampler Prof. C. Patrick Yue Slide 7

8 Heterodyne Receiver The KEY question in receiver design is at what stage to perform channel select? Easier to achieve high-q BPF at lower frequency, which favors lower IF, but Image rejection becomes difficult Another questions is should the LO (w LO ) be above or below carrier (w RF )? At mixer output Mixer output At mixer output Prof. C. Patrick Yue Slide 8

9 High-Side LO vs. Low-Side LO Advantage of using high-side LO the ease in tuning the LO over the desired band of frequencies choice of High Side LO is motivated by the ease in tuning the LO over the desired band of frequencies. Tuning of the LO is often done using a varactor. For a given voltage change (and varactor capacitance change), the LO frequency can be changed over a wider range of frequencies for a high-side LO compared to a low-side LO. Due to the limited linearity of the varactor, choice of the high-side LO results in improved linearity of the LO frequency with change in bias voltage. Due to this reason, the high-side LO s are more popular. Advantage of using low-side LO lower noise and power dissipation since operating at lower frequencies Another important consideration in the choice of high-side LO versus low-side LO is in the image frequencies that will be picked up. The choice of high-side LO versus low-side LO might be made based on the relative quietness of the image band in each case. Prof. C. Patrick Yue Slide 9

10 Image Reject Filter in Heterodyne Receiver Trade-off between sensitivity (image rejection) and selectivity (channel selection) dictates the choice of IF High-IF image reject filter easier to implement and provides better sensitivity Low-IF channel select filter easier to implement and gives better selectivity Both image reject BPF and channel select select BPF are difficult to implement on chip, which makes heterodyne receiver less attractive for monolithic RF transceiver Prof. C. Patrick Yue Slide 10

11 Half-IF Problem 2w LO A spurious tone at 0.5*IF (half way between w RF and w LO ) undergoes even harmonic distortion and generates a spur at (w RF + w LO ) at the input of the mixer, which mixes with the 2 nd harmonic of the LO to produce noise at (w RF w LO ). To suppress the half-if phenomenon minimize second-order distortion in the RF path (using differential circuits) maintain 50% duty cycle in the LO to reduce 2w LO Prof. C. Patrick Yue Slide 11

12 Channel Selection by Adjusting LO Frequency Tunable high-q bandpass filters are difficult and expensive to implement, so rather than tuning the BPF center frequency, the LO is changed depending on the desired channel For example, FM radios use 10.7 MHz as the fixed IF, to tune to the station at MHz, the LO is adjusted to MHz. Prof. C. Patrick Yue Slide 12

13 Super-heterodyne Receiver To relax the trade-off between sensitivity (image reject) and selectivity (channel select), we can introduce a second IF to the heterodyne receiver architecture, which results in a super-heterodyne receiver A super-heterodyne receiver is a heterodyne receiver with dual IFs A super-heterodyne receiver relaxes the bandpass filter Q at each stage by having more filter stages 950M 100M 10M Q overall = = = 4.75e6 100M 10M 200k Prof. C. Patrick Yue Slide 13

14 Secondary Image Problem in Superheterodyne Receiver The input spurious tone at w IM2 (at input of 1st mixer) = w RF + 2w LO2 will cause a secondary image tone at w LO2 + w IF2 at the input of the 2nd mixer. Example: given that w RF = 950 MHz, w LO1 = 1050 MHz, and w LO2 = 110 MHz w IF1 = 100 MHz and w IF2 = 10 MHz w IM2 = w IF2 + w LO2 + w LO1 = = 1170 MHz (= w RF + 2w LO2 ) Prof. C. Patrick Yue Slide 14

15 Another Source of Secondary Image The input spurious tone at 2w LO1 2w LO2 w RF will also cause a secondary image tone at w LO2 + w IF2 at the input of the second mixer Notice that the difference between 2w LO1 2w LO2 w RF and w LO1 is the same as the spurious tone in the previous slide Prof. C. Patrick Yue Slide 15

16 Channel Selection in Super-heterodyne Receiver There are three approaches Variable LO1 with fixed LO2 Requires very high precision in frequency synthesizer (temperature variation can be a big problem) Fixed LO1 with fixed LO2 Requires very wide tuning range in in frequency synthesizer Variable LO1 with variable LO2 Requires both LOs to track each other Prof. C. Patrick Yue Slide 16

17 Channel Selection in Super-heterodyne Receiver Variable LO1 and fixed LO2 Using a variable LO1and fixed LO2 makes the task of channel selection extremely challenging Example: In GSM we need to zero down on to a frequency such as MHz with increments of 0.2 MHz Fractional change in LO1frequency is 0.2 MHz / 950 MHz ~ 0.02% Total change in LO1 is 25 Hz / 950MHz ~ 2.5% Prof. C. Patrick Yue Slide 17

18 Channel Selection in Super-heterodyne Receiver Fixed LO1 and variable LO2 Using a fixed LO1 makes it easier to design LO1. Fixed frequency oscillators have the advantage that a lower phase noise can be obtained due to the lower PLL bandwidth that can be used Using a variable LO2 makes the task of channel selection much easier. Fractional change required in LO2 is 0.2 MHz / 100 MHz ~ 0.2%. Total change required in LO2 is 25 MHz / 100 MHz ~ 25% Requires wide tuning range VCO in the frequency synthesizer, need to the use of varactor in conjunction with switching capacitor arrays Prof. C. Patrick Yue Slide 18

19 More Filters => More Images => More Filters High-Q filters are hard to build and expensive Use more filters each with lower Q But that requires more mixing in the receive chain which leads to image problems and needs more filters So, are there any other way to suppress image without using filters? Prof. C. Patrick Yue Slide 19

20 Image Reject Receiver If the desired input is cosine <= Use cosine as the in-phase, I carrier <= Use sine as the quadrature-phase, Q carrier (w RF < w LO < w IM because we are using high-side LO) Prof. C. Patrick Yue Slide 20

21 Principle of Image Reject Receiver I and Q path use LO s that are 90 out of phase, cosine vs. sine Prof. C. Patrick Yue Slide 21

22 Principle of Image Reject Receiver 90 degree shift is added to the Q path, such that the output due to the image signal is 180 out of phase with respect to the image in the I path Prof. C. Patrick Yue Slide 22

23 Image Reject Receiver Question: Remember quadrature modulation using I&Q as two separate channels? How would it work in a image reject receiver architecture? Prof. C. Patrick Yue Slide 23

24 Hartley s Image Reject Receiver Prof. C. Patrick Yue Slide 24

25 Quadrature Generators Frequency dividers (covered in previous lecture) Polyphase filter Prof. C. Patrick Yue Slide 25

26 Polyphase Filter (1) Prof. C. Patrick Yue Slide 26

27 Polyphase Filter (2) Prof. C. Patrick Yue Slide 27

28 Practical Consideration in Polyphase Filter Design (lowers the output amplitudes) Prof. C. Patrick Yue Slide 28

29 Practical Implementation of Multi-Stage Polyphase Filter Using a ring topology to allows easy cascading of multiple stages Prof. C. Patrick Yue Slide 29

30 Practical Implementation of Multi-Stage Polyphase Filter With Qi and QBi absent, the polyphase filter reduces to the simple RC-CR The current configuration allows easy cascading of multiple stages Prof. C. Patrick Yue Slide 30

31 Practical Implementation of Multi-Stage Polyphase Filter With Qi and QBi absent, the polyphase filter reduces to the simple RC-CR The current configuration allows easy cascading of multiple stages Prof. C. Patrick Yue Slide 31

32 Practical Implementation of Multi-Stage Polyphase Filter Multi-stage broaden the bandwidth over which the amplitude of I and Q paths matches. Prof. C. Patrick Yue Slide 32

33 Image Rejection Ratio in Hartley Receiver For perfect image rejection, this term is equal to zero Why 4A 2? 5% of amplitude imbalance (~0.5 db) and 1 of phase mismatch result in approximately 30 db of IRR Prof. C. Patrick Yue Slide 33

34 Image Rejection Ratio Amplitude imbalance and phase mismatch in the I and Q paths limits the IRR Gain mismatch can usually be limited to < 0.5~1.0 db and phase error is around 1 2 Mismatch in mixers and LPFs also degrade IRR Typical image rejection ratio achievable on-chip is about db using Hartley architecture Prof. C. Patrick Yue Slide 34

35 Polar Plot of IRR Prof. C. Patrick Yue Slide 35

36 Applying Polyphase Filters in Hartley Receiver Quadrature LO can be generated by passing the output of the frequency synthesizer through a polyphase filter A 90 phase shift between I & Q signals is achieved by shifting the I-signal with 45 and the Q-signal with +45 Prof. C. Patrick Yue Slide 36

37 Adding the I and Q Paths Prof. C. Patrick Yue Slide 37

38 Complete Implementations of Hartley Receiver Prof. C. Patrick Yue Slide 38

39 Practical Considerations Image Rejection Requirement An overall image suppression of db is needed in most receiver (what determines the required image rejection?) With an appropriate choice of IF frequency (high enough), an image suppression of db can be achieved by the RF band select filter or the image reject filter (if necessary) Hartley s architecture provides an additional db image rejection bringing the overall image rejection to db Other mismatches in the I&Q paths limits the practical IRR to 25 to 30 db Mismatches between I&Q mixers, LPFs I&Q LO mismatches in amplitude and phase Polyphase filter Multi-stage improves I & Q matching over a wider bandwidth, but increases noise (thermal noise in the resistors) and power consumption (amplitude reduction) Practical implementation rarely uses more than 2 stages of RCCR Prof. C. Patrick Yue Slide 39

40 Image Rejection Ratio in Hartley Receiver For perfect image rejection, this term is equal to zero Why 4A 2? 5% of amplitude imbalance (~0.5 db) and 1 of phase mismatch result in approximately 30 db of IRR Prof. C. Patrick Yue Slide 40

41 Image Rejection Ratio Amplitude imbalance and phase mismatch in the I and Q paths limits the IRR Gain mismatch can usually be limited to < 0.5~1.0 db and phase error is around 1 2 Mismatch in mixers and LPFs also degrade IRR Typical image rejection ratio achievable on-chip is about db using Hartley architecture Prof. C. Patrick Yue Slide 41

42 Polar Plot of IRR Prof. C. Patrick Yue Slide 42

43 Applying Polyphase Filters in Hartley Receiver Quadrature LO can be generated by passing the output of the frequency synthesizer through a polyphase filter A 90 phase shift between I & Q signals is achieved by shifting the I-signal with 45 and the Q-signal with +45 Prof. C. Patrick Yue Slide 43

44 Adding the I and Q Paths Prof. C. Patrick Yue Slide 44

45 Complete Implementations of Hartley Receiver Prof. C. Patrick Yue Slide 45

46 Practical Considerations Image Rejection Requirement An overall image suppression of db is needed in most receiver (what determines the required image rejection?) With an appropriate choice of IF frequency (high enough), an image suppression of db can be achieved by the RF band select filter or the image reject filter (if necessary) Hartley s architecture provides an additional db image rejection bringing the overall image rejection to db Other mismatches in the I&Q paths limits the practical IRR to 25 to 30 db Mismatches between I&Q mixers, LPFs I&Q LO mismatches in amplitude and phase Polyphase filter Multi-stage improves I & Q matching over a wider bandwidth, but increases noise (thermal noise in the resistors) and power consumption (amplitude reduction) Practical implementation rarely uses more than 2 stages of RCCR Prof. C. Patrick Yue Slide 46

47 Weaver Architecture We have seen that a 90 phase shift is introduced between I & Q signals by mixing the incoming signal using cosine and sine LOs We need to achieve another 90 phase shift, such that the down-converted desired signal will remain in phase while the one due to the image spur will be become 180 out of phase. In Weaver architecture, the second down-conversion mixing is also performed with I&Q LOs to achieve another 90 phase shift between the I&Q paths Prof. C. Patrick Yue Slide 47

48 Second Quadrature Mixing in Weaver Architecture Note that a negative sine is used as the LO for the Q path to provide the +90 phase shift because the incoming desired signal is a positive sine wave and the image tone is negative sine wave Prof. C. Patrick Yue Slide 48

49 Weaver Receiver What happens if the desired input signal is a sine wave? Weaver architecture is sensitive to relative phase of the RF input and the LOs To support quadrature modulation (incoming signals in cosine and sine), the second mixing requires quadrature mixing to preserve the desired signal Prof. C. Patrick Yue Slide 49

50 Secondary Image Problem in Weaver Receiver Recall that there are two secondary image tones which can cause interference at w IF2 the one above w LO1 will appear as a negative sine wave at the input of the second mixer, so it will under go a total of 180 phase shift after the second down-conversion the one below w LO1 will appear as a positive sine wave (just like the desired signal) at the input of the second mixer, and it will become in-phase with its I-path counterpart BPF is used to remove this tone before the second mixer Prof. C. Patrick Yue Slide 50

51 Homodyne Receiver LO frequency is the same as the incoming RF carrier frequency Also known as direction conversion or zero-if receiver No more image problem to worry about But it will work only if the desired signal has symmetrical sidebands (known as double sideband modulation) Prof. C. Patrick Yue Slide 51

52 Homodyne Receiver Done in baseband using DSP Use quadrature mixing to separate the upper sideband signal and the lower sideband signal Quadrature mixing also removes the problem due to phase mismatch between the carriers and LO Use DSP to reconstruct the desired signal in the baseband Note that is the input signal has a 2 MHz bandwidth, the I&Q paths each need to have a bandwidth of 1 MHz Prof. C. Patrick Yue Slide 52

53 Quadrature Down-Conversion for Homodyne Receiver Q I If phase modulation is used, quadrature mixing converts the information in to the relative phase between I and Q signals. In the above example, the carrier is modulated using QPSK, hence f(t) is p/4, 3p/4, 5p/4, or 7p/4 Prof. C. Patrick Yue Slide 53

54 Homodyne Receiver Pros and Cons Advantages Remove the need for image reject BPF between LNA and mixer Channel select can be performed using LPF in stead of BPF Disadvantages DC offset (A BIG PROBLEM!!) LO leakage Strong interferer Time-varying offset LO with non-50% duty cycle Even order distortion in LNA 1/f noise I&Q gain and phase mismatch More stringent dynamic range and reverse isolation Prof. C. Patrick Yue Slide 54

55 DC Offset DC offset can be as large as 10 mv due to various sources The desired signal can be much small, e.g. 0.5 mv In order for the ADC to be able to resolve the desired signal, the IF amplifier needs to provide sufficient gain so the desired signal reaches the full scale of the ADC, e.g. 500mV With a gain of 1000, the DC offset will clearly saturate the ADC Prof. C. Patrick Yue Slide 55

56 DC Offset Due to LO Leakage LO signal can leak through the LO port to the RF port due to parasitic couplings and cause self mixing Prof. C. Patrick Yue Slide 56

57 DC Offset Due to Strong Interferer A strong interferer can leak through the RF port to the LO port due to parasitic couplings and cause self mixing Prof. C. Patrick Yue Slide 57

58 DC Offset Due to Time-Varying Offsets LO signal can leak through the antenna, radiate into the air and reflect from the surrounding and reach the RF port of the mixer Good LNA reverse isolation can suppress this effect Prof. C. Patrick Yue Slide 58

59 DC Offset Due to Non-50% Duty Cycle LOs If the duty cycle of the LO is not 50%, the output of the mixer will have a DC offset Prof. C. Patrick Yue Slide 59

60 DC Offset Due to Even Order Distortion in LNA In homodyne receivers we also need to consider even order distortion characterized by IIP2 Consider two strong interferers closely spaced in frequency being received atthe antenna. Second order distortion results in a difference frequency to appear at the output of the LNA. The mixer exhibits a finite amount of direct feedthrough; hence the difference frequency signal would end up at the output of the mixer corrupting the desired signal. For homodyne applications, the LNA should be designed to have high IIP2 in addition to high IIP3. Use differential circuit to reduce even order distortion Prof. C. Patrick Yue Slide 60

61 Reducing DC Offset with AC Coupling Requires huge AC coupling capacitor (too big to fit on a chip) Very slow settling time, for example, a 200-Hz cut-off implies a settling time of 2 ms, which can too long for most system Only works with zero DC modulation which has no data below the cut-off frequency of the HPF Prof. C. Patrick Yue Slide 61

62 Reducing DC Offset with Offset Cancellation Some systems such as TDMA, inherently contain time intervals during which the receiver is idle, which could be used to perform offset cancellation The output DC voltage accumulated on the capacitor during the idle time could be measured and subtracted from the output voltage of the mixer resulting in cancellation of the DC offset If the offset cancellation is performed at a sufficient rate, the time-varying DC offset can also be handled kt/c noise due to the switch must be considered An alternative is to have two sets of mixers so that, at any given moment, one is used while the other is having its offset cancelled Prof. C. Patrick Yue Slide 62

63 1/f Noise in Homodyne Receiver 1/f noise from the mixer presents a severe problem in the design of homodyne receivers since the 1/f noise spectrum falls in the same band as the down-converted output signal Prof. C. Patrick Yue Slide 63

64 I&Q Mismatch in Homodyne Receiver Ideal I&Q constellation I&Q constellation gain and phase mismatch Phase mismatch is a more severe problem than gain mismatch Deviation from the quadrature phase difference means that some of the I signals will appear in the Q channel and vice versa, which reduce SNR in both channels Can be compensated with DSP in the baseband using known data as training (or calibration) sequence Gain mismatch can be compensated by the variable gain IF amplifiers in the I&Q paths Prof. C. Patrick Yue Slide 64

65 Channel Selection in Homodyne Receiver Case 1: relaxes LPF noise requirements, demands higher linearity from IF amp Case 2: LPF needs to low noise figure, IF amp linearity requirement is relaxed Case 3: high linearity required in both IF amp and ADC, LPF performed in digital domain Which one will you choose? Prof. C. Patrick Yue Slide 65

66 Requirements on Homodyne Receiver Linear LNA (low IIP2 and IIP3) Linear mixers (to suppress DC offset) LOs operating at quadrature with precisely 50% duty cycle DC offsets in the range of uv Low 1/f Noise High degree of isolation and stability Prof. C. Patrick Yue Slide 66

67 Digital IF Receiver Commonly used for multi-band, multi-mode cellular phone applications The second stage of mixing and filtering in a super heterodyne (dual IF) architecture is performed in the digital domain After the first mixer, the signal is digitized by the A/D The quantization and thermal noise of the A/D cannot exceed a few uv for a good receiver The linearity of the A/D must be sufficiently high to suppress the intermodulation outputs from corrupting the desired signal Choice of the first IF is dictated by the speed of the A/D Typically, first IF is around 75 MHz with the ADC running at 150 to 200 MS/s and 9 to 11 bit resolution Prof. C. Patrick Yue Slide 67

68 Full Implementation of a Digital IF Hartley Receiver But we still need image reject BPF filter before the first mixer, which means that we need to go off-chip, can we do better? Prof. C. Patrick Yue Slide 68

69 Wide-IF Double Conversion Receiver The wide IF double conversion architecture is Weaver architecture with the IF2 = 0 As in a Weaver architecture, there are two stages of down-conversion The secondary image that plagues Weaver architecture is suppressed by using IF2=0 As in a homodyne receiver, additional mixers (hence the name double conversion) are required to correctly detect the signal The first LO is fixed and the second LO is tuned to the desired LO Because the first LO is fixed, easier trade-offs may be obtained with regard to a LO phase noise As in the case of homodyne architecture, channel select BPF is eliminated LO leakage problem is greatly suppressed since LO1 is not equal to the carrier frequency of the desired signal The only filter therefore required is the front-end band select filter Very good for monolithic implementation Prof. C. Patrick Yue Slide 69

70 Wide-IF Double Conversion Receiver Prof. C. Patrick Yue Slide 70

71 Sliding-IF Receiver Architecture Both the first and second LO are generated by the same frequency synthesizer Prof. C. Patrick Yue Slide 71

72 Sliding-IF Receiver Architecture Vary LO1 and LO2 together to perform essentially the same function as direct conversion No external IF filtering Channel selection at baseband with LPF Very high IF of 1GHz 3GHz image is 2GHz away from 5GHz signal Inherent bandpass filtering of 3GHz: 23dBc RF mixer: 5-4 = 1GHz (IF) and 5+4 = 9GHz No image-reject mixers required Prof. C. Patrick Yue Slide 72

73 Frequency Synthesizer for Sliding-IF Architecture LO RF is the first LO LO IF is the second LO Divid-by-4 in the divider chain produces I&Q LO IF with excellent quadrature properties Prof. C. Patrick Yue Slide 73

74 Receiver Architecture Trade-offs Prof. C. Patrick Yue Slide 74

75 References 1. Prof. M. Perrott, MIT Science/6-776Spring-2005/CourseHome/index.htm 2. Prof. L. Larson, UC San Diego ECE 265A and 265B lecture notes Prof. C. Patrick Yue Slide 75