Hot Topics and Cool Ideas in Scaled CMOS Analog Design
|
|
- Maurice Richards
- 5 years ago
- Views:
Transcription
1 Engineering Insights 2006 Hot Topics and Cool Ideas in Scaled CMOS Analog Design C. Patrick Yue ECE, UCSB October 27, 2006 Slide 1
2 Our Research Focus High-speed analog and RF circuits Device modeling, CAD and test methodology Interface circuits for emerging applications G1 G2 D1 D2 SS October 27, 2006 Slide 2
3 Outline Hot topics Design & Modeling Methodology Analog / RF / mm-wave standard cells Test Scribe-line RF performance screening circuits Circuit RF front-end, continuous-time equalizer Cool ideas Health monitoring silicon Summary October 27, 2006 Slide 3
4 Recent Evolution for RF SoC Lower power, cost and size RF Front-end Baseband DSP (D. Su, et al. ISSCC 2002.) 0.25-μm CMOS 5-GHz RF transceiver (S. Mehta, et al. ISSCC 2005.) 0.18-μm CMOS RF + baseband DSP But difficult to migrate towards 0.13-μm or 90-nm October 27, 2006 Slide 4
5 Challenges for RF/mm-wave SoC in Scaled CMOS High mask cost ($0.5M $1M) Lack of a streamline RF/mm-wave design flow Negative impact of technology scaling Device Process variations RF/mm-wave model uncertainty Interconnect parasitic variations Circuit Low voltage headroom due to reduced Vdd Develop a parasitic-aware RF/mm-wave modeling/design methodology Strongly depend on layout October 27, 2006 Slide 5
6 Overcome RF/mm-wave Modeling Uncertainty Stand-alone single device model is insufficient Accuracy limited by digital RC extraction RF/mm-wave model layout actual circuit layout Design Flexibility Model Scalability Design Automation Model Accuracy Scalable Analog/RF Sub-Circuit Cells Leverage the insight to optimal RF/mm-wave device layout Exploit the modularity of RF/mm-wave circuits at the sub-circuit level October 27, 2006 Slide 6
7 A Digital-Like Standard Cell Library for RF Design Optimized cell library Diff pair, cross-coupled, cascode Inductors and varactors Interconnects Parameterized cells (P-Cells) SKILL code based Process independent Import design rules from tech files Equivalent circuit models Assemble like Lego blocks Similar to digital standard cell based design flow October 27, 2006 Slide 7
8 Single-Transistor RF Cell Layout Gate Drain Source Bulk Folded multi-finger gate Reduce gate resistance Dummy poly-silicon gate Reduce mismatch Substrate contact ring Substrate resistance Modeling uncertainty Highly regular for better manufacturability Includes dummies in the cell template October 27, 2006 Slide 8
9 Parameterized RF/mm-wave Sub-Circuit Cells G2 G2 G1 G1 D S Cascode devices D BB Merged diffusion node D1 D2 SS G1 G2 BB Differential pair D1 D2 G1 G2 D1&G2 D SS D2&G1 BB Cross-coupled pair D1&G2 D2&G1 S No RC extraction needed within cell boundary Each cell has an equivalent circuit model including RC SS SS October 27, 2006 Slide 9
10 Cell Test Structures in 0.13-μm CMOS ACTIVE & PASSIVE DEVICES INTERCONNECTS 2.5 mm 5.0 mm October 27, 2006 Slide 10
11 Cell-Based RF Design Methodology Specifications System-Level Design Silicon re-spins RF Circuit-Level Synthesis Design Layout RF Sub-Circuit Cell Place Layout-Parasitic & Route Extracted (LPE) Simulation Iterations between schematic and layout Final Verification Tapeout / Fab / Chip Testing October 27, 2006 Slide 11
12 RF Performance Screening Using Cell-Based LC Oscillator Array LC oscillators with different loadings as process variation monitoring vehicles in scribe-line Screening individual parasitic components to identify yield hitters C 60C 0C Oscillation Frequency (GHz) Oscillation Frequencies Over PVT Corners Oscillator Case ID Number October 27, 2006 Slide 12
13 Scribe-Line Oscillator Array Layout and Testing PMOS Variable Resistor Inductor Varactor Zoom in on a single oscillator Buffer : Component : I/O Pad 80 μm Vbias GND Vtune Vout GND 800 μm VDD 5000 μm 80 μm Probe1 During bench testing Probe2 Moving Probe2 Vbias GND Vtune Vout GND Oscillator 1 (800 μm) VDD Vout GND VDD Oscillator 2 (700 μm) October 27, 2006 Slide 13
14 Outline Hot topics Design & Modeling Methodology Analog / RF / mm-wave standard cells Test Scribe-line RF performance screening circuits Circuit RF front-end, continuous-time equalizer Cool ideas Health monitoring silicon Summary October 27, 2006 Slide 14
15 UWB (3 5-GHz) RF Front-End Down-conversion Mixer Wideband LNA Vdd LOdc RFdc Vbias IF+ LO+ GND GND RF+ GND RF- IF- LO- GND Integrate the components between antenna and the transceiver Key to cost-effective, small form-factor multi-mode or MIMO systems Antenna Switch October 27, 2006 Slide 15
16 CMOS T/R Switch with LC-tuned Substrate Bias October 27, 2006 Slide 16
17 UWB LNA with On-Chip Transformer Matching Network V DD R load L load M 3 V BIAS M 2 RF out RF in K C c M 1 C p L ps L ss C d L s Input matching source degeneration inductor wide-band transformer Operate from GHz, draws 6.7 mw from 1.2-V Vdd NF < 4.7 db, S21 > 13.7 db, S11 < 10.4 db, S22 < 13.1 db October 27, 2006 Slide 17
18 A 1-V, 3.3-mW, UWB Mixer (Cell-Based) 1-V Vdd L 1 k 12 L 2 Vdd LOdc RFdc RF+ LO- RF- LO+ LO+ Vbias IF+ LO+ GND Vbias IF+ IF- IF- GND R L R L LO- GND Double balanced folded topology PMOS LO switches Broadband RF choke RF+ GND RF- Active chip area : 200μmX500μm Differential pair, inductor and interconnect sub-circuit cells October 27, 2006 Slide 18
19 High-Speed Adaptive Passive Equalizer input Z 0 Lossy Channel Passive EQ Filter LPF output Limiting Amplifier Control voltage: V C Differential Power Detector Adaptive Control Loop Passive filter for low-power operation Continuous-time (frequency domain) compensation No dependency on recovered clock October 27, 2006 Slide 19
20 Tunable Differential Passive Filter 210 ff 44 Ω 44 Ω S S In+ 540 ph Out+ G G Z 0 In V C M 0 (450 μ / 0.25 μ) 540 ph Out Z 0 S S 44 Ω 44 Ω 210 ff V C Broadband input and output matching PMOS in triode region for adjustable resistance LC components can be low-q (~3 at 3 GHz) Self-resonance frequency > 30 GHz October 27, 2006 Slide 20
21 Channel + Equalizer Frequency Response 10-dB GC Combined response has 8-dB gain difference between dc and 5 GHz Equalizer response (for 10 Gbps) Channel attenuation October 27, 2006 Slide 21
22 20-Gb/s Eye Diagrams Over CAT-5 Cables Equalizer Input Equalizer Output 2 m (10-dB loss at 10GHz) 5 m (20-dB loss at 10GHz) October 27, 2006 Slide 22
23 Outline Hot topics Design & Modeling Methodology Analog / RF / mm-wave standard cells Test Scribe-line RF performance screening circuits Circuit RF front-end, continuous-time equalizer Cool ideas Health monitoring silicon Summary October 27, 2006 Slide 23
24 Interface Circuits for Structural Health Monitoring Devices Active Sensing Patch - Dual sensing and actuation - Surface-mountable - Noninvasive and conformable Power Transmission Inductors - Near-field magnetic coupling Wireless Sensor Interface IC - Actuation and sensing circuits - Multiplexing of senor array - Wireless data transmission - Rectifier for AC to DC power conversion October 27, 2006 Slide 24
25 Implantable Bio-Chip for Communication Prosthesis Open questions for a wireless power delivery interface What is the optimal frequency to use? How much power can be transferred wirelessly? October 27, 2006 Slide 25
26 Power Transfer vs. Frequency -25 P in M on chip P OUT P out /P in (db) No Tissue With Tissue Theoretical Limit (MHz) October 27, 2006 Slide 26
27 Optimized Wireless Power Delivery Inductor at 200 MHz SGS Pad Operate at self-resonance as a LC-tank (Q tank = 11) Match R tank to R load for max power 810 μm Turns 13 Width 9 μm Spacing 5 μm L s R s C p 167 nh 19 Ω 3.7 pf RDL M8 M7 M6 M5 M4 2x3 inductor array Strapped metals No skin effect M4 thru RDL 5-μm metal 2.5-μm oxide October 27, 2006 Slide 27
28 Summary CMOS scaling offers many research opportunity due to paradigm shifts in design, modeling, and test methodologies Higher integration level is needed for multi-mode/mimo RF front-ends Channel equalization become important for >10-Gbps I/Os Increasing need for wireless data/power interface circuits for emerging applications October 27, 2006 Slide 28
A 2.4 GHZ RECEIVER IN SILICON-ON-SAPPHIRE MICHAEL PETERS. B.S., Kansas State University, 2009 A REPORT
A 2.4 GHZ RECEIVER IN SILICON-ON-SAPPHIRE by MICHAEL PETERS B.S., Kansas State University, 2009 A REPORT submitted in partial fulfillment of the requirements for the degree MASTER OF SCIENCE Department
More informationChapter 6. Case Study: 2.4-GHz Direct Conversion Receiver. 6.1 Receiver Front-End Design
Chapter 6 Case Study: 2.4-GHz Direct Conversion Receiver The chapter presents a 0.25-µm CMOS receiver front-end designed for 2.4-GHz direct conversion RF transceiver and demonstrates the necessity and
More information65-GHz Receiver in SiGe BiCMOS Using Monolithic Inductors and Transformers
65-GHz Receiver in SiGe BiCMOS Using Monolithic Inductors and Transformers Michael Gordon, Terry Yao, Sorin P. Voinigescu University of Toronto March 10 2006, UBC, Vancouver Outline Motivation mm-wave
More informationQuadrature GPS Receiver Front-End in 0.13μm CMOS: The QLMV cell
1 Quadrature GPS Receiver Front-End in 0.13μm CMOS: The QLMV cell Yee-Huan Ng, Po-Chia Lai, and Jia Ruan Abstract This paper presents a GPS receiver front end design that is based on the single-stage quadrature
More informationChallenges in Designing CMOS Wireless System-on-a-chip
Challenges in Designing CMOS Wireless System-on-a-chip David Su Atheros Communications Santa Clara, California IEEE Fort Collins, March 2008 Introduction Outline Analog/RF: CMOS Transceiver Building Blocks
More information95GHz Receiver with Fundamental Frequency VCO and Static Frequency Divider in 65nm Digital CMOS
95GHz Receiver with Fundamental Frequency VCO and Static Frequency Divider in 65nm Digital CMOS Ekaterina Laskin, Mehdi Khanpour, Ricardo Aroca, Keith W. Tang, Patrice Garcia 1, Sorin P. Voinigescu University
More informationISSCC 2006 / SESSION 33 / MOBILE TV / 33.4
33.4 A Dual-Channel Direct-Conversion CMOS Receiver for Mobile Multimedia Broadcasting Vincenzo Peluso, Yang Xu, Peter Gazzerro, Yiwu Tang, Li Liu, Zhenbiao Li, Wei Xiong, Charles Persico Qualcomm, San
More informationSP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver
SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver Arvin R. Shahani, Derek K. Shaeffer, Thomas H. Lee Stanford University, Stanford, CA At submicron channel lengths, CMOS is
More informationISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.2
ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.2 20.2 A Digitally Calibrated 5.15-5.825GHz Transceiver for 802.11a Wireless LANs in 0.18µm CMOS I. Bouras 1, S. Bouras 1, T. Georgantas
More informationDESIGN ANALYSIS AND COMPARATIVE STUDY OF RF RECEIVER FRONT-ENDS IN 0.18-µM CMOS
International Journal of Electrical and Electronics Engineering Research Vol.1, Issue 1 (2011) 41-56 TJPRC Pvt. Ltd., DESIGN ANALYSIS AND COMPARATIVE STUDY OF RF RECEIVER FRONT-ENDS IN 0.18-µM CMOS M.
More informationA 2.6GHz/5.2GHz CMOS Voltage-Controlled Oscillator*
WP 23.6 A 2.6GHz/5.2GHz CMOS Voltage-Controlled Oscillator* Christopher Lam, Behzad Razavi University of California, Los Angeles, CA New wireless local area network (WLAN) standards have recently emerged
More informationFully integrated CMOS transmitter design considerations
Semiconductor Technology Fully integrated CMOS transmitter design considerations Traditionally, multiple IC chips are needed to build transmitters (Tx) used in wireless communications. The difficulty with
More informationMeasurement and Modeling of CMOS Devices in Short Millimeter Wave. Minoru Fujishima
Measurement and Modeling of CMOS Devices in Short Millimeter Wave Minoru Fujishima Our position We are circuit designers. Our final target is not device modeling, but chip demonstration. Provided device
More informationSignal Integrity Design of TSV-Based 3D IC
Signal Integrity Design of TSV-Based 3D IC October 24, 21 Joungho Kim at KAIST joungho@ee.kaist.ac.kr http://tera.kaist.ac.kr 1 Contents 1) Driving Forces of TSV based 3D IC 2) Signal Integrity Issues
More information5.4: A 5GHz CMOS Transceiver for IEEE a Wireless LAN
5.4: A 5GHz CMOS Transceiver for IEEE 802.11a Wireless LAN David Su, Masoud Zargari, Patrick Yue, Shahriar Rabii, David Weber, Brian Kaczynski, Srenik Mehta, Kalwant Singh, Sunetra Mendis, and Bruce Wooley
More informationAn Inductor-Based 52-GHz 0.18 µm SiGe HBT Cascode LNA with 22 db Gain
An Inductor-Based 52-GHz 0.18 µm SiGe HBT Cascode LNA with 22 db Gain Michael Gordon, Sorin P. Voinigescu University of Toronto Toronto, Ontario, Canada ESSCIRC 2004, Leuven, Belgium Outline Motivation
More informationCHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN
93 CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN 4.1 INTRODUCTION Ultra Wide Band (UWB) system is capable of transmitting data over a wide spectrum of frequency bands with low power and high data
More informationISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5
ISSCC 2003 / SESSION 20 / WIRELESS LOCAL AREA NETWORKING / PAPER 20.5 20.5 A 2.4GHz CMOS Transceiver and Baseband Processor Chipset for 802.11b Wireless LAN Application George Chien, Weishi Feng, Yungping
More informationLow-Noise Amplifiers
007/Oct 4, 31 1 General Considerations Noise Figure Low-Noise Amplifiers Table 6.1 Typical LNA characteristics in heterodyne systems. NF IIP 3 db 10 dbm Gain 15 db Input and Output Impedance 50 Ω Input
More informationPassive Device Characterization for 60-GHz CMOS Power Amplifiers
Passive Device Characterization for 60-GHz CMOS Power Amplifiers Kenichi Okada, Kota Matsushita, Naoki Takayama, Shogo Ito, Ning Li, and Akira Tokyo Institute of Technology, Japan 2009/4/20 Motivation
More informationA HIGH FIGURE-OF-MERIT LOW PHASE NOISE 15-GHz CMOS VCO
82 Journal of Marine Science and Technology, Vol. 21, No. 1, pp. 82-86 (213) DOI: 1.6119/JMST-11-123-1 A HIGH FIGURE-OF-MERIT LOW PHASE NOISE 15-GHz MOS VO Yao-hian Lin, Mei-Ling Yeh, and hung-heng hang
More informationSiNANO-NEREID Workshop:
SiNANO-NEREID Workshop: Towards a new NanoElectronics Roadmap for Europe Leuven, September 11 th, 2017 WP3/Task 3.2 Connectivity RF and mmw Design Outline Connectivity, what connectivity? High data rates
More informationAspemyr, Lars; Jacobsson, Harald; Bao, Mingquan; Sjöland, Henrik; Ferndal, Mattias; Carchon, G
A 15 GHz and a 2 GHz low noise amplifier in 9 nm RF CMOS Aspemyr, Lars; Jacobsson, Harald; Bao, Mingquan; Sjöland, Henrik; Ferndal, Mattias; Carchon, G Published in: Topical Meeting on Silicon Monolithic
More informationLong Range Passive RF-ID Tag With UWB Transmitter
Long Range Passive RF-ID Tag With UWB Transmitter Seunghyun Lee Seunghyun Oh Yonghyun Shim seansl@umich.edu austeban@umich.edu yhshim@umich.edu About RF-ID Tag What is a RF-ID Tag? An object for the identification
More informationISSCC 2006 / SESSION 10 / mm-wave AND BEYOND / 10.1
10.1 A 77GHz 4-Element Phased Array Receiver with On-Chip Dipole Antennas in Silicon A. Babakhani, X. Guan, A. Komijani, A. Natarajan, A. Hajimiri California Institute of Technology, Pasadena, CA Achieving
More informationWide-Band Two-Stage GaAs LNA for Radio Astronomy
Progress In Electromagnetics Research C, Vol. 56, 119 124, 215 Wide-Band Two-Stage GaAs LNA for Radio Astronomy Jim Kulyk 1,GeWu 2, Leonid Belostotski 2, *, and James W. Haslett 2 Abstract This paper presents
More informationDESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM
Progress In Electromagnetics Research C, Vol. 9, 25 34, 2009 DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM S.-K. Wong and F. Kung Faculty of Engineering Multimedia University
More informationAn Analog Phase-Locked Loop
1 An Analog Phase-Locked Loop Greg Flewelling ABSTRACT This report discusses the design, simulation, and layout of an Analog Phase-Locked Loop (APLL). The circuit consists of five major parts: A differential
More informationRFIC DESIGN EXAMPLE: MIXER
APPENDIX RFI DESIGN EXAMPLE: MIXER The design of radio frequency integrated circuits (RFIs) is relatively complicated, involving many steps as mentioned in hapter 15, from the design of constituent circuit
More informationBluetooth Receiver. Ryan Rogel, Kevin Owen I. INTRODUCTION
1 Bluetooth Receiver Ryan Rogel, Kevin Owen Abstract A Bluetooth radio front end is developed and each block is characterized. Bits are generated in MATLAB, GFSK endcoded, and used as the input to this
More informationAVoltage Controlled Oscillator (VCO) was designed and
1 EECE 457 VCO Design Project Jason Khuu, Erik Wu Abstract This paper details the design and simulation of a Voltage Controlled Oscillator using a 0.13µm process. The final VCO design meets all specifications.
More informationA 1.9GHz Single-Chip CMOS PHS Cellphone
A 1.9GHz Single-Chip CMOS PHS Cellphone IEEE JSSC, Vol. 41, No.12, December 2006 William Si, Srenik Mehta, Hirad Samavati, Manolis Terrovitis, Michael Mack, Keith Onodera, Steve Jen, Susan Luschas, Justin
More informationDesigning a 960 MHz CMOS LNA and Mixer using ADS. EE 5390 RFIC Design Michelle Montoya Alfredo Perez. April 15, 2004
Designing a 960 MHz CMOS LNA and Mixer using ADS EE 5390 RFIC Design Michelle Montoya Alfredo Perez April 15, 2004 The University of Texas at El Paso Dr Tim S. Yao ABSTRACT Two circuits satisfying the
More informationA Low Power Integrated UWB Transceiver with Solar Energy Harvesting for Wireless Image Sensor Networks
A Low Power Integrated UWB Transceiver with Solar Energy Harvesting for Wireless Image Sensor Networks Minjoo Yoo / Jaehyuk Choi / Ming hao Wang April. 13 th. 2009 Contents Introduction Circuit Description
More informationAbove 200 GHz On-Chip CMOS Frequency Generation, Transmission and Receiving
Above 200 GHz On-Chip CMOS Frequency Generation, Transmission and Receiving Bassam Khamaisi and Eran Socher Department of Physical Electronics Faculty of Engineering Tel-Aviv University Outline Background
More informationAnalog Circuits and Signal Processing. Series Editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada
Analog Circuits and Signal Processing Series Editors Mohammed Ismail, Dublin, USA Mohamad Sawan, Montreal, Canada More information about this series at http://www.springer.com/series/7381 Marco Vigilante
More informationMultimode 2.4 GHz Front-End with Tunable g m -C Filter. Group 4: Nick Collins Trevor Hunter Joe Parent EECS 522 Winter 2010
Multimode 2.4 GHz Front-End with Tunable g m -C Filter Group 4: Nick Collins Trevor Hunter Joe Parent EECS 522 Winter 2010 Overview Introduction Complete System LNA Mixer Gm-C filter Conclusion Introduction
More informationCase Study: Osc2 Design of a C-Band VCO
MICROWAVE AND RF DESIGN Case Study: Osc2 Design of a C-Band VCO Presented by Michael Steer Reading: Chapter 20, 20.5,6 Index: CS_Osc2 Based on material in Microwave and RF Design: A Systems Approach, 2
More information433MHz front-end with the SA601 or SA620
433MHz front-end with the SA60 or SA620 AN9502 Author: Rob Bouwer ABSTRACT Although designed for GHz, the SA60 and SA620 can also be used in the 433MHz ISM band. The SA60 performs amplification of the
More informationSynthesis of Optimal On-Chip Baluns
Synthesis of Optimal On-Chip Baluns Sharad Kapur, David E. Long and Robert C. Frye Integrand Software, Inc. Berkeley Heights, New Jersey Yu-Chia Chen, Ming-Hsiang Cho, Huai-Wen Chang, Jun-Hong Ou and Bigchoug
More informationInsights Into Circuits for Frequency Synthesis at mm-waves Andrea Mazzanti Università di Pavia, Italy
RFIC2014, Tampa Bay June 1-3, 2014 Insights Into Circuits for Frequency Synthesis at mm-waves Andrea Mazzanti Università di Pavia, Italy High data rate wireless networks MAN / LAN PAN ~7GHz of unlicensed
More informationQuiz2: Mixer and VCO Design
Quiz2: Mixer and VCO Design Fei Sun and Hao Zhong 1 Question1 - Mixer Design 1.1 Design Criteria According to the specifications described in the problem, we can get the design criteria for mixer design:
More informationA 1MHz-64MHz Active RC TI-LPF with Variable Gain for SDR Receiver in 65-nm CMOS
2017 5th International Conference on Computer, Automation and Power Electronics (CAPE 2017) A 1MHz-64MHz Active RC TI-LPF with Variable Gain for SDR Receiver in 65-nm CMOS Chaoxuan Zhang1, a, *, Xunping
More informationEvaluating and Optimizing Tradeoffs in CMOS RFIC Upconversion Mixer Design. by Dr. Stephen Long University of California, Santa Barbara
Evaluating and Optimizing Tradeoffs in CMOS RFIC Upconversion Mixer Design by Dr. Stephen Long University of California, Santa Barbara It is not easy to design an RFIC mixer. Different, sometimes conflicting,
More informationA 10-GHz CMOS LC VCO with Wide Tuning Range Using Capacitive Degeneration
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.6, NO.4, DECEMBER, 2006 281 A 10-GHz CMOS LC VCO with Wide Tuning Range Using Capacitive Degeneration Tae-Geun Yu, Seong-Ik Cho, and Hang-Geun Jeong
More informationA GSM Band Low-Power LNA 1. LNA Schematic
A GSM Band Low-Power LNA 1. LNA Schematic Fig1.1 Schematic of the Designed LNA 2. Design Summary Specification Required Simulation Results Peak S21 (Gain) > 10dB >11 db 3dB Bandwidth > 200MHz (
More informationISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.8
ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.8 26.8 A 2GHz CMOS Variable-Gain Amplifier with 50dB Linear-in-Magnitude Controlled Gain Range for 10GBase-LX4 Ethernet Chia-Hsin Wu, Chang-Shun Liu,
More informationLow Noise Amplifier Design
THE UNIVERSITY OF TEXAS AT DALLAS DEPARTMENT OF ELECTRICAL ENGINEERING EERF 6330 RF Integrated Circuit Design (Spring 2016) Final Project Report on Low Noise Amplifier Design Submitted To: Dr. Kenneth
More informationECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012
ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012 Lecture 5: Termination, TX Driver, & Multiplexer Circuits Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements
More informationSignal Integrity Modeling and Measurement of TSV in 3D IC
Signal Integrity Modeling and Measurement of TSV in 3D IC Joungho Kim KAIST joungho@ee.kaist.ac.kr 1 Contents 1) Introduction 2) 2.5D/3D Architectures with TSV and Interposer 3) Signal integrity, Channel
More informationA LOW POWER CMOS TRANSCEIVER DESIGN FOR MEDICAL IMPANT COMMUNICATION SERVICE
A LOW POWER CMOS TRANSCEIVER DESIGN FOR MEDICAL IMPANT COMMUNICATION SERVICE Huseyin S Savci, Pin Ying, Zheng Wang and Prof. Numan S. Dogan North Carolina A&T State University An ultra low power CMOS transceiver
More information6.776 High Speed Communication Circuits Lecture 6 MOS Transistors, Passive Components, Gain- Bandwidth Issue for Broadband Amplifiers
6.776 High Speed Communication Circuits Lecture 6 MOS Transistors, Passive Components, Gain- Bandwidth Issue for Broadband Amplifiers Massachusetts Institute of Technology February 17, 2005 Copyright 2005
More informationTHERE is currently a great deal of activity directed toward
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 32, NO. 12, DECEMBER 1997 2097 A 2.5-GHz BiCMOS Transceiver for Wireless LAN s Robert G. Meyer, Fellow IEEE, William D. Mack, Senior Member IEEE, and Johannes
More informationAnalog and RF circuit techniques in nanometer CMOS
Analog and RF circuit techniques in nanometer CMOS Bram Nauta University of Twente The Netherlands http://icd.ewi.utwente.nl b.nauta@utwente.nl UNIVERSITY OF TWENTE. Outline Introduction Balun-LNA-Mixer
More informationEDA Toolsets for RF Design & Modeling
Yiannis Moisiadis, Errikos Lourandakis, Sotiris Bantas Helic, Inc. 101 Montgomery str., suite 1950 San Fransisco, CA 94104, USA Email: {moisiad, lourandakis, s.bantas}@helic.com Abstract This paper presents
More informationHigh-Linearity CMOS. RF Front-End Circuits
High-Linearity CMOS RF Front-End Circuits Yongwang Ding Ramesh Harjani iigh-linearity CMOS tf Front-End Circuits - Springer Library of Congress Cataloging-in-Publication Data A C.I.P. Catalogue record
More informationEE 434 ASIC and Digital Systems. Prof. Dae Hyun Kim School of Electrical Engineering and Computer Science Washington State University.
EE 434 ASIC and Digital Systems Prof. Dae Hyun Kim School of Electrical Engineering and Computer Science Washington State University Preliminaries VLSI Design System Specification Functional Design RTL
More informationMICROWIND2 DSCH2 8. Converters /11/00
8-9 05/11/00 Fig. 8-7. Effect of sampling The effect of sample and hold is illustrated in figure 8-7. When sampling, the transmission gate is turned on so that the sampled data DataOut reaches the value
More informationCMOS VLSI IC Design. A decent understanding of all tasks required to design and fabricate a chip takes years of experience
CMOS VLSI IC Design A decent understanding of all tasks required to design and fabricate a chip takes years of experience 1 Commonly used keywords INTEGRATED CIRCUIT (IC) many transistors on one chip VERY
More informationRF9986. Micro-Cell PCS Base Stations Portable Battery Powered Equipment
RF996 CDMA/TDMA/DCS900 PCS Systems PHS 500/WLAN 2400 Systems General Purpose Down Converter Micro-Cell PCS Base Stations Portable Battery Powered Equipment The RF996 is a monolithic integrated receiver
More informationETI , Good luck! Written Exam Integrated Radio Electronics. Lund University Dept. of Electroscience
und University Dept. of Electroscience EI170 Written Exam Integrated adio Electronics 2010-03-10, 08.00-13.00 he exam consists of 5 problems which can give a maximum of 6 points each. he total maximum
More informationTHE 7-GHz unlicensed band around 60 GHz offers the possibility
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 1, JANUARY 2006 17 A 60-GHz CMOS Receiver Front-End Behzad Razavi, Fellow, IEEE Abstract The unlicensed band around 60 GHz can be utilized for wireless
More informationRF/Microwave Circuits I. Introduction Fall 2003
Introduction Fall 03 Outline Trends for Microwave Designers The Role of Passive Circuits in RF/Microwave Design Examples of Some Passive Circuits Software Laboratory Assignments Grading Trends for Microwave
More informationT. Taris, H. Kraïmia, JB. Begueret, Y. Deval. Bordeaux, France. 12/15-16, 2011 Lauzanne, Switzerland
1 MOSFET Modeling for Ultra Low-Power RF Design T. Taris, H. Kraïmia, JB. Begueret, Y. Deval Bordeaux, France 2 Context More services in Environment survey Energy management Process optimisation Aging
More informationAn 8mA, 3.8dB NF, 40dB Gain CMOS Front-End for GPS Applications
An 8mA, 3.8dB NF, 40dB Gain CMOS Front-End for GPS Applications F. Svelto S. Deantoni, G. Montagna R. Castello Dipartimento di Ingegneria Studio di Microelettronica Dipartimento di Elettronica Università
More informationLecture 160 Examples of CDR Circuits in CMOS (09/04/03) Page 160-1
Lecture 160 Examples of CDR Circuits in CMOS (09/04/03) Page 160-1 LECTURE 160 CDR EXAMPLES INTRODUCTION Objective The objective of this presentation is: 1.) Show two examples of clock and data recovery
More informationA 10Gbps Analog Adaptive Equalizer and Pulse Shaping Circuit for Backplane Interface
Proceedings of the 5th WSEAS Int. Conf. on CIRCUITS, SYSTEMS, ELECTRONICS, CONTROL & SIGNAL PROCESSING, Dallas, USA, November 1-3, 2006 225 A 10Gbps Analog Adaptive Equalizer and Pulse Shaping Circuit
More informationLC VCO Design Procedure
L VO Design Procedure 116 UMTS VO VO design parameters Design requirement Oscillating frequency 2.1GHz Tuning range 400MHz Voltage swing 0.7V Phase noise -110dBc@1MHz Supply voltage 3V Power consumption
More informationA 2.4-GHz 24-dBm SOI CMOS Power Amplifier with Fully Integrated Output Balun and Switched Capacitors for Load Line Adaptation
A 2.4-GHz 24-dBm SOI CMOS Power Amplifier with Fully Integrated Output Balun and Switched Capacitors for Load Line Adaptation Francesco Carrara 1, Calogero D. Presti 2,1, Fausto Pappalardo 1, and Giuseppe
More informationECEN474/704: (Analog) VLSI Circuit Design Fall 2016
ECEN474/704: (Analog) VLSI Circuit Design Fall 2016 Lecture 1: Introduction Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements Turn in your 0.18um NDA form by Thursday Sep 1 No
More informationA Low Phase Noise LC VCO for 6GHz
A Low Phase Noise LC VCO for 6GHz Mostafa Yargholi 1, Abbas Nasri 2 Department of Electrical Engineering, University of Zanjan, Zanjan, Iran 1 yargholi@znu.ac.ir, 2 abbas.nasri@znu.ac.ir, Abstract: This
More informationA 400 MHz 4.5 nw 63.8 dbm Sensitivity Wake-up Receiver Employing an Active Pseudo-Balun Envelope Detector
A 400 MHz 4.5 nw 63.8 dbm Sensitivity Wake-up Receiver Employing an Active Pseudo-Balun Envelope Detector Po-Han Peter Wang, Haowei Jiang, Li Gao, Pinar Sen, Young-Han Kim, Gabriel M. Rebeiz, Patrick P.
More informationDue to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible
A Forward-Body-Bias Tuned 450MHz Gm-C 3 rd -Order Low-Pass Filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V Supply Joeri Lechevallier 1,2, Remko Struiksma 1, Hani Sherry 2, Andreia Cathelin
More informationA 1.7-to-2.2GHz Full-Duplex Transceiver System with >50dB Self-Interference Cancellation over 42MHz Bandwidth
A 1.7-to-2.2GHz Full-Duplex Transceiver System with >50dB Self-Interference Cancellation Tong Zhang, Ali Najafi, Chenxin Su, Jacques C. Rudell University of Washington, Seattle Feb. 8, 2017 International
More informationA10-Gb/slow-power adaptive continuous-time linear equalizer using asynchronous under-sampling histogram
LETTER IEICE Electronics Express, Vol.10, No.4, 1 8 A10-Gb/slow-power adaptive continuous-time linear equalizer using asynchronous under-sampling histogram Wang-Soo Kim and Woo-Young Choi a) Department
More informationISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.4
ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.4 26.4 40Gb/s CMOS Distributed Amplifier for Fiber-Optic Communication Systems H. Shigematsu 1, M. Sato 1, T. Hirose 1, F. Brewer 2, M. Rodwell 2 1 Fujitsu,
More informationBasic Layout Techniques
Basic Layout Techniques Rahul Shukla Advisor: Jaime Ramirez-Angulo Spring 2005 Mixed Signal VLSI Lab Klipsch School of Electrical and Computer Engineering New Mexico State University Outline Transistor
More informationFrequency Synthesizers for RF Transceivers. Domine Leenaerts Philips Research Labs.
Frequency Synthesizers for RF Transceivers Domine Leenaerts Philips Research Labs. Purpose Overview of synthesizer architectures for RF transceivers Discuss the most challenging RF building blocks Technology
More informationHIGH-GAIN CMOS LOW NOISE AMPLIFIER FOR ULTRA WIDE-BAND WIRELESS RECEIVER
Progress In Electromagnetics Research C, Vol. 7, 183 191, 2009 HIGH-GAIN CMOS LOW NOISE AMPLIFIER FOR ULTRA WIDE-BAND WIRELESS RECEIVER A. Dorafshan and M. Soleimani Electrical Engineering Department Iran
More informationCHAPTER 1 INTRODUCTION
CHAPTER 1 INTRODUCTION 1.1 Historical Background Recent advances in Very Large Scale Integration (VLSI) technologies have made possible the realization of complete systems on a single chip. Since complete
More informationAn EM-aware methodology for a high-speed multi-protocol 28Gbps SerDes design with TSMC 16FFC
An EM-aware methodology for a high-speed multi-protocol 28Gbps SerDes design with TSMC 16FFC Bud Hunter, SerDes Analog IC Design Manager, Wipro Kelly Damalou, Sr. Technical Account Manager, Helic TSMC
More informationLF to 4 GHz High Linearity Y-Mixer ADL5350
LF to GHz High Linearity Y-Mixer ADL535 FEATURES Broadband radio frequency (RF), intermediate frequency (IF), and local oscillator (LO) ports Conversion loss:. db Noise figure:.5 db High input IP3: 25
More informationTHE BASIC BUILDING BLOCKS OF 1.8 GHZ PLL
THE BASIC BUILDING BLOCKS OF 1.8 GHZ PLL IN CMOS TECHNOLOGY L. Majer, M. Tomáška,V. Stopjaková, V. Nagy, and P. Malošek Department of Microelectronics, Slovak Technical University, Ilkovičova 3, Bratislava,
More informationCMOS RFIC Design for Direct Conversion Receivers. Zhaofeng ZHANG Supervisor: Dr. Jack Lau
CMOS RFIC Design for Direct Conversion Receivers Zhaofeng ZHANG Supervisor: Dr. Jack Lau Outline of Presentation Background Introduction Thesis Contributions Design Issues and Solutions A Direct Conversion
More informationA Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier
A Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier Kehul A. Shah 1, N.M.Devashrayee 2 1(Associative Prof., Department of Electronics and Communication,
More informationMP 4.3 Monolithic CMOS Distributed Amplifier and Oscillator
MP 4.3 Monolithic CMOS Distributed Amplifier and Oscillator Bendik Kleveland, Carlos H. Diaz 1 *, Dieter Vook 1, Liam Madden 2, Thomas H. Lee, S. Simon Wong Stanford University, Stanford, CA 1 Hewlett-Packard
More informationEECS 290C: Advanced circuit design for wireless Class Final Project Due: Thu May/02/2019
EECS 290C: Advanced circuit design for wireless Class Final Project Due: Thu May/02/2019 Project: A fully integrated 2.4-2.5GHz Bluetooth receiver. The receiver has LNA, RF mixer, baseband complex filter,
More informationCourse Project Topic: RF Down-Conversion Chain Due Dates: Mar. 27, Apr. 15 (Interim reports), May. 11 (Final report)
Course Project Topic: RF Down-Conversion Chain Due Dates: Mar. 27, Apr. 15 (Interim reports), May. 11 (Final report) 1 Objective The objective of this project is to familiarize the student with the trade-offs
More informationA Dual-Step-Mixing ILFD using a Direct Injection Technique for High- Order Division Ratios in 60GHz Applications
A Dual-Step-Mixing ILFD using a Direct Injection Technique for High- Order Division Ratios in 60GHz Applications Teerachot Siriburanon, Wei Deng, Ahmed Musa, Kenichi Okada, and Akira Matsuzawa Tokyo Institute
More informationA low-if 2.4 GHz Integrated RF Receiver for Bluetooth Applications Lai Jiang a, Shaohua Liu b, Hang Yu c and Yan Li d
Applied Mechanics and Materials Online: 2013-06-27 ISSN: 1662-7482, Vol. 329, pp 416-420 doi:10.4028/www.scientific.net/amm.329.416 2013 Trans Tech Publications, Switzerland A low-if 2.4 GHz Integrated
More informationCourse Project Topic: RF Down-Conversion Chain Due Dates: Mar. 24, Apr. 7 (Interim reports), Apr. 28 (Final report)
Course Project Topic: RF Down-Conversion Chain Due Dates: Mar. 24, Apr. 7 (Interim reports), Apr. 28 (Final report) 1 Objective The objective of this project is to familiarize the student with the trade-offs
More informationWafer-scale 3D integration of silicon-on-insulator RF amplifiers
Wafer-scale integration of silicon-on-insulator RF amplifiers The MIT Faculty has made this article openly available. Please share how this access benefits you. Your story matters. Citation As Published
More informationA Three-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique for 5dB NF
A Three-Stage 60GHz CMOS LNA Using Dual Noise-Matching Technique for 5dB NF Ning Li 1, Kenichi Okada 1, Toshihide Suzuki 2, Tatsuya Hirose 2 and Akira 1 1. Tokyo Institute of Technology, Japan 2. Advanced
More informationISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8
ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8 10.8 10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18µm CMOS Technology Sherif Galal, Behzad Razavi Electrical Engineering
More informationA Multiobjective Optimization based Fast and Robust Design Methodology for Low Power and Low Phase Noise Current Starved VCO Gaurav Sharma 1
IJSRD - International Journal for Scientific Research & Development Vol. 2, Issue 01, 2014 ISSN (online): 2321-0613 A Multiobjective Optimization based Fast and Robust Design Methodology for Low Power
More informationECEN474: (Analog) VLSI Circuit Design Fall 2011
ECEN474: (Analog) VLSI Circuit Design Fall 2011 Lecture 1: Introduction Sebastian Hoyos Analog & Mixed-Signal Center Texas A&M University Analog Circuit Sequence 326 2 Why is Analog Important? [Silva]
More informationRFIC2017. Fully-Scalable 2D THz Radiating Array: A 42-Element Source in 130-nm SiGe with 80-μW Total Radiated Power at 1.01THz
Student Paper Finalist Fully-Scalable 2D THz Radiating Array: A 42-Element Source in 130-nm SiGe with 80-μW Total Radiated Power at 1.01THz Zhi Hu and Ruonan Han MIT, Cambridge, MA, USA 1 Outline Motivation
More informationProject #3 for Electronic Circuit II
Project #3 for Electronic Circuit II Prof. Woo-Young Choi TA: Tongsung Kim, Minkyu Kim June 1, 2015 - Deadline : 6:00 pm on June 22, 2015. Penalties for late hand-in. - Team Students are expected to form
More informationEffect of Aging on Power Integrity of Digital Integrated Circuits
Effect of Aging on Power Integrity of Digital Integrated Circuits A. Boyer, S. Ben Dhia Alexandre.boyer@laas.fr Sonia.bendhia@laas.fr 1 May 14 th, 2013 Introduction and context Long time operation Harsh
More informationWiring Parasitics. Contact Resistance Measurement and Rules
Wiring Parasitics Contact Resistance Measurement and Rules Connections between metal layers and nonmetal layers are called contacts. Connections between metal layers are called vias. For non-critical design,
More information