TIP140, TIP141, TIP142, (NPN); TIP145, TIP146, TIP147, (PNP) Darlington Complementary Silicon Power Transistors
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1 TIP14, TIP141, TIP142, (); TIP145, TIP146, TIP147, () TIP141, TIP142, TIP146, and TIP147 are Preferred Devices Darlington Complementary Silicon Power Transistors Designed for generalpurpose amplifier and low frequency switching applications. Features High DC Current Gain Min h FE I C = A, V CE = 4 V CollectorEmitter Sustaining 3 ma V CEO(sus) = 6 Vdc (Min) TIP14, TIP145 = 8 Vdc (Min) TIP141, TIP146 = Vdc (Min) TIP142, TIP147 Monolithic Construction with BuiltIn BaseEmitter Shunt Resistor PbFree Packages are Available* MAXIMUM RATINGS Rating Symbol TIP14 TIP145 TIP141 TIP146 TIP142 TIP147 Unit Collector Emitter Voltage V CEO 6 8 Vdc Collector Base Voltage V CB 6 8 Vdc Emitter Base Voltage V EB Vdc Collector Current Continuous Peak (Note 1) I C 15 Adc Base Current Continuous I B.5 Adc Total Power T C = 25 C Operating and Storage Junction Temperature Range THERMAL CHARACTERISTICS P D 125 W T J, T stg 65 to +15 C Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase Thermal Resistance, JunctiontoAmbient R JC C/W R JA 35.7 C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected ms, % Duty Cycle. AMPERE DARLINGTON COMPLEMENTARY SILICON POWER TRANSISTORS 6 VOLTS, 125 WATTS CASE 34D STYLE 1 MARKING DIAGRAM AYWWG TIP14x A = Assembly Location Y = Year WW = Work Week TIP14x = Device Code x =, 1, 2, 5, 6, or 7 G = PbFree Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 25 September, 25 Rev. 5 1 Publication Order Number: TIP14/D
2 DARLINGTON SCHEMATICS TIP14 TIP141 TIP142 TIP145 TIP146 TIP147 BASE BASE 8. k 4 8. k 4 EMITTER EMITTER ORDERING INFORMATION Device Package Shipping TIP14 TIP14G (PbFree) TIP141 TIP141G (PbFree) TIP142 TIP142G (PbFree) TIP145 TIP145G (PbFree) TIP146 TIP146G (PbFree) TIP147 TIP147G (PbFree) 2
3 ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min ÎÎÎ Typ Max ÎÎÎ Unit OFF CHARACTERISTICS CollectorEmitter Sustaining Voltage (Note 2) V CEO(sus) Î Vdc (I C = 3 ma, I B = ) TIP14, TIP145ÎÎÎ 6 ÎÎÎ ÎÎÎ TIP141, TIP146 8 TIP142, TIP147ÎÎÎ ÎÎÎ ÎÎÎ Collector Cutoff Current I CEO Î ma (V CE = 3 Vdc, I B = ) TIP14, TIP145ÎÎÎ (V CE = 4 Vdc, I B = ) TIP141, TIP146 (V CE = 5 Vdc, I B = ) TIP142, TIP147 ÎÎÎ Î Collector Cutoff Current I CBO Î ma (V CB = 6 V, I E = ) TIP14, TIP145ÎÎÎ Î (V CB = 8 V, I E = ) TIP141, TIP146 (V CB = V, I E ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ = ) TIP142, TIP147 ÎÎ ÎÎÎ Emitter Cutoff Current (V BE = V) I EBO 2 ma ON CHARACTERISTICS (Note 2) DC Current Gain h (I C = A, ) FE ÎÎÎ (I C = A, ) ÎÎÎ 5 ÎÎÎ ÎÎÎ CollectorEmitter Saturation Voltage V CE(sat) Î Vdc (I C = A, I B = ma) (I C = A, I B = 4 ma) Î 3. BaseEmitter Saturation Voltage V BE(sat) Î (I C = A, I B = 4 ma) 3.5 ÎÎÎ ÎÎÎ Vdc BaseEmitter On Voltage V BE(on) ÎÎÎ 3. ÎÎÎ Vdc (I C = A, dc) SWITCHING CHARACTERISTICS Resistive Load (See Figure 1) Delay Time t d.15 s Î Rise Time (V CC = 3 V, I C = A, t r.55 s Î I B = 2 ma, Duty Cycle %, Storage Time I B1 = I B2, R C & R B Varied, T J = 25 C) t s 2.5 s Î Fall Time 2. Pulse Test: Pulse Width = 3 s, Duty Cycle %. t f 2.5 s R B & R C VARIED TO OBTAIN DESIRED CURRENT LEVELS D 1, MUST BE FAST RECOVERY TYPE, eg: 1N5825 USED ABOVE I B ma MSD6 USED BELOW I B ma V 2 approx +12 V V 1 appox. 8. V t r, t f ns DUTY CYCLE = % 25 s 51 Figure 1. Switching Times Test Circuit R B D V R C TUT 8. k 4 for t d and t r, D1 is disconnected and V 2 = For test circuit reverse diode and voltage polarities. V CC 3 V SCOPE t, TIME ( s) μ.5.2 t s.1.2 t f I C, CURRENT (AMP) Figure 2. Switching Times t r t V BE(off) = V CC = 3 V I C /I B = 25 I B1 = I B2 T J = 25 C 3
4 TYPICAL CHARACTERISTICS h FE, DC CURRENT GAIN V CE(SAT), EMITTER SATURATION VOLTAGE (VOLTS) TIP14, TIP141, TIP142 T J = 15 C C 25 C 55 C I C, CURRENT (AMPS) TIP145, TIP146, TIP147 Figure 3. DC Current Gain versus Collector Current I C = A, I B = 4. ma I C = A, I B = ma I C = A, I B = ma h FE, DC CURRENT GAIN V CE(SAT), EMITTER SATURATION VOLTAGE (VOLTS) 2,, Figure 4. CollectorEmitter Saturation Voltage T J = 15 C C 25 C 55 C I C, CURRENT (AMPS) I C = A, I B = 4. ma I C = A, I B = ma I C = A, I B = ma V BE, BASEEMITTER VOLTAGE (VOLTS) I C = A A A V BE, BASEEMITTER VOLTAGE (VOLTS) I C = A A A Figure 5. BaseEmitter Voltage 4
5 ACTIVEREGION SAFE OPERATING AREA There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 6 is based on T J(pk) = 15 C; T C is variable depending on conditions. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 2 I C, CURRENT (AMP) (ma) dc T J = 15 C SECONDARY BREAKDOWN LIMIT BONDING WIRE LIMIT THERMAL T C = 25 C TIP14, 145 TIP141, 146 TIP142, V CE, EMITTER VOLTAGE (VOLTS) I C, CURRENT (AMPS) mj L, UNCLAMPED INDUCTIVE LOAD (mh) Figure 6. ActiveRegion Safe Operating Area Figure 7. Unclamped Inductive Load INPUT MPSU R BB1 1.5 k R BB2 = V BB2 = V BB1 = V V CE MONITOR TUT mh V CC = 2 V I C MONITOR R S =.1 INPUT VOLTAGE CURRENT 1.42 A V CE(sat) 2 V VOLTAGE w 7. ms (SEE NOTE 1) V ms V (BR)CER TEST CIRCUIT NOTE 1: Input pulse width is increased until I CM = 1.42 A. VOLTAGE AND CURRENT WAVEFORMS NOTE 2: For test circuit reverse polarities. Figure 8. Inductive Load 5
6 h fe, SMALLSIGNAL FORWARD CURRENT TRANSFER RATIO V CE = V I C = A T J = 25 C f, FREQUENCY (MHz) Figure 9. Magnitude of Common Emitter SmallSignal ShortCircuit Forward Current Transfer Ratio P D, POWER DISSIPATION (WATTS) T A, FREEAIR TEMPERATURE ( C) Figure. FreeAir Temperature Power Derating 6
7 PACKAGE DIMENSIONS CASE 34D2 ISSUE E B Q E C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. K S L U V G 4 D A J H MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D E G H J K 3 REF 1.22 REF L Q S U 4. REF.157 REF V 1.75 REF.69 STYLE 1: PIN 1. BASE EMITTER 4. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 291 Kamimeguro, Meguroku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. TIP14/D
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