BDW42 NPN, BDW46, BDW47 PNP. Darlington Complementary Silicon Power Transistors

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1 BDW42 NPN,, BDW47 PNP BDW42 and BDW47 are Preferred Devices Darlington Complementary Silicon Power Transistors This series of plastic, medium power silicon NPN and PNP Darlington transistors are designed for general purpose and low speed switching applications. Features High DC Current Gain h FE = 2 I C = 5. Adc. Collector Emitter Sustaining 3 madc: V CEO(sus) = 8 Vdc (min) 1 Vdc (min) BDW42/BDW47 Low Collector Emitter Saturation Voltage V CE(sat) = Vdc I C = 5. Adc Vdc I C = 1. Adc Monolithic Construction with Built In Base Emitter Shunt resistors Compact Package Pb Free Packages Are Available* MAXIMUM RATINGS V Rating Symbol Value Unit Collector-Emitter Voltage V CEO Vdc BDW42, BDW Collector-Base Voltage Vdc BDW42, BDW47 CB 8 1 Emitter-Base Voltage V EB 5. Vdc Collector Current I C 15 Adc Base Current I B Adc Total Device T C = Derate above Operating and Storage Junction Temperature Range THERMAL CHARACTERISTICS P D W W/ C T J, T stg 55 to +1 C Characteristic Symbol Max Unit Thermal Resistance, R JC 1.47 C/W Junction to Case Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 15 AMP DARLINGTON COMPLEMENTARY SILICON POWER TRANSISTORS 8 1 VOLT, 85 WATT CASE 221A 9 STYLE 1 ORDERING INFORMATION MARKING DIAGRAM Device Package Shipping BDW42 Units/Rail BDW42G Units/Rail G BDW47 BDW47G BDWxx = Device Code x = 42, 46, or 47 A = Assembly Location Y = Year WW = Work Week G = Pb Free Package (Pb Free) (Pb Free) (Pb Free) BDWxx AYWWG Units/Rail Units/Rail Units/Rail Units/Rail *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Preferred devices are ON Semiconductor recommended choices for future use and best overall value Semiconductor Components Industries, LLC, 25 October, 25 Rev. 12 Publication Order Number: BDW42/D

2 Î ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min Î Max Unit Î OFF CHARACTERISTICS Collector Emitter Sustaining Voltage (Note 1) V CEO(sus) (I C = 3 madc, I B = ) ÎÎ 8 Î Vdc BDW42/BDW47 1 Collector Cutoff Current I CEO madc (V CE = 4 Vdc, I B = ) ÎÎ Î (V CE = Vdc, I B = ) BDW42/BDW47 Î Collector Cutoff Current I CBO madc (V CB = 8 Vdc, I E = ) ÎÎ Î (V CB = 1 Vdc, I E = ) BDW42/BDW47 Î Emitter Cutoff Current I (V BE = 5. Vdc, I C = ) EBO madc Î Î ON CHARACTERISTICS (Note 1) DC Current Gain h FE (I C = 5. Adc, V CE = 4. Vdc) 1 (I C = 1 Adc, V CE ÎÎ = 4. Vdc) 2 Collector Emitter Saturation Voltage V CE(sat) (I C = 5. Adc, I B = 1 madc) ÎÎ Î Vdc (I C = 1 Adc, I B = madc) Î Î Base Emitter On Voltage V BE(on) Vdc (I C = 1 Adc, V CE = 4. Vdc) ÎÎ Î SECOND BREAKDOWN (Note 2) Second Breakdown Collector I S/b Adc Current with Base Forward Biased BDW42 V CE = 28.4 VdcÎÎ Î V CE = 4 Vdc 1.2 /BDW47 V CE ÎÎ = 22.5 Vdc 3.8 V CE = 36 Vdc ÎÎ 1.2 Î Î DYNAMIC CHARACTERISTICS Magnitude of common emitter small signal short circuit current transfer ratio f T 4. Î MHz (I C = Adc, V CE = Vdc, f = MHz) Output Capacitance (V CB = 1 Vdc, I E =, f = MHz) BDW42 /BDW47 Small Signal Current Gain (I C = Adc, V CE = Vdc, f = khz) Î C ob Î Î 2 pf 3 Î h Î fe 3 Î Î 1. Pulse Test: Pulse Width = 3 s, Duty Cycle = %. 2. Pulse Test non repetitive: Pulse Width = 2 ms. 2

3 9 PD, POWER DISSIPATION (WATTS) T C, CASE TEMPERATURE ( C) Figure 1. Power Temperature Derating Curve R B AND R C VARIED TO OBTAIN DESIRED CURRENT LEVELS D 1 MUST BE FAST RECOVERY TYPES, e.g.: М1N5825 USED ABOVE I B 1 ma МMSD61 USED BELOW I B 1 ma TUT V 2 R B APPROX + 8. V 51 D 1 8. k 1 V 1 APPROX 12 V 25 s t r, t f 1 ns DUTY CYCLE = % + 4. V Figure 2. Switching Times Test Circuit V CC 3 V R C SCOPE for t d and t r, D 1 id disconnected and V 2 = For NPN test circuit reverse all polarities t, TIME ( s) μ t s V CC = 3 V I C /I B = 2 I B1 = I B2 t f t V BE(off) = V Figure 3. Switching Times t r r(t) EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) D =.2.1 SINGLE PULSE P (pk) t 1 t 2 DUTY CYCLE, D = t 1 /t 2 R JC (t) = r(t) R JC R JC = 1.92 C/W D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t 1 T J(pk) T C = P (pk) R JC (t) t, TIME OR PULSE WIDTH (ms) Figure 4. Thermal Response 3

4 ACTIVE REGION SAFE OPERATING AREA IC, COLLECTOR CURRENT (AMP) SECOND BREAKDOWN LIMIT BONDING WIRE LIMIT THERMAL T C = (SINGLE PULSE) BDW42 ms ms V CE, COLLECTOR EMITTER VOLTAGE (VOLTS) dc ms IC, COLLECTOR CURRENT (AMP) SECOND BREAKDOWN LIMIT BONDING WIRE LIMIT THERMAL T C = (SINGLE PULSE) ms BDW47 ms V CE, COLLECTOR EMITTER VOLTAGE (VOLTS) dc ms Figure 5. BDW42 Figure 6. and BDW47 There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 5 and 6 is based on T J(pk) = 2 C; T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 1% provided T J(pk) 2 C. T J(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. *Linear extrapolation hfe, SMALL SIGNAL CURRENT GAIN 1, V CE = V I C = A f, FREQUENCY (khz) Figure 7. Small Signal Current Gain C, CAPACITANCE (pf) C ib C ob V R, REVERSE VOLTAGE (VOLTS) Figure 8. Capacitance T J = + 4

5 hfe, DC CURRENT GAIN 2, 1, V CE = V T J = 1 C 55 C hfe, DC CURRENT GAIN 2, 1, V CE = V T J = 1 C 55 C Figure 9. DC Current Gain VCE, COLLECTOR EMITTER VOLTAGE (VOLTS) 2.6 I C = A 4. A 6. A I B, BASE CURRENT (ma) VCE, COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 1. Collector Saturation Region 2.6 I C = A 4. A 6. A I B, BASE CURRENT (ma) V, VOLTAGE (VOLTS) V I C /I B = 2 V, VOLTAGE (VOLTS) V V CE = 4. V V V CE = 4. V V I C /I B = 2 Figure 11. On Voltages V I C /I B = 2 V I C /I B =

6 V, TEMPERATURE COEFFICIENT (mv/ C) θ *I C /I B 2 * VC for V CE(sat) VB for V BE to 1 C 55 C to to 1 C 55 C to V, TEMPERATURE COEFFICIENTS (mv/ C) θ *I C /I B 2 * VC for V CE(sat) Figure 12. Temperature Coefficients VB for V BE 55 C to + + to 1 C + to 1 C C to +, COLLECTOR CURRENT ( A) μ IC REVERSE V CE = 3 V T J = 1 C 1 C FORWARD V BE, BASE EMITTER VOLTAGE (VOLTS), COLLECTOR CURRENT ( A) μ IC REVERSE V CE = 3 V T J = 1 C 1 C Figure 13. Collector Cut Off Region FORWARD V BE, BASE EMITTER VOLTAGE (VOLTS) NPN BDW42 COLLECTOR PNP BDW47 COLLECTOR BASE BASE 8. k 6 8. k 6 EMITTER EMITTER Figure 14. Darlington Schematic 6

7 PACKAGE DIMENSIONS TO 22 CASE 221A 9 ISSUE AA H Q Z L V G B N D A K F T U S R J C T SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L N Q R S T U V Z.8 4 STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center Kamimeguro, Meguro ku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. BDW42/D