Data Sheet. 3Px. ATF Low Noise Pseudomorphic HEMT in a Surface Mount Plastic Package. Features. Description
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1 ATF Low Noise Pseudomorphic HEMT in a Surface Mount Plastic Package Data Sheet Description Avago s ATF is a high dynamic range, low noise PHEMT housed in a 4-lead SC-7 (SOT-343) surface mount plastic package. Based on its featured performance, ATF is ideal for the first or second stage of base station LNA due to the excellent combination of low noise figure and enhanced linearity [1]. The device is also suitable for applications in Wireless LAN, WLL/RLL, MMDS, and other systems requiring super low noise figure with good intercept in the 45 MHz to 1 GHz frequency range. Note: 1. From the same PHEMT FET family, the smaller geometry ATF may also be considered for the higher gain performance, particularly in the higher frequency band (1.8 GHz and up). Surface Mount Package SOT-343 Features Lead-free Option Available Low Noise Figure Excellent Uniformity in Product Specifications 16 micron Gate Width Low Cost Surface Mount Small Plastic Package SOT 343 (4 lead SC-7) Tape-and-Reel Packaging Option Available Specifications 1.9 GHz; 4V, 8 ma (Typ.).5 db Noise Figure db Associated Gain 22 dbm Output Power at 1 db Gain Compression 33.5 dbm Output 3 rd Order Intercept Applications Pin Connections and Package Marking DRAIN SOURCE 3Px SOURCE GATE Note: Top View. Package marking provides orientation and identification. 3P = Device code x = Date code character. A new character is assigned for each month, year. Tower Mounted Amplifier, Low Noise Amplifier and Driver Amplifier for GSM/TDMA/CDMA Base Stations LNA for Wireless LAN, WLL/RLL and MMDS Applications General Purpose Discrete PHEMT for other Ultra Low Noise Applications Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class ) Refer to Avago Application Note A4R: Electrostatic Discharge Damage and Control.
2 ATF Absolute Maximum Ratings [1] Absolute Symbol Parameter Units Maximum V DS Drain - Source Voltage [2] V 5.5 V GS Gate - Source Voltage [2] V -5 V GD Gate Drain Voltage [2] V -5 I DS Drain Current [2] ma I dss [3] P diss Total Power Dissipation [4] mw 6 P in max RF Input Power dbm 2 T CH Channel Temperature [5] C 16 T STG Storage Temperature C -65 to 16 θ jc Thermal Resistance [6] C/W Operation of this device above any one of these parameters may cause permanent damage. 2. Assumes DC quiesent conditions. 3. V GS = V 4. Source lead temperature is 25 C. Derate 6 mw/ C for T L > 6 C. 5. Please refer to failure rates in reliability section to assess the reliability impact of running devices above a channel temperature of 14 C. 6. Thermal resistance measured using C Liquid Crystal Measurement method. Product Consistency Distribution Charts [8, 9] V 12 1 Cpk = 1.7 Std =.5 I DS (ma) 3 2 V Std +3 Std 1.6 V V DS (V) Figure 1. Typical Pulsed I-V Curves [7]. (V GS = -.2 V per step) NF (db) Figure 2. 2 GHz, 4 V, 8 ma. LSL=.2, Nominal=.53, USL= Cpk = 1.21 Std = Cpk = 2.3 Std = Std +3 Std Std +3 Std OIP3 (dbm) Figure 3. 2 GHz, 4 V, 8 ma. LSL=3., Nominal=33.3, USL= Under large signal conditions, V GS may swing positive and the drain current may exceed I dss. These conditions are acceptable as long as the maximum P diss and P in max ratings are not exceeded. 8. Distribution data sample size is 45 samples taken from 9 different wafers. Future wafers allocated to this product may have nominal values anywhere within the upper and lower spec limits. 9. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match and a realizeable match based on production test requirements. Circuit losses have been de-embedded from actual measurements. 1. The probability of a parameter being between ±1σ is 68.3%, between ±2σ is 95.4% and between ±3σ is 99.7%. GAIN (db) Figure 4. 2 GHz, 4 V, 8 ma. LSL=13.5, Nominal=14.8, USL=16.5 2
3 ATF DC Electrical Specifications T A = 25 C, RF parameters measured in a test circuit for a typical device Symbol Parameters and Test Conditions Units Min. Typ. [2] Max. I dss [1] Saturated Drain Current V DS = 1.5 V, V GS = V ma V P [1] Pinchoff Voltage V DS = 1.5 V, I DS = 1% of I dss V I d Quiescent Bias Current V GS = -.5 V, V DS = 4 V ma 8 g m [1] Transconductance V DS = 1.5 V, g m = I dss /V P mmho I GDO Gate to Drain Leakage Current V GD = 5 V µa 1 I gss Gate Leakage Current V GD = V GS = -4 V µa 42 6 NF Noise Figure f = 2 GHz V DS = 4 V, I DS = 8 ma db.5.8 V DS = 4 V, I DS = 6 ma.5 f = 9 MHz V DS = 4 V, I DS = 8 ma db.4 V DS = 4 V, I DS = 6 ma.4 f = 2 GHz V DS = 4 V, I DS = 8 ma db G a Associated Gain [3] V DS = 4 V, I DS = 6 ma f = 9 MHz V DS = 4 V, I DS = 8 ma db 21 V DS = 4 V, I DS = 6 ma 21 OIP3 f = 2 GHz V DS = 4 V, I DS = 8 ma dbm Output 3 rd Order 5 dbm Pout/Tone V DS = 4 V, I DS = 6 ma 32 Intercept Point [3] f = 9 MHz V DS = 4 V, I DS = 8 ma dbm dbm Pout/Tone V DS = 4 V, I DS = 6 ma 31 f = 2 GHz V DS = 4 V, I DS = 8 ma dbm 22 P 1 db Compressed V DS = 4 V, I DS = 6 ma 21 1dB Compressed Power [3] f = 9 MHz V DS = 4 V, I DS = 8 ma dbm 21 V DS = 4 V, I DS = 6 ma 2 1. Guaranteed at wafer probe level. 2. Typical value determined from a sample size of 45 parts from 9 wafers. 3. Measurements obtained using production test board described in Figure 5. Input 5 Ohm Transmission Line Including Gate Bias T (.5 db loss) Input Matching Circuit G_mag =.2 G_ang = 124 (.3 db loss) DUT 5 Ohm Transmission Line Including Drain Bias T (.5 db loss) Output Figure 5. Block diagram of 2 GHz production test board used for Noise Figure, Associated Gain, P1dB, and OIP3 measurements. This circuit represents a trade-off between an optimal noise match and a realizable match based on production test requirements. Circuit losses have been de-embedded from actual measurements. 3
4 ATF Typical Performance Curves OIP3, IIP3 (dbm) V 3 V 4 V I DSQ (ma) Figure 6. OIP3, IIP3 vs. Bias [1] at 2 GHz. OIP3, IIP3 (dbm) V 3 V 4 V I DSQ (ma) Figure 7. OIP3, IIP3 vs. Bias [1] at 9 MHz P 1dB (dbm) 1 P 1dB (dbm) V 3 V 4 V I DSQ (ma) Figure 8. P 1dB vs. Bias [1,2] at 2 GHz. 5 2 V 3 V 4 V I DSQ (ma) Figure 9. P 1dB vs. Bias [1,2] Tuned for 4V, 8 ma at 9 MHz G a (db) G a NF 11 2 V.4 3 V 4 V I DSQ (ma) Figure 1. NF and G a vs. Bias [1] at 2 GHz NOISE FIGURE (db) G a (db) G a NF 17 2 V 3 V.2 4 V I DSQ (ma) Figure 11. NF and G a vs. Bias [1] at 9 MHz NOISE FIGURE (db) 1. Measurements made on a fixed tuned production test board that was tuned for optimal gain match with reasonable noise figure at 4V 8 ma bias. This circuit represents a trade-off between optimal noise match, maximum gain match and a realizable match based on production test board requirements. Circuit losses have been de-embedded from actual measurements. 2. Quiescent drain current, I DSQ, is set with zero RF drive applied. As P 1dB is approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of I DSQ the device is running closer to class B as power output approaches P 1dB. This results in higher P 1dB and higher PAE (power added efficiency) when compared to a device that is driven by a constant current source as is typically done with active biasing. 4
5 ATF Typical Performance Curves, continued ma 6 ma 25 8 ma 6 ma 1. 2 F min (db) G a (db) FREQUENCY (GHz) Figure 12. F min vs. Frequency and Current at 4V FREQUENCY (GHz) Figure 13. Associated Gain vs. Frequency and Current at 4V. G a (db) C -4C 85C NOISE FIGURE (db) P 1dB, OIP3 (dbm) C -4C 85C FREQUENCY (GHz) Figure 14. F min and G a vs. Frequency and Temp at V DS = 4V, I DS = 8 ma FREQUENCY (MHz) Figure. P 1dB, OIP3 vs. Frequency and Temp at V DS = 4V, I DS = 8 ma OIP3, P 1dB (dbm), GAIN (db) Figure 16. OIP3, P 1dB, NF and Gain vs. Bias [1,2] at 3.9 GHz. P 1dB 3. OIP3 Gain 2.5 NF I DSQ (ma) NOISE FIGURE (db) OIP3, P 1dB (dbm), GAIN (db) P 1dB Gain OIP3 NF I DSQ (ma) Figure 17. OIP3, P 1dB, NF and Gain vs. Bias [1,2] at 5.8 GHz. 1. Measurements made on a fixed tuned test fixture that was tuned for noise figure at 4V 8 ma bias. This circuit represents a trade-off between optimal noise match, maximum gain match and a realizable match based on production test requirements. Circuit losses have been deembedded from actual measurements. 2. Quiescent drain current, I DSQ, is set with zero RF drive applied. As P 1dB is approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of I dsq the device is running closer to class B as power output approaches P 1dB. This results in higher P 1dB and higher PAE (power added efficiency) when compared to a device that is driven by a constant current source as is typically done with active biasing NOISE FIGURE (db) 5
6 ATF Typical Performance Curves, continued P 1dB (dbm) 1 P 1d B (dbm) I DS (ma) I DS (ma) Figure 18. P 1dB vs. I DS Active Bias [1] Tuned for 4V, 8 ma at 2 GHz. Figure 19. P 1dB vs. I DS Active Bias [1] Tuned for 4V, 8 ma at 9 MHz. Note: 1. Measurements made on a fixed tuned test board that was tuned for optimal gain match with reasonable noise figure at 4V 8 ma bias. This circuit represents a trade-off between an optimal noise match, maximum gain match and a realizable match based on production test board requirements. Circuit losses have been de-embedded from actual measurements. 6
7 ATF Power Parameters Tuned for Max P 1dB, V DS = 4 V, I DSQ = 8 ma Freq P 1 db I d G 1dB PAE 1dB P 3dB I d PAE 3dB Γ Out_mag Γ Out_ang (GHz) (dbm) (ma) (db) (%) (dbm) (ma) (%) (Mag.) ( ) P out (dbm), G (db), PAE (%) P out Gain PAE P in (dbm) Figure 2. Swept Power Tuned for Max P 1dB V DS =4V, I DSQ = 8 ma, 2 GHz. 1. Measurements made on ATN LP1 power load pull system. 2. Quicescent drain current, I DSQ, is set with zero RF drive applied. As P 1dB is approached, the drain current may increase or decrease depending on frequency and dc bias point. At lower values of I DSQ the device is running closer to class B as power output approaches P 1dB. This results in higher P 1dB and higher PAE (power added efficiency) when compared to a device that is driven by a constant current source as is typically done with active biasing. 3. PAE (%) = ((P out P in ) / P dc ) X 1 4. Gamma out is the reflection coefficient of the matching circuit presented to the output of the device. 7
8 ATF Typical Scattering Parameters, V DS = 2V, I DS = 4 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 2V, I DS = 4 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 21. MSG/MAG and S 21 2 vs. Frequency at 2V, 4 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 8
9 ATF Typical Scattering Parameters, V DS = 3 V, I DS = 4 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 3 V, I DS = 4 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 22. MSG/MAG and S 21 2 vs. Frequency at 3V, 4 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 9
10 ATF Typical Scattering Parameters, V DS = 3 V, I DS = 6 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 3 V, I DS = 6 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 23. MSG/MAG and S 21 2 vs. Frequency at 3V, 6 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 1
11 ATF Typical Scattering Parameters, V DS = 4 V, I DS = 4 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 4 V, I DS = 4 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 24. MSG/MAG and S 21 2 vs. Frequency at 4V, 4 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 11
12 ATF Typical Scattering Parameters, V DS = 4 V, I DS = 6 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 4 V, I DS = 6 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 25. MSG/MAG and S 21 2 vs. Frequency at 4V, 6 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 12
13 ATF Typical Scattering Parameters, V DS = 4 V, I DS = 8 ma Freq. S 11 S 21 S 12 S 22 MSG/MAG (GHz) Mag. Ang. db Mag. Ang. db Mag. Ang. Mag. Ang. (db) ATF Typical Noise Parameters V DS = 4 V, I DS = 8 ma Freq. F min Γ opt R n/5 G a GHz db Mag. Ang. - db MSG/MAG and S 21 2 (db) 4 3 MSG 2 MAG 1 S FREQUENCY (GHz) Figure 26. MSG/MAG and S 21 2 vs. Frequency at 4V, 8 ma. 1. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATF NP5 test system. From these measurements a true F min is calculated. Refer to the noise parameter application section for more information. 2. S and noise parameters are measured on a microstrip line made on.25 inch thick alumina carrier. The input reference plane is at the end of the gate lead. The output reference plane is at the end of the drain lead. The parameters include the effect of four plated through via holes connecting source landing pads on top of the test carrier to the microstrip ground plane on the bottom side of the carrier. Two.2 inch diameter via holes are placed within.1 inch from each source lead contact point, one via on each side of that point. 13
14 Noise Parameter Applications Information F min values at 2 GHz and higher are based on measurements while the F mins below 2 GHz have been extrapolated. The F min values are based on a set of 16 noise figure measurements made at 16 different impedances using an ATN NP5 test system. From these measurements, a true F min is calculated. F min represents the true minimum noise figure of the device when the device is presented with an impedance matching network that transforms the source impedance, typically 5Ω, to an impedance represented by the reflection coefficient Γ o. The designer must design a matching network that will present Γ o to the device with minimal associated circuit losses. The noise figure of the completed amplifier is equal to the noise figure of the device plus the losses of the matching network preceding the device. The noise figure of the device is equal to F min only when the device is presented with Γ o. If the reflection coefficient of the matching network is other than Γ o, then the noise figure of the device will be greater than F min based on the following equation. NF = F min + 4 R n Γ s Γ o 2 Zo ( 1 + Γ o 2 )(1 Γ s 2 ) Where R n /Z o is the normalized noise resistance, Γ o is the optimum reflection coefficient required to produce F min and Γ s is the reflection coefficient of the source impedance actually presented to the device. The losses of the matching networks are non-zero and they will also add to the noise figure of the device creating a higher amplifier noise figure. The losses of the matching networks are related to the Q of the components and associated printed circuit board loss. Γ o is typically fairly low at higher frequencies and increases as frequency is lowered. Larger gate width devices will typically have a lower Γ o as compared to narrower gate width devices. Typically for FETs, the higher Γ o usually infers that an impedance much higher than 5Ω is required for the device to produce F min. At VHF frequencies and even lower L Band frequencies, the required impedance can be in the vicinity of several thousand ohms. Matching to such a high impedance requires very hi-q components in order to minimize circuit losses. As an example at 9 MHz, when airwwound coils (Q > 1) are used for matching networks, the loss can still be up to.25 db which will add directly to the noise figure of the device. Using muiltilayer molded inductors with Qs in the 3 to 5 range results in additional loss over the airwound coil. Losses as high as.5 db or greater add to the typical. db F min of the device creating an amplifier noise figure of nearly.65 db. A discussion concerning calculated and measured circuit losses and their effect on amplifier noise figure is covered in Avago Application 185. Reliability Data Nominal Failures per million (FPM) for different durations 9% confidence Failures per million (FPM) for different durations Channel (FITs) 1 year 5 year 1 year 3 year (FITs) 1 year 5 year 1 year 3 year Temperature 1 1 ( o C) hours hours 1 <.1 <.1 <.1 <.1 <.1 <.1 <.1 <.1 <.1 < <.1 <.1 <.1 <.1 <.1 <.1 <.1 <.1 < <.1 <.1 <.1 <.1 16 <.1 < K <.1 < K < K 16 <.1 < K 37K < K 12K 52K 18 < K 83K 1K 21 53K 59K 85K 1K NOT recommended Predicted failures with temperature extrapolated from failure distribution and activation energy data of higher temperature operational life STRIFE of PHEMT process 14
15 ATF Die Model Statz Model MESFETM1 NFET=yes PFET=no Vto=.95 Beta=.48 Lambda=.9 Alpha=4 B=.8 Tnom=27 Idstc= Vbi=.7 Tau= Betatce= Delta1=.2 Delta2= Gscap=3 Cgs=1.6 pf Gdcap=3 Cgd=.32 pf Rgd= Tqm= Vmax= Fc= Rd=.125 Rg=1 Rs=.625 Ld=.375 nh Lg-.375 nh Ls=.125 nh Cds=.8 pf Crf=.1 Rc=62.5 Gsfwd=1 Gsrev= Gdfwd=1 Gdrev= Vjr=1 Is=1 na Ir=1 na Imax=.1 Xti= N= Eg= Vbr= Vtotc= Rin= Taumd1=no Fnc=1E6 R=.17 C=.2 P=.65 wvgfwd= wbvgs= wbvgd= wbvds= wldsmax= wpmax= Al lparams= This model can be used as a design tool. It has been tested on MDS for various specifications. However, for more precise and accurate design, please refer to the measured data in this data sheet. For future improvements Avago reserves the right to change these models without prior notice. ATF Model INSIDE Package SOURCE GATE Port G Num=1 Port S1 Num=2 VIA2 V1 D=2 mil H=25. mil T=. mil Rho=1. W=4 mil VIA2 V2 D=2. mil H=25. mil T=. mil Rho=1. W=4. mil Var Ean TLINP TL4 Z=Z1 Ohm L= mil K=1 A=. TanD=.1 TLINP TL1 Z=Z1 Ohm L= mil K=1 A=. TanD=.1 VAR VAR1 K=5 Z2=85 Z1=3 C C1 C=.1 pf TLINP TL3 Z=Z2 Ohm L=25 mil K=K A=. TanD=.1 TLINPTL9 Z=Z2 Ohm L=1. mil K=K A=. TanD=.1 TLINP TL1 Z=Z2/2 Ohm L=2 mil K=K A=. TanD=.1 L L1 L=.6 nh R=.1 L L4 L=.2 nh R=.1 GaAsFET FET1 Model=MESFETN1 Mode=nonlinear MSub MSUB MSub1 H=25. mil Er=9.6 Mur=1 Cond=1.E+5 Hu=3.9e+.34 mil T=. mil TanD=D Rough=D mil TLINP TL2 Z=Z2/2 Ohm L=2 mil K=K A=. TanD=.1 L L6 L=.2 nh R=.1 C C2 C=.11 pf L L7 C=.6 nh R=.1 TLINP TL7 Z=Z2/2 Ohm L=5. mil K=K A=. TanD=.1 TLINP TL5 Z=Z2 Ohm L=26. mil K=K A=. TanD=.1 TLINP TL8 Z=Z1 Ohm L= mil K=1 A=. TanD=.1 TLINP TL6 Z=Z1 Ohm L= mil K=1 A=. TanD=.1 VIA2 V3 D=2. mil H=25. mil T=. mil Rho=1. W=4. mil VIA2 V4 D=2. mil H=25. mil T=. mil Rho=1. W=4. mil SOURCE Port S2 Num=4 DRAIN Port D Num=4
16 Part Number Ordering Information No. of Part Number Devices Container ATF TR1G 3 7 Reel ATF TR2G 1 13 Reel ATF BLKG 1 antistatic bag Package Dimensions SC-7 4L/SOT (.51) BSC HE E 1. (.45) BSC b1 D A A2 b A1 L C DIMENSIONS (mm) SYMBOL E D HE A A2 A1 b b1 c L MIN MAX NOTES: 1. All dimensions are in mm. 2. Dimensions are inclusive of plating. 3. Dimensions are exclusive of mold flash & metal burr. 4. All specifications comply to EIAJ SC7. 5. Die is facing up for mold and facing down for trim/form, ie: reverse trim/form. 6. Package surface to be mirror finish. 16
17 Recommended PCB Pad Layout for Avago s SC7 4L/SOT-343 Products Dimensions in mm inches Device Orientation REEL TOP VIEW 4 mm END VIEW USER FEED DIRECTION COVER TAPE CARRIER TAPE 8 mm 3Px 3Px 3Px 3Px 17
18 Tape Dimensions and Product Orientation For Outline 4T P D P 2 P E C F W t 1 (CARRIER TAPE THICKNESS) D 1 T t (COVER TAPE THICKNESS) 1 MAX. K 1 MAX. A B CAVITY PERFORATION DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES) LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER DIAMETER PITCH POSITION A B K P D 1 D P E 2.4 ± ± ±.1 4. ± ±.1 4. ± ±.1.94 ±.4.94 ±.4.47 ±.4.7 ± ±.4.69 ±.4 CARRIER TAPE WIDTH THICKNESS W t ± ±.8 COVER TAPE WIDTH TAPE THICKNESS C 5.4 ±.1 T t.62 ± ±.4 DISTANCE CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) F P ±.5 2. ± ±.2.79 ±.2 For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright Avago Technologies. All rights reserved. Obsoletes EN AV2-1442EN - September 1, 29
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