A Grid-Connected Multilevel Converter for Interfacing PV Arrays and Energy Storage Devices

Transcription

1 Univeridade de São Paulo Biblioteca Diital da Produção Intelectual - BDPI Departamento de Enenharia Elétrica - EESC/SEL Comunicaçõe em Evento - EESC/SEL Grid-Connected Multilevel Converter for Interfacin PV rray and Enery Storae Device nnual Conference of the IEEE Indutrial Electronic Society, 39, 2013, Vienna, utria Downloaded from: Biblioteca Diital da Produção Intelectual - BDPI, Univeridade de São Paulo

2 Grid-Connected Multilevel Converter for Interfacin PV rray and Enery Storae Device Giovani G. Pozzebon; Ricardo Q. Machado Department of Electrical Enineerin São Carlo School of Enineerin USP São Carlo, Brazil Simone Buo; Giorio Spiazzi Department of Information Enineerin Univerity of Padova Padova, Italy btract Thi paper preent a dein procedure and a control tratey for a rid-connected inle-phae multilevel converter. The propoed ytem ue two erie connected H- bride module, one fed by photovoltaic panel, the other by enery torae device. The former witche at line frequency, while the latter operate in PWM. The ytem i deined to minimize the voltae tre on the witche, while the control tratey i uch that a contant active power i delivered to the rid with hih power factor, even if the enery produced by the photovoltaic panel i variable. The paper illutrate the power converter dein procedure, the hybrid PWM method and the mall inal modelin ued to dein the controller of each inverter. In addition, the performance of the multilevel converter i verified by mean of imulation and experimental reult, which how the ytem ability to operate a expected. Keyword multilevel converter; diital control; renewable ource of enery; ditributed eneration ytem. I. INTRODUCTION The utilization of multilevel converter ha recently become a frequently adopted olution for hih-power and power-quality demandin application [1]-[3]. The main reaon are the hiher voltae operatin capability reached with conventional emiconductor, lower common-mode voltae and inherently improved power quality (voltae with reduced harmonic content and nearly inuoidal current). mon the everal application field of multilevel converter topoloie, one of particular interet, nowaday, i the interface of renewable enery ource in ditributed eneration (DG) ytem. n example of thi kind of application i the ue of the multilevel converter in rid connected PV ytem [4]-[8]. In particular, the cacaded H- bride (CHB) multilevel converter ha attracted attention for thi application. Indeed, each H-bride power cell ue iolated DC ource, which can be eaily upplied by PV module trin. Furthermore, it offer benefit uch a lower witch voltae tre, by interconnectin enouh module in erie, and reduced witchin frequency, which improve the ytem efficiency. Movin alon the ame line, thi paper propoe a ridconnected (127V/60Hz) CHB multilevel converter ytem that interate a PV array, conidered a the primary enery ource, and a battery pack. Becaue the available enery from PV ytem may vary dependin on the weather condition (temperature, olar radiation, partial hadin), eaon, and eoraphic location, it i indeed interetin to aument the ytem with an enery torae device, o a to provide a certain deree of power fluctuation compenation, or peak havin capability [9]. Thereby, the propoed multilevel topoloy ha in it et-up two H-bride power cell connected in erie, one of them, deined to operate at rid frequency, connected to a PV array and the other one, operatin in PWM, to a rechareable battery. Compared with conventional olution, the one propoed in thi paper ha two major advantae: i) it can ue lower voltae witche on each inverter and ii) it can exploit line frequency operation in the hiher power unit without cauin exceive rid current ditortion. Beide illutratin the multilevel ytem topoloy, thi tudy develop a eneral methodoloy and a control tratey to implement the power fluctuation uppreion, feedin the rid and the local load with a contant pre-defined amount of active power at hih power factor. II. MULTLEVEL CONVERTER SYSTEM The propoed topoloy i hown in Fi. 1. can be een, it ue two H-bride module connected in erie, bein fed by two independent enery ource. Exploitin the inherent flexibility of the topoloy, where, each of the different H- bride power cell can proce a different power level and operate with a different witchin frequency, in the propoed olution the PV powered cell operate at line frequency while the battery connected one, that procee a lower power, i PWM modulated. The converter, therefore, operate a an hybrid PWM modulated ytem [1], minimizin the witchin loe. In addition, thank to the erie connection, the DC-link voltae are minimized a well, allowin the ue of reduced voltae witche, aain to the benefit of converion efficiency. In order to hihliht the phyical limitation of the cacaded arranement hown in Fi. 1, we will now analyze it in more detail. In the firt place, pleae note that we aume that the array of PV panel already ha a maximum power point trackin control, and the battery pack alo ha a built-in charin and dicharin controller, o that both inverter cell can be aumed to be fed by a voltae ource, namely V DC_ and V DC_B. Due to the different phyical nature of the ource, inverter, powered by photovoltaic panel, operate in unidirectional mode, i.e., the whole power enerated by the panel will be tranferred to the ytem, wherea inverter B, powered by batterie, operate in a bi-directional mode, o that Thi work wa ponored by São Paulo Reearch Foundation FPESP /13/$ IEEE 6158

3 Batterie PV Panel Source C B C P B V DC_B DC link P P + P V DC_ B the batterie can be chared or dichared a required. Therefore, the propoed ytem mut manae the power flow o a to make the H-bride cell deliver all the active power available from it DC-link, P, while the H-bride cell B operate both a a erie active filter, keepin the C rid current in phae with the rid voltae (with minimal ditortion) and a an active power compenator, keepin the power delivered to the rid, and poibly to local load, a contant a poible, even if variation occur in the input power P. To obtain hih power factor at the point of common couplin (PCC), the followin condition hall be atified: the fundamental component of current flowin throuh the circuit, defined a I, mut be in phae with the fundamental component of the ditribution ytem voltae, called V. From thee conideration, it i poible to etablih a diaram, hown in Fi. 1, which repreent the deired ituation, where I and V are repectively the phaor repreentation of the fundamental rm (root mean quare) rid current and voltae, V L i the rm voltae acro the couplin inductor, V o i the phaor repreentin the fundamental rm output voltae of the multilevel converter, and φ o i the diplacement anle between the rid voltae and the terminal voltae of the cacade multilevel converter. Note that the reultant vector, that repreent the output voltae of the multilevel converter, i the um of the fundamental component of the output voltae enerated by the cell and B, i.e., V o =(V +V B ), where V and V B. repreent the rm voltae produced by the power cell and B, repectively. Thu, the vector um V +V B i expected to produce a reultin vector uch that V L i alway at 90 from V, to atify the condition of maximum tranfer of active power, accordin to (1). L v () t o v () t B v () t 1φ Multilevel Converter ( ) v () L t V = V + V V (1) B i () t v () t III. DESIGN PROCEDURE ND CONTROL METHOD In the previou ection, the multilevel topoloy to be ued a an interface of renewable ource and batterie wa defined. In thi ection, analyi and baic procedure to dein the multilevel ytem are preented, which erve to define the optimal value for variable uch a DC-link voltae and line couplin inductance.. Baic Dein Conideration In order to preent the dein procedure, only the fundamental component of current and voltae are L Ditribution Grid Fi. 1. Sinle-phae rid-connected multilevel converter interfacin PV pannel and batterie and the active power tranfer diaram. P ctive Power Tranfer Diaram V L V o I V φ o conidered, becaue, aumin a neliible rid voltae ditortion, they almot completely determine the active power flow. Knowin that the nominal rid rm voltae i 127 V and it frequency 60 Hz, the followin dein contraint are impoed: (a) the conidered maximum power (P max ) and minimum power (P min ) enerated by photovoltaic panel are equal to 1.25 kw and 0.75 kw, repectively; the power (P ) to be tranferred to the utility rid i kept equal to 1 kw. While the phyical meanin of P max i obviou, the role of P min need to be clarified. P min repreent the enerated power level below which the ytem cannot deliver the deired power to the rid, without exceively trein the battery pack. With a enerated power ranin from P min to P max the active power proceed by the inverter B i a function of power P, i.e., ( ) P P = P P. (2) B aforementioned, the power P B, proceed by inverter B, will be aborbed or upplied by a battery, thu determinin chare and dichare phae, accordin to the variation of the power enerated by the photovoltaic panel. However, accordin to (2), the maximum P B in manitude i equal to 250 W, i.e., P Bmax = W, and P Bmin = 250 W, o that the ytem operate a follow: When P = P, P B = 0, i.e., when the power enerated by the photovoltaic panel i equal to the reference power P, the inverter B doe not exchane enery; When, ( P PBmax) P < P, P B > 0, i.e., when the power enerated by the panel i maller than the power to be tranferred, the inverter B will tranfer active power from batterie to the rid (if the batterie tate of chare allow that); When P < P P max, P B < 0, i.e., the power tranferred to the rid remain contant and the additional power i drained by converter B to chare the batterie (if their tate of chare allow that). Note that for P power value outide the rane aforementioned, or when the battery tate of chare doe not allow further power aborption/injection, the reference of power P to be tranferred to the rid will be chaned, o that the ytem operate properly. In other word, a uperviin controller, whoe characteritic are not conidered in thi paper, i required to operate the ytem in real life condition. Coniderin rid fundamental current and voltae to be in phae, i.e. co( φ ) = 1, V = 127 V and a fixed P = 1 kw, the rm rid current i I = ( P V ) = 7.9. The couplin inductor voltae drop i iven by VL = I jωl, where ω i the anular frequency, L i the inductance and f i the rid frequency, 60 Hz. The choice of thee particular value i actually related to the prototype implementation, decribed in Section VI. The dein procedure, of coure, ha eneral validity. 6159

4 B. Control Stratey for Cell : mplitude Modulation Coniderin only the fundamental component, a control tratey for the power cell i outlined. It i baed on amplitude modulation at fixed phae. From previou data one can define the abolute minimum value of the fundamental component of the output voltae of inverter, V 1min V1 min = P max I = V, (3) where P max i the maximum primary ource power and I i the deired rid current. Pleae note that (3) aume the phae hift between V 1 and the rid voltae i zero. If a uitably hiher value i choen to prevent aturation, e.. V 1 =160 V, then the phae hift at maximum power will be lihtly hiher than 0. The exact value can be determined accordin to the followin expreion: 1 P max 180 φ op = co = 7.167, (4) I V 1 π where φ op i the operation anle of V, P max = 1.25 kw, I = P V and V 1 = 160 V. Durin operation, the amplitude of the fundamental voltae of the inverter will vary, while it operatin anle will be kept contant at φ op. The required rm value of V 1 a a function of input power P can be calculated a ( ( )) V ( P ) = P I co φ, (5) 1 op op where P rane from 0.75 kw to 1.25 kw. In order to deliver the power comin from the ource, cell will have to modulate it fundamental output voltae accordin to the j φ op followin law V ( P ) = V ( P ) e. op 1 op In our implementation, fundamental amplitude modulation i achieved by uin a imple line frequency, quare wave modulation tratey. Inverter controller varie the witchin anle, α, o a to maintain it DC-link voltae reulated at the iven reference. the output voltae of the inverter i a three level wave at line frequency (where α repreent a half of the zero voltae anular interval), the C current that flow ha lare harmonic content. Therefore, it i deirable that the DC-link voltae of inverter i a mall a poible, o that inverter B can more effectively compenate a reater number of harmonic in the current. The dein of the DC-link voltae can be made in a imple manner. Uin the Fourier relation for determinin the fundamental component of a quare wave (α = 0), one can determine the minimum required DC voltae: ( ) VDC min = V1 2 π V. (6) Once aain, a lihtly hiher value i choen in order to avoid aturation, e.. V DC_=180 V. Once V DC_ i determined, one can etablih a modulation function that relate the witchin anle and power P, that i: α ( P ) ( P ) 1 1 op 2 co V π = VDC_ 4. (7) C. Definin the Parameter for Inverter B To uarantee current control at all operatin point, in the followin we etablih ome relation that directly contrain inductance L and the DC-link voltae V DC_B. 1) ccordin to (1), inverter B need to upply an averae voltae iven by: V ( P, L) = V + V ( L) V ( P ). (8) B L op So, in order to determine V B, it i neceary to obtain the value of V L a a function of the inductance L. 2) However, (1) ha to be atified in every PWM witchin period, which mean that, durin inverter zero voltae interval, the total V o (L) will have to be enerated by inverter B. Intead, when inverter i eneratin a voltae equal to ±V DC_, inverter B ha to enerate, on averae, the difference between V o (L) and V DC_. Coniderin both cae, a minimum V DC_B voltae level can be found, aumin ϕ op anle neliible, and i iven by: 2Vo( L) in( α( P) ) VDC_B ( L) = max, (9) 2Vo( L) in( α( P) ) V DC_ where V o =V +V L i the rm value of v o and α i the witchin anle of inverter. 3) The choice of V DC_B and L, finally, affect the dein of inverter B alo from another tandpoint, i.e. harmonic current compenation capability. Indeed, inverter B operate with current control in order not only to adjut rid current fundamental, o a to deliver the maximum active power to the rid, but to compenate ditortion a well. Thu, V DC_B voltae mut be hih enouh o that the current control can compenate a reaonable number of harmonic, ay up to the 5 th or 7 th and keep current control without incurrin into deep aturation. The contraint dicued above determine three relationhip involvin L and V DC_B. umin reaonable inductance value, e.. from 1 mh to 20 mh, in VL = I jωl and ubtitutin in (8) and (9) we could et-up an iterative procedure to determine the minimum operation value of V B (maximum manitude value) and V DC_B with repect to L. fter the analyi, it wa determined that the wort cae for contraint 1) i when P =P min and the wort cae for contraint 2) i when P =P max. For the contraint 3) we determined the lowet value of V DC_B in order to compenate up to the 7 th harmonic component of the current, under the condition which the time derivative of current determined by inverter B i at leat equal to the time derivative of current determined by the voltae V. Coniderin the wort cae, V B and V DC_B are plotted in relation with inductance L in Fi. 2. Obervin Fi. 2, we ee how V DC_B = 170 V and L = 10 mh i a (limit) olution that atifie all contraint. Lower L value, down to 1 mh, are equally poible, but were not available for the experiment at the time of writin. Now, extractin the manitude V B (P,L) and the phae anle φ B( P ) from V B ( P, L ) for L = 10 mh, and iven 6160

5 V B, V DC B (V) ) V DC B 2) V DC B ) V B L (mh) Fi. 2. Manitude of V B and V DC_B with repect to inductance L. (a) V op (P ), it i poible to obtain the raphic, in Fi. 3, that how the teady-tate operation of the multilevel converter with the amplitude modulation tratey applied to inverter. Fixin the phae anle of phaor V and varyin it amplitude, a implied by (7), inverter B can exchane enery by varyin the anle and amplitude of it fundamental voltae. Thi can be verified inpectin the locu enerated by phaor V and V B in Fi. 3(a). Then, it i poible to ee that inverter B will have to enerate at leat the followin rm voltae (Fi. 3): V = V ( P ) 37 V. (10) B min B min IV. DESIGN OF CONTROL LOOPS The multilevel converter operation mode propoed in thi paper require two independent control loop, one to reulate DC voltae of the inverter, and the other one to control the multilevel output current by inverter B. Both control cheme diaram and circuit parameter are hown in Fi. 4 and Table I, repectively. In thi ection, claic dein procedure uin PI controller are preented for current and voltae control loop, uaranteein mall teady-tate error in trackin the reference current and voltae inal [10].. Inverter : DC Link Voltae Control Loop Voltae control of the DC-link i performed by adjutin, throuh witchin anle variation, the mall amount of real power flowin into the DC-link capacitor. The voltae controller actually determine the amount of power tranferred to the ytem from the DC ource, thu compenatin for the conduction and witchin loe. In teady-tate, P (power available at the DC-link) ha to be equal to the um of the converter loe and the power tranferred to the rid. Pleae V B (V) phi B (deree) P (W) Fi. 3. mplitude modulation: (a) locu of V and V B to keep current control; manitude and anle of the voltae the inverter B need to upply. V (V) note that we are nelectin the preence of inverter B, a it operate well beyond the control bandwidth conidered in thi propoal. Direardin the converter loe, the power balance of the ytem i a follow: de C dt In (11), ( 12) ( φ ) = P V I co. (11) 1 op 2 C DC_ E = C V i the enery tored in the DC-link capacitor C. The controlled variable V DC_ i conidered to be equal to the uperpoition of a teady-tate component and a perturbation component, VDC _ = VDC _ + v DC _. Thu, coniderin P and the rid current I contant (teady-tate) and olvin (11) for mall inal yield: d C VDC_ v DC_ = v 1 I co( φ op) (12) dt hown by (7) the relation between the witchin anle α, the control variable, and the fundamental voltae of the inverter i non linear. However, partially derivin V 1 ( α ) in function of V DC_ and α, and rewritin in term of mall inal approximation yield DC _ v = co( α) v in ( α) α, (13) 1 4 in(θ) PLL ( P V ) 2 Inverter Control cheme + VDC_ DC _ 4 V π 2 π 2 where α i the teady-tate witchin anle and α i the mall inal controller output. Subtitutin (13) in (12), imple calculation yield the followin reult for v _ G( ) = DC α ( ) : 1 G( ) = VDC _ tan ( α) π 2 VDC _ 1+ C 4 I co α co φ V DC_ PI B +PI PWM Inverter B Inverter ( ) ( op), (14) which i the tranfer function between modulation anle α and DC-link voltae. Fi. 5 how the control loop block diaram. The controller block i repreented by a typical proportional interal (PI) reulator tructure. It output repreent the witchin anle α and G TV i the voltae enor ain. Inverter B Control cheme Fi. 4. Control cheme diaram for inverter and B. TBLE I. MULTILEVEL SYSTEM PRMETERS V DC_ V DC_B L V P f 180 V 1.42 p.u. 170 V 1.34 p.u. 10 mh p.u. 127 V 1.0 p.u. α 1000 W 1.0 p.u. 60 Hz C C B P max P min P Bmax P Bmin 1360 uf 8.27 p.u uf p.u W 1.25 p.u. 750 W 0.75 p.u. 250 W 0.25 p.u. 250 W 0.25 p.u. 6161

6 VDC_ ε PI() K I KP + α G () VDC_ i ε PI() KI KP + PWM Modulator k MB 2 VDC _ B G () I 1 L G TV G TI Fi. 5. Control loop block diaram of inverter. Coniderin the parameter, C =1360 μf, V DC_ =180 V, G TV =1, m φ =72 (phae marin), f CR _ V = 2 Hz (croover frequency), and chooin the peak power cae, P =P max, α = α( P max ), the PI parameter are K P =3.7e-4 and K I =0.47 Hz. B. Inverter B:Current Control Loop Inverter B operate uin a PWM modulation technique to control the rid current. Firt, the current reference i ynchronized with the rid voltae to enure unity power factor uin a PLL [11], [12]. In thi cae, the reference i contant and i iven by: i P ( θ) = 2 in( θ), (15) V where P i the rid active power reference, V i the line voltae, and θ i the ynchronou anle produced by the PLL. The error between the enerated current and the reference current i proceed throuh a PI controller, and then the output current error i compared with a ymmetrical trianular waveform (15 khz) in order to produce the ate inal. The tranfer function between inverter voltae and rid current i iven by: 1 GI ( ) = kgi, (16) L where kgi = 2 V i the ain of the converter and DC _ B L=10 mh i the couplin inductor. The block diaram of the current control loop for the inverter B i hown in Fi. 6, where all the component are repreented for their repective tranfer function or ain. The dein of the current control loop ain K P and K I wa carried out baed on the parameter V DC_B =170 V, G TI =1, m φ =72, f CR _ I = ( 15 6 ) khz, which yield the followin controller contant: K P =0.44 and K I =2242 Hz. V. SIMULTION RESULTS The performance of the propoed multilevel converter ytem ha been verified by imulation uin PSIM for the power circuit and control. The control ytem i implemented a a C cript in a dicrete time imulation block. ridconnected cacaded tructure ha been conidered to tranfer 1 kw to the rid and alo to keep current control. In order to repreent the photovoltaic enerator, a current ource connected to the DC-link of the inverter wa ued, and intead of batterie, we ued a bi-directional controlled rectifier to deliver or aborb enery and reulate the voltae V DC_B. Fi. 7 how the imulation reult of the multilevel converter when the input power P =750 W. In thi cae, Fi. 6. Current control loop block diaram. inverter B i deliverin 250 W to the ytem in order to maintain P =1 kw. The current controller behavior can be oberved in Fi. 7(a), which how the rid current in phae with the rid voltae, while Fi 7 how the output voltae of inverter and B a well a the output of the current controller. Fi. 8 how the imulation reult for an input power P =1 kw. Note that the rid current remain controlled while inverter B doe not exchane enery with the ytem. Similarly, Fi 9 how the reult for P =1.25 kw. In thi cae the multilevel converter continue to deliver 1 kw to the rid, and the inverter B i now aborbin 250 W. V DC_ THDI = 4.8% vb v PIB 100 V/div 170 V/div Fi.7. Waveform for P =750 W. (a) rid voltae; rid current; V DC_. output voltae of inverter and B; current controller output PI B. V DC_ THDI = 4.5% vb v PIB 100 V/div 170 V/div Fi.8. Waveform for P =1 kw. (a) rid voltae; rid current; V DC_. output voltae of inverter and B; current controller output PI B. V DC_ THDI = 4.2% vb v PIB 100 V/div 170 V/div Fi.9. Waveform for P =1.25 kw. (a) rid voltae; rid current; V DC_. output voltae of inverter and B; current controller output PI B. 6162

7 Powered by TCPDF ( (a) (c) (e) v (d) (f) 100 V/div 100 V/div 100 V/div v v Fi.10. Waveform for P 750 W: (a), ; P 1 kw: (c), (d); P 1.25 kw: (e), (f); rid voltae and current ( v, ) ; voltae of inverter and B ( v, ). VI. EXPERIMENTL RESULTS fter imulation, a hardware prototype of the propoed converter wa et-up and experimentally teted in connection to a 127 V/60 Hz power rid. Each H-bride cell i implemented uin module from SEMIKRON. The multilevel converter prototype witche at 15 khz and i controlled by a diital inal proceor (TMS320F28335). For practical reaon, the converter i fed by a 4 kw PV ource emulator from Mana Power to repreent the PV ytem and by a bi-directional controlled rectifier to repreent the batterie. Fi. 10 how the experimental reult of the ytem deliverin contant power to the rid. The reult were obtained under the ame condition of the imulation, i.e., the DC power of inverter wa adjuted to deliver approximately 750 W, 1.0 kw and 1.25 kw. can be een, the multilevel ytem i able to maintain the current in phae with the rid voltae, to atifactorily compenate the harmonic ditortion and, finally, to control the DC-link voltae of inverter by adjutin the witchin anle. VII. CONCLUSION Thi paper ha decribed a control method for a multilevel converter connected to rid that can be powered by PV panel and batterie. Independent controller for each H-bride power cell were deined and throuh the imulation and experimental reult it wa found that even with variation in the power of inverter DC-link, the multilevel converter wa able to tranfer a preet power and maintain it output current in phae with the rid voltae. REFERENCES [1] J. Rodriuez, S. Bernet, W. Bin, J. O. Pontt, and S. Kouro, "Multilevel Voltae-Source-Converter Topoloie for Indutrial Medium-Voltae Drive," IEEE Tran. Ind. Electron., vol. 54, pp , [2] L. G. Franquelo, J. Rodriuez, J. I. Leon, S. Kouro, R. Portillo, and M.. M. Prat, "The ae of multilevel converter arrive," IEEE Indutrial Electronic Maazine, vol. 2, pp , [3] J. Rodriuez, L. G. Franquelo, S. Kouro, J. I. Leon, R. C. Portillo, M.. M. Prat, and M.. Perez, "Multilevel Converter: n Enablin Technoloy for Hih-Power pplication," Proceedin of the IEEE, vol. 97, pp , [4] S. Daher, J. Schmid, and F. L. M. ntune, "Multilevel Inverter Topoloie for Stand-lone PV Sytem," IEEE Tranaction on Indutrial Electronic, vol. 55, pp , [5] S.. Khajehoddin,. Bakhhai, and P. Jain, "The pplication of the Cacaded Multilevel Converter in Grid Connected Photovoltaic Sytem," at IEEE Electric Power Conference. EPC Canada [6] E. Ozdemir, S. Ozdemir, and L. M. Tolbert, "Fundamental-Frequency- Modulated Six-Level Diode-Clamped Multilevel Inverter for Three- Phae Stand-lone Photovoltaic Sytem," IEEE Tranaction on Indutrial Electronic, vol. 56, pp , [7] J. Selvaraj and N.. Rahim, "Multilevel Inverter For Grid-Connected PV Sytem Employin Diital PI Controller," IEEE Tranaction on Indutrial Electronic, vol. 56, pp , [8] E. Villanueva, P. Correa, and J. Rodriuez, "Control of a inle phae H- Bride multilevel inverter for rid-connected PV application," preented at 13th Power Electronic and Motion Control Conference. EPE-PEMC 2008., [9] H. Fakham, P. Deobert, and B. Francoi, "Control ytem and power manaement for a PV baed eneration unit includin batterie," preented at International eean Conference on Electrical Machine and Power Electronic, CEMP '07, [10] M. H. Rahid, Power Electronic Handbook: cademic Pre, [11] F. P. Marafão, S. M. Deckmann, J.. Pomilio, and R. Q. Machado, "Metodoloia de projeto e análie de aloritmo de incronimo pll," SOBREP Revita da ociação Braileira de Eletrônica de Potência, vol. 10, pp. 7-14, [12] J. Rocabert, G. M. S. zevedo,. Luna, J. M. Guerrero, J. I. Candela, and P. Rodríuez, "Intellient Connection ent for Three-Phae Grid- Connected Microrid," IEEE Tranaction on Power Electronic, vol. 26, pp ,