HIGH-QUALITY RECTIFIER BASED ON CUK CONVERTER IN DISCONTINUOUS CAPACITOR VOLTAGE MODE

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1 HIGH-QUALITY RECTIFIER BASED ON CUK CONVERTER IN DISCONTINUOUS CAPACITOR VOLTAGE MODE G. Spiazzi*, L. Rossetto**, P. Mattavelli**, S. Buso* *Dept. of Electronics and Informatics, **Dept. of Electrical Enineerin University of Padova - ITALY Abstract. Cuk converters, operatin in Discontinuous Capacitor Voltae Mode (DCVM), can achieve unity power factor when used as rectifiers with no need of duty-cycle modulation. This operatin mode causes hih voltae stresses across the semiconductors, callin for hih-voltae switches like IGBT's. However, zero-voltae turn-off is achieved, resultin in limited power loss even at hih frequency. Both current- and voltae-fed approaches as well as constant- and variable-frequency control are analysed in the paper. Simulated and experimental results are reported, which demonstrate actual converter performance. Keywords. Power factor correction, Cuk converter, rectifier. INTRODUCTION BASIC CONVERTER OPERATION Several efforts are bein done in order to reduce the impact of conventional rectifiers on the rid in terms of power factor and current harmonics. For this purpose, standard topoloies like Boost and Flyback are widely used. Other converter topoloies, like Cuk and Sepic, are also ainin attention due to their characteristics: hih-frequency insulation, inherent short-circuit protection, step-up and step-down reulation, reduction of input current ripple by inductor couplin. These latter structures have different operatin modes, some of which are well suited for the use as Power Factor Pre reulators (PFP's) as shown by Simonetti at al. (), Brkovic and Cuk (), Spiazzi and Rossetto (3). In this paper, hih-quality rectifiers based on Cuk converters workin in Discontinuous Capacitor Voltae Mode (DCVM) are analysed. This operatin mode feautures: unity power factor at constant duty cycle and switchin frequency; zerovoltae switchin at turn-off and reduction of reactive element values. The converter is first analysed with inductive output filter (current-fed approach, Freeland (4)) and power stae desin criteria are iven. It is shown that the use of variable frequency control overcomes the problem of limited load rane. Then, the same converter with capacitive output filter (voltae-fed approach (4)) is considered, showin that almost unity power factor can be achieved also in this case. Due to hih voltae stresses and associated reverse recovery of the freewheelin diode this approach is appealin only for low-voltae applications. Note, however, that hih voltae devices like IGBT's can be profitably used at hih frequency due to the soft commutation. Let us consider the dc-dc Cuk converter operatin in DCVM shown in fiure. Its main waveforms are reported in fiure and are drawn in the hypothesis of neliible ripples on inductor currents and output capacitor voltae. As we can see lookin at voltae U across enery transfer capacitor C, this operatin mode requires that, at every switchin cycle, capacitor C is dischared to zero by the output inductor current. The switchin period is divided in three intervals D T s, D T s, D 3 T s. Durin the first one, the switch is on while the diode is still off and C is dischared by current I. Durin D T s both switch and diode are on and C is short-circuited until the switch is turned off, startin the recharin phase (interval D 3 T s ). Note that the switch turn off occurs at zero voltae. The followin relations hold: D+ D = D () D3 = D where D is the duty-cycle. From the voltae balance across L and the current balance in C we can write respectively: DU = U () L ID = ID3 (3) The peak voltae in C is iven by: I U = C DT 3 s (4) Substitutin (3) and (4) in () and usin the power balance condition (efficiency is assumed unity), the voltae conversion ratio M results: M U L CRL = = (5) U D T s

2 As for any converter operatin in discontinuous mode, the voltae conversion ratio depends on the load resistance. The square root dependence on R L allows use of this topoloy as "automatic current shaper" when employed as a rectifier (see (4)). This means that a sinusoidal input current can be achieved without duty cycle modulation alon the line period. Fiure : Dc-dc Cuk converter scheme Usin voltae-balance condition across L, maximum voltae U across C can be rewritten as: U U = (6) D This equation shows that this operatin mode causes hih voltae stress across the devices. OPERATION AS PFP: INDUCTIVE FILTER When operatin as a power factor prereulator, the converter is fed by the AC line throuh a diode bride rectifier. Moreover, due to the input power pulsatin at twice the line frequency, there must be a reactive element capable to filter out this low-frequency fluctuation in order to allow constant output power. We consider first the case in which the output inductor L is made lare enouh to maintain a constant output current I =I L, as shown in fiure 3 (current-fed approach (4)). Fiure 3: Ac-dc Cuk converter with inductive filter Assumin unity power factor, the rectified input voltae and current are iven by: u θ= U sin θ (9.a) () () PL i () θ= Isin() θ= sin() θ (9.b) U where θ=ω i t is the anolar line frequency and P L is the output power. All converter currents and voltaes are averaed in a switchin period. Under the assumption that the input power fluctuation is fully absorbed by inductor L we can write: u () θ i() θ= u () θ I u () θ = U Lsin () θ (0) Thus the converter operates with an apparent voltae conversion ratio m(θ) iven by: u () θ U () L m() θ= = sin() θ u θ U () and feds an apparent load r(θ) iven by: u () θ r () θ= = R Lsin () θ () I The effective voltae conversion ratio M=U L /U can now be derived by substitutin in (5) the expressions () and () in place of M and R L respectively, obtainin: M U L CR L = = (3) U D Ts Peak voltae stress U iven by (6) and the DCVM condition (8) remain valid provided that U represents the peak line voltae. Fiure : Converter main waveforms in DCVM DCVM operation is ensured by the condition: D < D (7) which, usin (3), (4) and (6) implies: I LT (8) s C Clim = D( D) U This equation reveals that this operatin mode can be maintained only for a limited load rane. Power stae desin criteria This section embodies some considerations for a preliminary converter desin. Takin the maximum allowed voltae stress U max as specification the correspondin maximum load variation is derived. For the sake of enerality, let us consider that U can vary from a minimum value U min and a maximum value

3 U max. From (3) it turns out that the maximum duty-cycle corresponds to the situation with minimum input voltae and load resistance and vice-versa. It is also easy to demonstrate that maximum voltae stress U max occurs at the minimum input voltae and hence maximum duty-cycle, while the worst-case condition for C corresponds to the maximum input voltae and load resistance. Capacitor C. Usin (6) and (3) we derive the followin constraint on C value: 4T s U L PL C = 4Ts R L min Û max Ûmax where P L is the maximum output power. (4) 5.6A 5.A 4.8A 5A 0A 5A i D T s D T s D T 3 s i S 0A µ s Fiure 4: Input inductor, switch and diode current waveforms durin a switchin period i D Maximum load variation. In order to satisfy both constraints (8) and (4) it must be: R Lmin UL Dmin 4 (5) R Lmax Umax An expression for D min can be derived from (3) usin the limit value C lim for C. Substitutin into (5) we obtain: R L max Ûmax R = L min ( U max U L) + (6) This shows that the maximum voltae stress must satisfy the constraint: Û U + (7) ( ) max max U L Inductor L. The current waveforms in the input inductor, switch and diode are shown in fiure 4. As we can see, the ripple amplitude of i is reater than the value correspondin to the linear ramp durin the switch on-time. This occurs due to the oscillation with capacitor C in the off interval. From the equations of inductor current and capacitor voltae we can find: u () θ ωdts i() θ = Dγ+ + α +β γ+ωdt Z ωts [( ) ( )] s It is worthy to note that (8) confirms the property of this circuit to operate at unity power factor without duty cycle modulation since, the averae input current results proportional to the line voltae when duty cycle D is fixed. Eqs. (8) to (0) can be used for choosin inductor L so as to meet the input current ripple specification. Inductor L. As stated above, L must filter out the low-frequency component of voltae u'(θ) iven by (0). Thus, the inductor value is iven by: R L L = () ω i r i where r i is the allowed relative low-frequency current ripple (peak-to-peak). The correspondin stored enery is quite hih, but can be considerably reduced by usin a tuned L-C filter in place of L, as reported in Kin (5). Capacitor C. Its aim is to further reduce the low-frequency ripple on the output voltae. Thus, if r u is the allowed relative low-frequency voltae ripple (peak-to-peak), the capacitor C value can be calculated as: ri C = () ω R r i L u (8) which ives the averae input current (over a switchin cycle), and peak-to-peak input current ripple: u() θ i () θ = ( ξ γ) (9) pk pk Z where the parameters are: L Z=, ω C = (0.a) LC α = cos γ = α α ( ω ( D) T ), β = sin( ω ( D) ) s Ts ω β + ξ = α ( γ + ω ) DTs, DTs + (0.b) (0.c) Switch and diode current stress. As we can see from fiure 4, durin interval D T s the switch carries the sum of the two inductor currents, while durin interval D T s its current reduces to the input inductor current only. Similarly, freewheelin diode D carries the output current durin D T s and the sum of the two inductor currents durin D 3 T s. Consequently, the current stresses are respectively: U D Ts (3) is pk = I L M + + LI L i (4) pk pk i D = I M + + pk L I L Switch and diode voltae stress. The voltae stress is the same for both diode and switch and is equal to the maximum voltae U across capacitor C. max

4 Modified control stratey As already asserted, the converter of fiure 3 achieves unity power factor at constant duty-cycle and switchin frequency, thus simplifyin the control. Unfortunately, condition (6) poses a severe limit on the allowed load rane due to the hih voltae stress correspondin to wide load variations. In order to overcome this limitation, a variable switchin frequency control can be used. In fact, from (3) we see that if the switchin frequency is kept proportional to the load current the voltae conversion ratio M becomes independent of the load. Thus, both duty-cycle and voltae stress remain constant. For example, selectin C equal to C lim for the maximum load current and substitutin into (3) we obtain: M U L D = = (5) U D Note that a minimum load current limitation must still exist in order to avoid the switchin frequency to o near zero. OPERATION AS PFP: CAPACITIVE FILTER In the scheme of fiure 3, the output inductor is the enery storae element which accounts for the low frequency input power fluctuation. As a consequence it results bulky and expensive. However, we can observe that, in order to have unity power factor, we only need to dischare capacitor C at every switchin cycle. To do this, we need a hih output inductor current i only near the peak of the line voltae. This means that the output inductor can be desined to have a hih low-frequency ripple, thus savin cost and size, without affectin the converter performances. This, of course, results in hiher current stresses in the power semiconductors. An alternative approach is to use the output capacitor as a storae element, as shown in fiure 5 (voltae-fed approach (4)). Substitutin into (5) the expressions (6) and (7) in place of M and R L, respectively, we obtain aain the voltae conversion ratio (3). Also peak voltae stress U remains unchaned, while the DCVM condition (8) becomes: I LTs C Clim () θ = D( D) sin() θ (8) U It is clear, from the above equation, that DCVM condition cannot be maintained durin the whole line period, even at maximum load current. Thus, it becomes interestin to determine θ lim, i.e the anle which separates DCVM from CCVM operation for a iven voltae stress and load rane. From (6), (4) and (8) we can derive: (9) U L θlim = sin R L min Ûmax U max R L max Equation (9) shows that in order to reduce the input current distortion a hiher voltae stress than predicted by (6) must be tolerated. For example, considerin a constant load resistance, usin the value iven by (7) for U max in the previous expression it yields θ lim = π/6. SIMULATION AND EXPERIMENTAL RESULTS In order to verify the theoretical forecasts a converter havin the followin specifications was simulated: Input voltae...u =0V rms +/- 0% Output voltae...u L =36V Output power...p L =300W Switchin frequency...f s =50kHz Converter with inductive filter Fiure 5: Ac-dc Cuk converter with capacitive filter In this case, followin the same approach outlined for the inductive filter we find that the converter operates with an apparent voltae conversion ratio m(θ) and an apparent load r( θ) iven by: U L U L m() θ= = (6) u θ U sin θ () () U L R L r () θ= = (7) i () θ sin () θ Considerin a constant load resistance, the maximum voltae stress must satisfy inequality (7), which ives a value of 58V. Choosin U max = 550V so that DCVM condition is always satisfied, we find C =80nF from (4). The other parameter values follow from (8-) and are listed in table. TABLE - Converter parameter values (inductive filter) L =mh L =68mH C =80nF C =.mf U max = 550V i = 08. A pk pk r v =0.034 r i =0. The simulated input current waveform is reported in fiure 6 in the case of minimum input voltae. As we can see the converter draws a sinusoidal current in phase with the line voltae, thus achievin unity power factor.

5 [A] i providin that the unity term into parentheses is substituted by a factor ), and, at the same time, it must sustain the maximum voltae stress. Thus, the losses due to the reverse recovery of the diode increase, as revealed by fiure 9 which reports the switch current durin a switchin period: the hih current spike at turn on is clearly visible. This phenomenon caused an efficiency of 66% at 45W output power. However, the hih current spike can be reduced by usin a faster diode [ms] Fiure 6: Simulated input current waveform at minimum line voltae Converter with capacitive filter Imposin that the value of θ lim iven by (9) with R Lmax =R Lmin is lower than 0 results in a maximum voltae stress of 800V. Thus from (4) we find C >37.5nF. The other parameter values are reported in table. Note that, inductor L was selected by imposin a constraint on its hih frequency current ripple instead of usin (), while capacitor C must now reject the whole low-frequency ripple and can be calculated usin () with r i =. Fiure 7: Measured input voltae (upper trace - 0V/div) and current (lower trace - A/div) waveforms. (Horz. ms/div) TABLE - Converter parameter values (capacitive filter) L =mh L =0.4mH C =40nF C =0mF U max = 800V i = 35. A pk pk i = 3. A pk pk r v =0.037 A prototype was built with the iven specifications. An IGBT (000V, 34A) was employed. All the followin measurements were taken at a reduced input voltae due to the dissipation problems caused by the reverse recovery of the freewheelin diode. Fiure 7 shows input voltae and current waveforms. Since at nominal conditions the value of the limit anle θ lim is low, almost unity power factor is achieved. The waveform of voltae u durin two switchin periods is shown in fiure 8, revealin the discontinuous operatin mode and, above all, the zero-voltae turn off of the switch. This behaviour reveals a poor converter exploitation since capacitor C is dischared in a small fraction of the available switch on-time. This is caused by constraint (9) which, in order to reduce the input current distortion, oblies to select a hiher voltae stress as compared to the converter with inductive filter, with a consequent lower value of capacitor C. Moreover, differently from the converter of fiure 3, current i is not constant durin the line period, but varies from zero to twice the load current (see eq. (7)). This means that at the peak of the line voltae, inductor L has more than the enery necessary to dischare C. This fact has another consequence: at the peak of the line voltae, the freewheelin diode carries a current hiher than thet iven by (4) (in practice, the same formula can be used Fiure 8: Detail of voltae u waveform durin two switchin periods taken at the peak of the line voltae (Vert. 00V/div - Horz. 4µs/div) Fiure 9: Detail of switch current waveform durin a switchin period taken at the peak of the line voltae (Vert. 5A/div - Horz. µs/div)

6 From the above considerations, we can expect a better behaviour from the converter with inductive filter. CONCLUSIONS A hih-quality rectifier employin a Cuk converter operatin in Discontinuous Capacitor Voltae Mode (DCVM) is analysed. A unity power factor is achieved with no need of duty-cycle modulation, also with capacitive output filter. This solution allows a reduction of the reactive elements at the expense of hiher voltae stresses on the power semiconductors. However, IGBT's can be profitably used at hih frequency due to the zero voltae turn-off which reduces the losses caused by the tail current. The proposed approach is suitable for smart-power interation and it is competitive in the low-voltae environment. Simulated and experimental results are reported showin actual converter performances. Acknowledements The authors would like to thank In. Oliver Glatz for his important contribution in the experimental setup and Mr. R. Sartorello for supervisin the experimental activity. References. Simonetti, D.S.L., Sebastian, J., Dos Reis, F.S., and Uceda, J., 99, IECON Conf. Proc., pp Brkovic, M., and Cuk, S., 99, INTELEC Conf. Proc., pp Spiazzi, G., Rossetto, L., 994, PESC Conf. Proc., pp Freeland, S.D., 988, Phd Thesis, Part II, CalTech. 5. Kin,, R.J., 99, IEEE Trans. on Industrial Electronics., Vol.38, NO., April, pp Addresses of the authors G.Spiazzi, L.Rossetto, P.Mattavelli, S.Buso: University of Padova, via Gradenio 6/a, 353, Padova, ITALY

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