POWERED electronic equipment with high-frequency inverters

Transcription

1 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 2, FEBRUARY A Novel Single-Stage Power-Factor-Correction Circuit With High-Frequency Resonant Energy Tank for DC-Link Inverters Yu-Lung Ke, Member, IEEE, and Ying-Chun Chuang Abstract This paper presents a novel method of power-factor correction (PFC) using a high-frequency resonant energy tank for the dc-link inverter. The proposed approach has advantages over conventional PFC techniques in terms of a lower current stress and lower switching losses. The developed PFC circuit is implemented on a series-load resonant inverter for illustrative purposes. The experimental results validate the theoretical analyses. The PFC circuit can achieve a power factor of almost one with a very low harmonic distortion. Index Terms Energy tank, inverter, power-factor correction (PFC), resonant. I. INTRODUCTION POWERED electronic equipment with high-frequency inverters is extensively adopted in several applications, including electronic ballasts, switching power supplies, and motor drives. In practice, these circuits, when consuming power from an ac line source, use a diode rectifier with a bulk capacitor to provide smooth dc-link voltages to the inverter stage. Such a rectifier circuit inevitably draws an input current of narrow pulses, which are notoriously associated with very poor power factor (PF) and serious harmonic distortion. Accordingly, a filter circuit is required in any good design of the dc-linked inverter. Among many filtering methods, the power-factor correction (PFC) technique that uses a boost converter has been demonstrated to be efficient and simple [1], [2]. This method, however, requires an additional power converter with sophisticated control, increasing cost and reducing overall efficiency. In attempts to search for a more compact, efficient, and cost-effective solution, numerous designs have been presented with single-stage converters [3] [6]. All such procedures integrate two power converters, the PFC stage and the inverter. In such an integrated circuit, the energy processing technique is the same as that of the two-stage PFC circuit. An inductor is needed to temporarily store the energy supplied from the ac line source, which is then transferred to the dc-link capacitor. The mean of the high-frequency current is made to follow the input line voltage to achieve a high PF. The inductor current can deliberately be operated at discontinuous conduction mode (DCM) Manuscript received December 4, 2004; revised June 12, This paper was recommended by Associate Editor T. Saito. The authors are with the Department of Electrical Engineering, Kun Shan University, Yung Kang City, Tainan 710, Taiwan, R.O.C. ( yulungke@ms25.hinet.net; chuang@mail.ksu.edu.tw). Digital Object Identifier /TCSII Fig. 1. PFC circuit with resonant energy tank. [2] to reduce switching losses. Hence, switching-on losses are eliminated. However, this converter is switched off at its peak current during every switching cycle, causing substantial losses. This paper develops a novel PFC circuit with a resonant energy tank, using which, both switching-on and switching-off losses can be eliminated. The presented technique can easily be integrated into the inverter stage as a single-stage high-pf inverter. An implementation of a series-load resonant inverter is illustrated as a design example. II. CIRCUIT CONFIGURATION AND ANALYSIS A. Circuit Configuration Fig. 1 presents the basic configuration of the developed PFC circuit. Rather than the inductor used in a conventional PFC circuit, an energy resonant tank that consists of an inductor and a capacitor is used for temporary energy storage. The energy tank draws current from the ac line during the switching on of the active switch S in every high-frequency switching cycle. When S is switched off, the energy stored in the energy tank is transferred to the dc-link capacitor C1 through the energy transfer diode D. The component C1 is a bulk electrolytic capacitor that provides a smooth dc-link voltage to the inverter stage. Since switch S is switched on and off at high frequency, the input current becomes a pulsating waveform at that frequency. By properly controlling the amplitude and duration of the pulsating current, the mean of the input current can be made to be sinusoidal and in phase with the input voltage. The high-frequency coomponents in the input current can simply be removed using a small filter at the input terminal. Accordingly, a PF of almost one and a very low harmonic distortion can be obtained. A comparison with the PFC circuit as a boost inductor reveals that the peak of the resonant current is smaller than the boost, as shown in Fig. 2. Additionally, the power switch can be deliberately switched off at a much smaller current, ideally at the zero current, so the switching-off loss can be reduced or even eliminated /$ IEEE

2 116 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 2, FEBRUARY 2006 where is the initial current in the inductor and Fig. 2. Comparison of resonant current and boost-type inductor current. Meanwhile, the energy stored in the capacitor of the resonant tank is released to the following stage. The time needed for the inductor current to decline to zero can be calculated by (5) in a switching cycle is ob- The mean inductor current tained as follows: (6) The effective current can be calculated as shown in Fig. 3. Current waveform of resonant energy converter. B. Circuit Operation and Analysis The PFC circuit is assumed to be supplied by the ac line voltage source (1) where is the angle of the line voltage. The mean input ac power is determined by (7) where is the peak voltage and is the line frequency. When the switch S is turned on at, the rectified line source voltage is applied on the resonant energy tank and a resonant current is drawn from the ac line source. Fig. 3 plots the waveform of the inductor current where is the resonant frequency of the resonant energy tank and. The voltage across the capacitor can be determined using (2) (3) (8) The input PF can be calculated as shown in (9) at the bottom of the page, where is the effective value of the input voltage. The ratio of the peak value of the input voltage to the dc-link voltage is Substituting (10) into (9), the PF can be rewritten as (10) The resonant frequency is designed to markedly exceed the line frequency, so the input voltage can be regarded as constant throughout a resonant cycle. When, the switch S is turned off, the diode D is turned on, and the energy stored in the inductor is delivered to the dc-link capacitor. Then, the inductor current declines linearly with time (4) For simplicity, (11) can be expressed as (11) (12) (9)

3 KE AND CHUANG: NOVEL SINGLE-STAGE POWER-FACTOR-CORRECTION CIRCUIT 117 Fig. 4. Calculated PF. Fig. 5. Proposed PFC circuit with series-load resonant inverter. Fig. 6. Theoretical waveforms for discontinuous current mode. The two complex terms, and, in the equation are (13) (14) Equation (12) demonstrates that the PF is a function of and, as plotted in Fig. 4. The PF typically increases with the voltage ratio, expect when becomes close to one. Besides, the PF is better at large.if exceeds, then a PF of unity can be obtained, regardless of the voltage ratio. III. IMPLEMENTATION ON SERIES-LOAD RESONANT INVERTER The presented technique is implemented for a half-bridge series-load resonant inverter, as displayed in Fig. 5. The circuit en- closed by dashed lines is the proposed filter circuit. It comprises a pair of resonant energy tanks and a pair of energy transfer diodes. The two resonant energy tanks generally share the inductor, L, and the active switches use the power switches of the inverter. The driving signals of Q1 and Q2 are fed by the load current. At the low voltages of rectified line source, the circuit is operated in discontinuous current mode, as shown in Fig. 6. The peak value of capacitor voltage is under and the inductor current,, is small and resonates to zero. The operation can be divided into five time intervals. During interval I, the transistor Q2 is turned on and carries both and. The capacitor,,is charged by this inductor current and is clamped at zero. At the end of this interval, the inductor current resonates at zero, and reaches its maximum. At this moment, the rectifier and the diode are reverse-biased. During interval II, the load current flows through Q2 and remains at zero. At the beginning of interval III, Q2 is switched off, and the energy stored in is transferred to the load and decreases. When the rectified line voltage exceeds, the rectifier diodes become forward biased and interval IV begins. Meanwhile, the line source begins to charge and through the inductor. However, this charging current is under, and so discharges. Accordingly, continuously declines, and eventually falls to zero. The diode D1 is turned on at the beginning of interval V, and carries the freewheeling current, which equals the difference between and. At the end of interval V, the freewheeling current is zero and the transistor Q1 is switched on. The switches are operated symmetrically and equals, so the operation in the next half of the cycle is similar to that of the first half. At the high voltages of the rectified line source, the inductor circuit is continuous and exhibits a very small ripple, as shown in Fig. 7. The operation can be divided into four time intervals. Interval I begins when Q2 is switched on. Before this time, will have been charged up and clamped at. is much larger than, so most of the inductor current flows through via, and therefore, Q2 carries only the load current. At the be-

4 118 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 53, NO. 2, FEBRUARY 2006 Fig. 9. Relationship between i (t) and i (t) at! t = =2. achieve a PF of unity. The fundamental current can be obtained from the input power and the voltage specifications. Then, the optimum capacitance can be determined using (15) Fig. 7. Fig. 8. Theoretical waveforms for continuous current mode. Calculated input current waveform. where and are the specified input power and voltage, respectively, and is the switching period of the inverter. The optimum capacitance is selected to maintain the PF close to unity. Accordingly, the switch-off angle can be determined. However, the high-frequency capacitor must not be too large, since it must be completely de-energized before the transistor on the same side can be turned on. Otherwise, the residual charge is short-circuited when the transistor is switched on. This causes a current spike that may damage the components of the circuit. The maximum voltage of the high-frequency capacitor is the dc-link voltage, so the maximum energy stored in the capacitor is determined by (16) ginning of interval II, Q2 is switched off and the energy stored in is transferred to the load. Meanwhile, the inductor current begins to charge. Although decreased, the voltage of increases rapidly because the inductor current is high, so the sum of and may reach, such that the diode becomes forward biased. Most of the inductor current flows through C1 during interval III, so continuously discharges. When is completely discharged, D1 turns on and carries the freewheeling current. When the freewheeling current is zero, Q1 is switched on and the next half-cycle begins. The conducting duration of the freewheeling diode for the discontinuous current mode is shorter than that in the continuous current mode. The conducting duration of and the switching losses decline as the input voltage increases. Fig. 8 shows the calculated input current waveform over half a cycle of the line source. In this figure, the inverter frequency is set low and the line-frequency contents are not filtered for the purposes of illustration. The input current is discontinuous throughout the lower range of the ac-line voltage, and is continuous at higher voltage. The pulsating current dithers around a sinusoidal fundamental wave, which is in phase with the input voltage. Removing the line-frequency contents yields an almost sinusoidal input current. IV. DESIGN CONSIDERATION The mean inductor current should be made to follow its fundamental wave which is in phase with the input line voltage to The capacitor energy begins to discharge immediately when the opposite transistor is switched off. The discharging rate is proportional to the difference between the load current and the boost inductor current. The load current is with constant amplitude, whereas the mean current of the inductor mostly follows the input line voltage, revealing that the discharging rate is lowest at the peak of the input line current. In practice, as displayed in Fig. 7, the inductor current around the peak point exhibits a very small ripple, and so can be assumed to be a constant. Fig. 9 indicates that the available discharging interval is around from to, in which, the load current increases and exceeds the inductor current. In other words, the transistor Q2 can only be turned off between and. This figure shows that the circuit can work properly only when the amplitude of the load current exceeds that of the input current. At the specified input power and the load current, the maximum capacitance can be determined by (17) The selected capacitance is constrained under this value if it is less than the optimum capacitance determined using (15). Under these conditions, the PF deteriorates. As mentioned earlier, the inductor also functions as a currentsmoothing reactor. A larger inductor corresponds to a smaller ripple in the input current. However, the inductance should be sufficiently small to ensure that the half-cycle resonance can be completed and the capacitor voltage can be maximized, before

5 KE AND CHUANG: NOVEL SINGLE-STAGE POWER-FACTOR-CORRECTION CIRCUIT 119 TABLE I CIRCUIT PARAMETERS Fig. 12. Measured waveforms of input line voltage and dc-link voltage. Fig. 10. Measured waveforms of inductor current and capacitor voltage at (a)! t = =8 and (b)! t = =2. Fig. 13. Experimental waveforms of input line voltage and current. 8%. The overall operating efficiency can exceed 93%. It is only slightly lower than that of the original design (93.3%). The crest factor of the lamp current is 1.38, which is the same as that of the original design without the PFC circuit, revealing that the added PFC circuit does not influence the output characteristics of the inverter stage. Fig. 11. Current waveforms of transistor, antiparallel diode, and load current at (a)! t = =8 and (b)! t = =2. the opposite transistor is switched off. Hence, after the capacitance and the switching-off angle are set, the inductance can then be obtained by (18) However, the switching-off angle may be predetermined in some practical designs, and the design procedure can be reversed. V. EXPERIMENT RESULTS The laboratory circuit in Fig. 5 was constructed to drive a compact fluorescent lamp of 36 W. The ballast is supplied by the line source of 220 V, 60 Hz. The inverter stage of the ballast is designed to operate at a switching frequency of 38 khz at a dc-link voltage of 320 V. Table I presents the circuit parameters. Figs. 10 and 11 show the measured experimental waveforms of the experiment circuit, and they are quite consistent with the simulated values. Fig. 12 shows the measured input line voltage and the dc-link voltage almost equals, so the increment in the voltage applied to the switching device caused by resonance phenomena can be ignored. Fig. 13 plots the measured input line voltage and current. This new design can achieve a high PF of over 0.99 and a low total harmonic distortion of under VI. CONCLUSION A new PFC circuit with resonant energy tanks has been presented. Theoretical and experimental results prove that a PF of almost one can be achieved. The use of two energy storage elements improves the input PF. When the active power switches are designed to be softly switched on and off at zero current, the switching losses can be completely eliminated and the efficiency increased. Furthermore, the peak inductor current is less than that associated with the conventional PFC circuit. Accordingly, a smaller inductor can be employed, and the current stresses on the power switches can be reduced. REFERENCES [1] M. Kazerani, P. D. Ziogas, and G. Joos, A novel active current waveshaping technique for solid-state input power factor conditioners, IEEE Trans. Ind. Electron., vol. 38, no. 1, pp , Feb [2] K. H. Liu and Y. L. Lin, Current waveform distortion in power factor correction circuits employing discontinuous-mode boost converters, in Proc. Conf. IEEE Power Electron. Special. Conf., 1998, pp [3] M. T. Madigan, R. W. Ericson, and E. H. Ibmail, Integrated high-quality rectified-regulator, IEEE Trans. Ind. Electron., vol. 46, no. 4, pp , Aug [4] J. Qian and F. C. Lee, A high-efficiency single-stage single-switch highpower-factor AC/DC converter with universal input, IEEE Trans. Power Electron., vol. 13, no. 4, pp , Jul [5] J. L. F. Vieira, M. A. Co, and L. D. Zorzal, High power factor electronic ballast based on a single power processing stage, in Proc. Conf. IEEE Power Electron. Special. Conf., 1995, pp [6] C. Licitra, L. Malesani, G. Spiazzi, P. Tenti, and A. Testa, Single-ended soft-switching electronic ballast with unity power factor, IEEE Trans. Ind. Appl., vol. 29, no. 2, pp , Mar./Apr