FP2189. Functional Diagram. Product Description. Product Features. Applications. Typical Performance (5) Specifications. Absolute Maximum Rating

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1 FP89 -Watt HFET Product Features 5 MHz +3 dbm PdB +3 dbm Output IP3 High Drain Efficiency MHz Lead-free/Green/RoHS-compliant SOT-89 Package MTTF > Years Applications Mobile Infrastructure CATV / DBS W-LAN / ISM RFID Defense / Homeland Security Fixed Wireless Product Description The FP89 is a high performance -Watt HFET (Heterostructure FET) in a low-cost SOT-89 surfacemount package. This device works optimally at a drain bias of +8 V and 5 ma to achieve +3 dbm output IP3 performance and an output power of +3 dbm at -db compression, while providing 8.5 db gain at 9 MHz. The device conforms to WJ Communications long history of producing high reliability and quality components. The FP89 has an associated MTTF of greater than years at a mounting temperature of 85 C and is available in both the standard SOT-89 package and the environmentally-friendly lead-free/green/rohscompliant and green SOT-89 package. All devices are % RF & DC tested. The product is targeted for use as driver amplifiers for wireless infrastructure where high performance and high efficiency are required. Functional Diagram GND 3 RF IN GND RF OUT Function Pin No. Input / Gate Output / Drain 3 Ground, Specifications DC Parameter Units Min Typ Max Saturated Drain Current, I () dss ma Transconductance, G m ms Pinch Off Voltage, V () p V -. RF Parameter (3) Units Min Typ Max Operational Bandwidth MHz 5 Test Frequency MHz 8 Small Signal db 8.5 SS (5 Ω, unmatched) db 5 Maximum Stable db Output PdB dbm +3 Output IP3 () dbm +3 Noise Figure db.5 Drain Bias 5 ma Typical Performance (5) Parameter Units Typical Frequency MHz db Input Return Loss db. 3 Output Return Loss db Output PdB dbm Output IP3 () dbm Noise Figure db IS-95 Channel -5 dbc ACPR dbm W-CDMA Ch. -5 dbc ACLR +. Drain Voltage V +8 Drain Current ma 5 5. Typical parameters represent performance in a tuned application circuit.. Idss is measured with Vgs = V, Vds = 3 V.. Pinch-off voltage is measured when Ids =. ma. 3. Test conditions unless otherwise noted: T = 5 ºC, VDS = 8 V, IDQ = 5 ma in an application circuit with ZL = ZLOPT, ZS = ZSOPT (optimized for output power).. 3OIP measured with two tones at an output power of +5 dbm/tone separated by MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a : rule. Absolute Maximum Rating Parameter Rating Operating Case Temperature - to +85 C Storage Temperature -55 to +5 C DC Power. W RF Input Power (continuous) db above Input PdB Drain to Gate Voltage, V dg + V Junction Temperature + C Operation of this device above any of these parameters may cause permanent damage. Ordering Information Part No. FP89-G FP89-PCB9S FP89-PCB9S FP89-PCBS Description -Watt HFET (lead-free/green/rohs-compliant SOT-89 package) 87 9 MHz Application Circuit MHz Application Circuit 7 MHz Application Circuit WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

2 -. FP89 -Watt HFET Typical Device Data S-Parameters (V DS = +8 V, I DS = 5 ma, T = 5 C, calibrated to device leads) S, MSG (db) 3 S and Maximum Stable S MSG S Swp Max GHz S Swp Max GHz Frequency (GHz) Note: Measurements were made on the packaged device in a test fixture with 5 ohm input and output lines. The S-parameters shown are the de-embedded data down to the device leads and represents typical performance of the device Swp Min.GHz Swp Min.GHz Freq (MHz) S (mag) S (ang) S (mag) S (ang) S (mag) S (ang) S (mag) S (ang) Device S-parameters are available for download off of the website at: Load-Pull Data at.9 GHz (V ds = 8 V, I ds = 5 ma, 5 C, Z S = 5 Ω) GHz r 9. Ohm x. Ohm Output IP Swp Max GHz GHz r Ohm x Ohm PdB Swp Max GHz Swp Min e-9ghz Maximum IP3 = +5 dbm at Z L = 9 + j Ω Swp Min e-9ghz Maximum PdB = +3.9 dbm at Z L = + j Ω WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

3 FP89 -Watt HFET Application Circuit: 87 9 MHz (FP89-PCB9S) The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, I ds = 5 ma, 5 C Frequency MHz S db S Input Return Loss db S Output Return Loss db Output PdB dbm Output IP3 (+5 dbm / tone, MHz spacing) dbm +.8 Noise Figure db..5.5 IS-95 Channel -5 dbc ACPR dbm +.5 ID= C3 ID= C C= pf C= pf ID= C 5 ma -Vgg ID= C C= e 5 p F ID= R R= Ohm ID= C ID= C8 C= pf ID= C3 C= DNP p F ID= C7 C= pf P= Z= 5 Ohm ID= C C= pf ID= C C= DNP p F ID= L L= 5. nh ID= L L= 8 nh SUBCKT ID= Q NET= "FP89" ID= L L= 5. nh ID= C ID= L3 L= 8 nh ID= C9 C= p F P= Z= 5 Ohm ID= C5 C=.7 pf ID= C ID= R R= Ohm ID= C5 C=. p F Bill of Materials Ref. Desig. Value Part style Size C, C3, C7, C9, C3 pf Chip capacitor 3 C, C8 pf Chip capacitor 3 C5. pf Chip capacitor 3 C. µf Chip capacitor L 8 nh Multilayer chip inductor 3 L, L 5. nh Multilayer chip inductor 3 L3 8 nh Multilayer chip inductor 3 R Ω Chip resistor 3 R Ω Chip resistor 3 Q FP89 WJ W HFET SOT-89 C, C, C, C, C Do Not Place mil GETEK TM MLDSS (εr =.) The main microstrip line has a line impedance of 5 Ω. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page 3 of October

4 FP89 -Watt HFET FP89-PCB9S Application Circuit Performance Plots S (db) PdB (dbm) OIP3 (dbm) S vs. Frequency -c +5c +85c PdB vs. Frequency freq = 95, 9 MHz +5 dbm / tone -c +5c +85c OIP3 vs. Temperature Temperature ( C) S (db) NF (db) IMD products (dbm) S vs. Frequency -c +5c +85c Noise Figure vs. Frequency c +5c +85c IMD products vs. fundamental frequency = 95 MHz, 9 MHz; Temp = +5 C IMD_Low IMD_High 8 S (db) ACPR (dbc) OIP3 (dbm) S vs. Frequency -c +5c +85c freq = 95 MHz ACPR vs. Channel Power IS-95, 9 Ch. Forward, ±885 khz offset, 3 khz Meas BW - C +5 C +85 C 3 5 Output Channel Power (dbm) OIP3 vs. fundamental frequency = 95 MHz, 9 MHz; Temp = +5 C 8 frequency = 95 MHz, Temp = - C frequency = 95 MHz, Temp = +85 C frequency = 95 MHz, Temp = +5 C WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

5 FP89 -Watt HFET Application Circuit: MHz (FP89-PCB9S) The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, I ds = 5 ma, 5 C Frequency MHz S db S Input Return Loss db S Output Return Loss db Output PdB dbm Output IP3 (+5 dbm / tone, MHz spacing) dbm +3.5 Noise Figure db IS-95 Channel -5 dbc ACPR dbm +3.8 ID= C3 ID= C ID= C C= pf -Vgg ID= R R= Ohm ID= C 5 ma ID= C8 C= pf ID= C C= pf P= Z= 5 Ohm ID= C C=. pf ID= C ID= L L= nh ID= R R= 5. Ohm ID= C7 SUBCKT ID= Q NET= "FP89" ID= L L= nh ID= C9 P= Z= 5 Ohm ID= C3 C=. pf ID= C ID= C5 ID= C C=.5 pf Bill of Materials Ref. Desig. Value Part style Size C, C3, C7, C9 pf Chip capacitor 3 C, C3. pf Chip capacitor 3 C, C pf Chip capacitor 3 C8. µf Chip capacitor C.5 pf Chip capacitor 3 L nh Multilayer chip inductor 3 L nh Multilayer chip inductor 3 R Ω Chip resistor 3 R 5. Ω Chip resistor 3 Q FP89 WJ W HFET SOT-89 C5, C, C, C Do Not Place mil GETEK TM MLDSS (ε r =.) The main microstrip line has a line impedance of 5 Ω. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page 5 of October

6 FP89 -Watt HFET FP89-PCB9S Application Circuit Performance Plots S vs. Frequency 7 S vs. Frequency S vs. Frequency S (db) PdB (dbm) OIP3 (dbm) C +5C +85C PdB vs. Frequency freq = 9, 9 MHz +5 dbm / tone -c +5c +85c OIP3 vs. Temperature Temperature ( C) S (db) NF (db) IMD products (dbm) C +5C +85C Noise Figure vs. Frequency c +5c +85c IMD products vs. fundamental frequency = 9, 9 MHz; Temp = +5 C IMD_Low IMD_High 8 S (db) ACPR (dbc) OIP3 (dbm) C +5C +85C freq = 9 MHz ACPR vs. Channel Power IS-95, 9 Ch. Forward, ±885 khz offset, 3 khz Meas BW - C +5 C +85 C Output Channel Power (dbm) OIP3 vs. fundamental frequency = 9, 9 MHz; Temp = +5 C 8 8 frequency = 9 MHz, Temp = - C 8 frequency = 9 MHz, Temp = +5 C 8 frequency = 9 MHz, Temp = +85 C WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

7 FP89 -Watt HFET Application Circuit: 7 MHz (FP89-PCBS) The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, I ds = 5 ma, 5 C Frequency MHz 7 S db... S Input Return Loss db S Output Return Loss db Output PdB dbm Output IP3 (+5 dbm / tone, MHz spacing) dbm +3.9 Noise Figure db..5.3 W-CDMA Channel -5 dbc ACPR dbm +. ID= C3 5 ma P= Z= 5 Ohm -Vgg ID= R R= Ohm ID= C C=.8 pf ID= C ID= L L= 5. nh ID= R R=. Ohm ID= C8 C= pf ID= C C= pf ID= C7 C= pf SUBCKT ID= Q NET= "FP89" ID= L L= 8 nh ID= C9 C= pf P= Z= 5 Ohm ID= C ID= C C=.8 pf ID= C5 ID= C C= pf Bill of Materials Ref. Desig. Value Part style Size C, C.8 pf Chip capacitor 3 C3 33 pf Chip capacitor 85 C, C9 pf Chip capacitor 3 C7 pf Chip capacitor 3 C8. µf Chip capacitor C. pf Chip capacitor 3 L 5. nh Multilayer chip inductor 3 L 8 nh Multilayer chip inductor 3 R Ω Chip resistor 3 R. Ω Chip resistor 3 Q FP89 WJ W HFET SOT-89 C, C, C5 Do Not Place mil GETEK TM MLDSS (ε r =.) The main microstrip line has a line impedance of 5 Ω. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page 7 of October

8 FP89 -Watt HFET FP89-PCBS Application Circuit Performance Plots S (db) PdB (dbm) OIP3 (dbm) S vs. Frequency -c +5c +85c PdB vs. Frequency freq =, MHz +5 dbm / tone -C +5C +85C OIP3 vs. Temperature Temperature ( C) S (db) NF (db) IMD products (dbm) S vs. Frequency -c +5c +85c Noise Figure vs. Frequency -C +5C +85C IMD products vs. fundamental frequency =, MHz; Temp = +5 C IMD_Low IMD_High 8 S (db) ACPR (dbc) OIP3 (dbm) S vs. Frequency -c +5c +85c freq = MHz ACPR vs. Channel Power 3GPP W-CDMA, Test Model + DPCH, ±5 MHz offset - C +5 C +85 C Output Channel Power (dbm) OIP3 vs. fundamental frequency =, MHz; Temp = +5 C 8 frequency = MHz, Temp = - C frequency = MHz, Temp = +5 C frequency = MHz, Temp = +85 C 8 mil GETEK TM MLDSS (εr =.) The layout of this circuit 8 can be downloaded from the website WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page 8 of October

9 FP89 -Watt HFET Reference Design: MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, I ds = 5 ma, 5 C Frequency MHz 5 S db S Input Return Loss db S Output Return Loss db Output PdB dbm Output IP3 (+5 dbm / tone, MHz spacing) dbm (db) - - S-Parameters DB( S[,] ) DB( S[,] ) DB( S[,] ) The.. GHz Reference Circuit is shown for design purposes only. An evaluation board is not readily available for this application. The reader can obtain an FP89-PCBS evaluation board and modify it with the circuit shown to achieve the performance shown in this reference design Frequency (GHz) ID= C3 5 ma -Vgg ID= R R= Ohm ID= C ID= C8 C= e pf ID= C C= pf P= Z= 5 Ohm ID= L L= 5. nh ID= C C= pf TLIN ID= TL Z= 5 Ohm EL=.8 Deg F= MHz ID= R R= 5. Ohm SUBCKT ID= Q NET= "FP89" ID= C7 C= pf TLIN ID= TL Z= 5 Ohm EL= 3.5 Deg F= MHz ID= L L= 8 nh ID= C9 C= pf P= Z= 5 Ohm ID= C ID= C C=.8 pf ID= C5 C=.3 pf Bill of Materials Ref. Desig. Value Part style Size C, C, C9 pf Chip capacitor 3 C3 33 pf Chip capacitor 85 C5.3 pf Chip capacitor 3 C.8 pf Chip capacitor 3 C7 pf Chip capacitor 3 C8. µf Chip capacitor L 5. nh Multilayer chip inductor 3 L 8 nh Multilayer chip inductor 3 R Ω Chip resistor 3 R 5. Ω Chip resistor 3 Q FP89 WJ W HFET SOT-89 C, C Do Not Place mil GETEK TM MLDSS (ε r =.) The main microstrip line has a line impedance of 5 Ω. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page 9 of October

10 FP89 -Watt HFET Reference Design: 3 3 MHz The application circuit is matched for output power. Typical RF Performance Drain Bias = +8 V, I ds = 5 ma, 5 C Frequency MHz S db S Input Return Loss db S Output Return Loss db Output PdB dbm Output IP3 (+5 dbm / tone, MHz spacing) dbm (db) - - S-Parameters DB( S[,] ) DB( S[,] ) DB( S[,] ) The GHz Reference Circuit is shown for design purposes only. An evaluation board is not readily available for this application. The reader can obtain an FP89-PCBS evaluation board and modify it with the circuit shown to achieve the performance shown in this reference design Frequency (GHz) 5 ma -Vgg ID= R R= Ohm ID= C3 ID= C ID= C8 C= e pf ID= C C= pf P= Z= 5 Ohm ID= C C= pf ID= L3 L=.7 nh ID= L L= 5. nh ID= R R=. Ohm ID= C7 C= pf SUBCKT ID= Q NET= "FP89" ID= L L= 5 nh P= Z= 5 Ohm ID= C C=.3 pf ID= C C=. pf ID= C5 C=.7 pf ID= C9 C= pf Bill of Materials Ref. Desig. Value Part style Size C, C7, C9 pf Chip capacitor 3 C3 33 pf Chip capacitor 85 C. pf Chip capacitor 3 C5.7 pf Chip capacitor 3 C pf Chip capacitor 3 C8. µf Chip capacitor C.3 pf Chip capacitor 3 L 5. nh Multilayer chip inductor 3 L 5 nh Multilayer chip inductor 3 L3.7 nh Multilayer chip inductor 3 R Ω Chip resistor 3 R. Ω Chip resistor 3 Q FP89 WJ W HFET SOT-89 C Do Not Place mil GETEK TM MLDSS (ε r =.) The main microstrip line has a line impedance of 5 Ω. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

11 FP89 -Watt HFET Application Note: Constant-Current Active-Biasing Special attention should be taken to properly bias the FP89. Power supply sequencing is required to prevent the device from operating at % Idss for a prolonged period of time and possibly causing damage to the device. It is recommended that for the safest operation, the negative supply be first on and last off. With a negative gate voltage present, the drain voltage can then be applied to the device. The gate voltage can then be adjusted to have the device be used at the proper quiescent bias condition. An optional active-bias current mirror is recommended for use with the application circuits shown in this datasheet. Generally in a laboratory environment, the gate voltage is adjusted until the drain draws the recommended operating current. The gate voltage required can vary slightly from device to device because of device pinchoff variation, while also varying slightly over temperature. The active-bias circuit, shown on the right, uses dual PNP transistors to provide a constant drain current into the FP89, while also eliminating the effects of pinchoff variation. This configuration is best suited for applications where the intended output power level of the amplifier is backed off at least db away from its compression point. With the implementation of the circuit, lower PdB values may be measured for a Class-AB amplifier, where the device will attempt to source more drain current while the circuit tries to provide a constant drain current. The circuit should be connected directly in line with where the voltage supplies would be normally connected with the amplifier circuit, as shown the diagram. Any required matching circuitry remains the same, although it is not shown in the diagram. This recommended active-bias constant-current circuit adds 7 components to the parts count for implementation, but should cost only an extra $. to realize ($. for U, $.9 for R, R3, R, R5, $. for R, and $.85 for C). Temperature compensation is achieved by tracking the voltage variation with the temperature of the emitter-to-base junction of the two PNP transistors. As a st order approximation, this is achieved by using matched transistors with approximately the same Ibe current. Thus the transistor emitter voltage adjusts the HFET gate voltage so that the device draws a constant current, regardless of the temperature. A Rohm dual transistor - UMTN - is recommended for cost, minimal board space requirements, and to minimize the variation between the two transistors. Minimizing the variability between the base-to-emitter junctions allow more accuracy in setting the current draw. More details can be found in a separate application note Active-bias Constant-current Source Recommended for HFETs found on the WJ website. R R3 3 5 R U Rohm UMTN R5 +V dd -V gg R kω RF IN M.N. Parameter Pos Supply, Vdd Neg Supply, Vgg Vds Ids R R R3 R R5 C. µf DUT FP89 +8 V -5 V V 5 ma Ω. Ω.8 kω kω kω M.N. HFET Application Circuit RF OUT *R should be of size 85 to dissipate.5 Watts. This should be of % tolerance. Two. Ω resistors in parallel of size 3 can also be used. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October

12 FP89 -Watt HFET FP89-G Mechanical Information This package is lead-free/green/rohs-compliant. It is compatible with both lead-free (maximum C reflow temperature) and leaded (maximum 5 C reflow temperature) soldering processes. The plating material on the leads is NiPdAu. Outline Drawing Product Marking The FP89-G will be marked with an FPG designator. An alphanumeric lot code ( XXXX-X ) is also marked below the part designator on the top surface of the package. The obsolete tin-lead package is marked with an FP89 designator followed by an alphanumeric lot code. Tape and reel specifications for this part are located on the website in the Application Notes section. Land Pattern MSL / ESD Rating ESD Rating: Class B Value: Passes 5V to <V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD-A ESD Rating: Class IV Value: Passes at V min. Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD-C MSL Rating: Level 3 at + C convection reflow Standard: JEDEC Standard J-STD- Thermal Specifications Parameter Rating Operating Case Temperature - to +85 C Thermal Resistance, Rth () 35 C/W Junction Temperature, Tj () 55 C. The thermal resistance is referenced from the hottest part of the junction to the ground tab (pin ).. This corresponds to the typical drain biasing condition of +8V, 5 ma at an 85 C case temperature. A minimum MTTF of million hours is achieved for junction temperatures below C. M T T F (m illio n h rs ) MTTF vs. GND Tab Temperature Tab Temperature ( C) Mounting Config. Notes. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.35mm (#8 /.35 ) diameter drill and have a final plated thru diameter of.5 mm (. ).. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. 3. Mounting screws can be added near the part to fasten the board to a heatsink. Ensure that the ground / thermal via region contacts the heatsink.. Do not put solder mask on the backside of the PC board in the region where the board contacts the heatsink. 5. RF trace width depends upon the PC board material and construction.. Use oz. Copper minimum. 7. All dimensions are in millimeters (inches). Angles are in degrees. WJ Communications, Inc Phone -8-WJ- FAX: sales@wj.com Web site: Page of October