AH322-S8G. Not Recommended for New Designs. Applications. Product Features. Functional Block Diagram. General Description.

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1 Applications Repeaters Base Station Transceivers High Power Amplifiers Mobile Infrastructure LTE / WCDMA / CDMA / WiMAX SOIC- Package Product Features Functional Block Diagram -7 MHz.7 db Gain at MHz + dbm PdB + dbm Output IP ma Quiescent Current + V Single Supply MTTF > Years Lead-free/RoHS-compliant SOIC- Package Vbias N/C _In N/C Pin Reference Mark Iref 7 _Out 6 _Out N/C Backside Paddle - /DC GND General Description The AH is a high dynamic range driver amplifier in a low-cost surface-mount package. The InGaP/GaAs HBT is able to achieve high performance for various narrowband-tuned application circuits with up to + dbm OIP and + dbm of compressed db power. The integrated active bias circuitry in the devices enables excellent stable linearity performance over temperature. It is housed in a lead-free/rohs-compliant SOIC- package. All devices are % and DC tested. The AH is targeted for use as a driver amplifier in wireless infrastructure where high linearity and medium power is required. The AH is ideal for the final stage of small repeaters or as driver stages for high power amplifiers. In addition, the amplifier can be used for a wide variety of other applications within the to 7 MHz frequency band. Pin Configuration Pin No. Label Vbias,, N/C _in 6, 7 _Out Iref Backside Paddle /DC GND Not Recommended for New Designs Recommended Replacement Part: TQP7M9 Ordering Information Part No. Description High Linearity InGaP HBT Amplifier Standard tape / reel size = pieces on a 7 reel Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

2 Absolute Maximum Ratings Parameter Rating Storage Temperature -6 to C Input Power, CW, Ω, T= C Device Voltage (VCC) Device Current Device Power Input PdB + V ma W Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units Device Voltage (VCC)... V Case Temperature + C Tj for > 6 hours MTTF + C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: VCC=+ V, ICQ= ma, Temp= + C, tuned application circuit Parameter Conditions Min Typ Max Units Operational Frequency Range 7 MHz Test Frequency MHz Gain.7 db Input R.L.. db Output R.L. db Output PdB dbm Output IP Pout = + dbm/tone, Δf= MHz + +. dbm WCDMA Channel Power () ACLR= - dbc +. dbm Noise Figure 7.7 db Quiescent Current, Icq () 6 ma Iref Thermal Resistance, ƟJC Junction to backside paddle.6 C. ACLR Test set-up: GPP WCDMA, TM+6 DPCH, + MHz offset, PAR =. db at.% Probability.. This corresponds to the quiescent current or operating current under small-signal conditions into pins 6 and 7. Performance Summary Table Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C, frequency specific application circuits Parameter Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output PdB db Output IP (Pout= +7 dbm/tone, Δf = MHz) dbm WCDMA Channel Power (ACPR = dbc) dbm. For 7 MHz, 9 MHz, MHz, 96 MHz, and 6 MHz; Pout/tone=+ dbm.. For MHz; Pout/tone=+ dbm. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

3 Gain (db) Device Characterization Data Test Conditions: VCC = + V, ICQ = ma, T = C, unmatched ohm system, calibrated to device leads) Gain / Maximum Stable Gain Temp.=+ C GMAX S -... Frequency (GHz) GHz Input Smith Chart GHz Output Smith Chart GHz. GHz Note: The gain for the unmatched device in ohm system (S) is shown as the solid trace in the gain plot above. For a tuned circuit for a particular frequency, it is expected that actual gain will be higher, up to the maximum stable gain (GMAX) plotted as a dashed line. S-Parameters Test Conditions: VCC = + V, ICQ = ma, T = C, unmatched ohm system, calibrated to device leads) Freq (GHz) S (db) S (ang) S (db) S (ang) S (db) S (ang) S (db) S (ang) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

4 7 - MHz Application Circuit Vcc=+V Vbias + C DNP VREF R6 R R DNP DNP SMTG R Vpd 6. uf 6.7uF C pf Input pf C 9. L nh.pf R C pf pf C pf L AH 7 6 7pF nh. nh pf C DNP pf Output J L R R6 C J C C L R J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of R is placed at mils from the edge of AH in pin pad (. 7 MHz). The edge of is placed at mils from the edge of component R (. 7 MHz).. The edge of is placed at 7 mils from the edge of AH out pin pad (7 7 MHz).. L is placed against the edge of. 6. is critical for linearity performance. 7. Do not exceed +.V supply or TVS diode will be damaged.. Ω jumpers may be replaced with copper traces in the target application layout. 9. DNP implies Do Not Place.. (Ferrite Bead) prevents bias line resonances by isolating and. Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

5 ACLR (dbc) EVM (%) OIP (dbm) Gain (db) Return Loss (db) PdB (dbm) Typical Performance 7 - MHz Test conditions unless otherwise noted: VCC = + V, ICQ = 6 ma, TLEAD = C Parameter Conditions Typical Value Units Frequency 7 7 MHz Gain db Input Return Loss. 7 db Output Return Loss db Output PdB dbm Channel Power ().% EVM dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm. EVM Test set-up:.6 OFDMA, 6QAM ½, FFT, symbols, subchannels.. ACLR test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR =. Prob. Performance Plots 7 - MHz Small Signal Performance +C Return Loss vs. Frequency PdB vs. Frequency 9 - S S ACLR vs. Pout vs. Freq GPP WCDMA, TM± 6DPCH, ±MHz Offset, 7 EVM vs. Pout vs. Freq OFDM, QAM-6, Mb/s, OIP vs. Pout/Tone vs. Freq MHz Spacing, MHz 7 MHz MHz 6 7 MHz 7 MHz MHz 7 MHz 7 MHz MHz Pout (dbm) 6 7 Pout (dbm) 6 6 Pout / tone (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

6 - 9 MHz Application Circuit Vcc=+V Vbias + C. uf VREF R6 R R DNP DNP SMTG R Vpd 6. uf 6.7uF C pf Input pf C pf L.9 pf 6.pF pf C pf L AH 7 6 7pF nh DNP C pf. pf Output J L R R6 C C J C C L C J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of L is placed at 6 mils from edge of AH out pin pad MHz).. The edge of C is placed at mils from edge of AH out pin pad MHz).. The edge of is placed at mils from edge of AH out pin pad MHz).. is critical for linearity performance. 6. Do not exceed +.V supply or TVS diode will be damaged. 7. Zero ohm jumpers may be replaced with copper traces in the target application layout.. DNP implies Do Not Place. 9. (Ferrite Bead) prevents bias line resonances by isolating and C.Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

7 ACLR (dbc) ACPR (dbc) OIP (dbm) Gain (db) Return Loss (db) PdB (dbm) Typical Performance - 9 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = 6 ma, TLEAD = C Parameter Conditions Typical Value Units Frequency 9 MHz Gain db Input Return Loss 6 6 db Output Return Loss 7 db Output PdB dbm Channel Power ().% EVM dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm. EVM Test set-up: IS-9CDMA, 9 channels fwd, ±7 KHz offset, KHz Meas BW, PAR=9.7 db@.% Prob.. ACLR test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR =. Prob. Performance Plots - 9 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = 6 ma, TLEAD = C Small Signal Performance Return Loss vs. Frequency PdB vs. Frequency 9 - S S ACLR vs. Pout vs. Freq GPP WCDMA,TM±6DPCH,±MHz Offset Freq., - ACPR vs. Pout vs. Frequency IS-9 CDMA, 9 CH. Fwd., ±7 KHz offset Frequency, OIP vs. Pout/Tone vs. Freq MHz spacing, ºC MHz MHz 9 MHz MHz MHz 9 MHz MHz MHz 9 MHz Output Channel Power (dbm) -7 6 Output Channel Power (dbm) 6 Pout / tone (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

8 9-96 MHz Application Circuit (AH-SPCB9) Vbias Vcc=+V R6 VREF C SMTG Vpd.7uF. uf R 6. Input pf C pf.7 pf L. nh pf L AH 7 6 pf nh. pf pf Output J L R R6 C J C L J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of L is placed at mils from the edge of AH in pin pad ( 9 MHz). The edge of is placed at 7 mils from the edge of AH in pin pad (. 9 MHz).. The edge of is placed at 7 mils from the edge of AH in pin pad (. 9 MHz). The edge of is placed at 9 mils from the edge of AH out pin pad (9.6 9 MHz). 6. is critical for linearity performance. 7. Do not exceed +.V supply or TVS diode will be damaged.. Ω jumpers may be replaced with copper traces in the target application layout. 9. DNP implies Do Not Place.. (Ferrite Bead) prevents bias line resonances by isolating and. Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

9 Noise Figure (db) ACLR (dbc) OIP (dbm) Gain (db) Output Return Loss (db) PdB (dbm) Typical Performance AH-SPCB9 Test conditions unless otherwise noted: VCC = + V, ICQ = 6 ma, TLEAD = C Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss.6. db Output Return Loss db Output PdB dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm Noise Figure db. ACLR Test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR=.dB@.% Prob. Performance Plots AH-SPCB9 Test conditions unless otherwise noted: VCC = + V, ICQ = 6 ma, TLEAD = C Gain vs. Frequency Temp.=+ C Return Loss vs. Frequency Temp.=+ C PdB vs. Frequency +C - S S Noise Figure vs. Frequency +C - ACLR vs. Pout vs Freq. GPP WCDMA, TM ±6DPCH, ±MHz Offset, +C OIP vs. Pout/Tone over Frequency MHz spacing, C MHz 9 MHz 96 MHz MHz 9 MHz 96 MHz Output Power (dbm) 6 6 Pout/tone (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

10 - MHz Application Circuit Vcc=+V Vbias + C. uf VREF R6 R R DNP DNP SMTG R Vpd 6 uf 6.7uF C pf Input pf C pf L DNP. pf. pf C pf L AH 7 6 nh pf nh. pf pf C pf DNP Output J L R R6 C C J C C J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of is placed at mils from the edge of AH out pin pad ( MHz).. is placed against the edge of.. The multilayer inductor (nh) is critical for linearity performance.. Do not exceed +.V supply or TVS diode will be damaged. 6. Ω jumpers may be replaced with copper traces in the target application layout. 7. DNP implies Do Not Place.. (Ferrite Bead) prevents bias line resonances by isolating and C.Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

11 OIP (dbm) Icc (ma) ACLR (dbc) S (db) Return Loss (db) PdB (dbm) Typical Performance - MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Parameter Conditions Typical Value Units Frequency MHz Gain..6.7 db Input Return Loss 7 9 db Output Return Loss 7.7. db Output PdB dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm Noise Figure db. ACLR Test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR=.dB@.% Prob. Performance Plots - MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C S vs. Frequency Return Loss vs. Frequency PdB vs. Frequency S S MHz MHz MHz OIP vs Pout/Tone vs. Freq MHz spacing, ºC 6 6 Icc vs. Pout GPP WCDMA, TM±6DPCH, ±MHz Offset, ACLR vs. Pout vs. Freq GPP WCDMA, TM±6DPCH, ±MHz Offset, MHz MHz MHz Output Power / Tone (dbm) Pout (dbm) -6 Output Power (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

12 9-99 MHz Application Circuit (AH-SPCB96) Vcc=+V Vbias + R6 VREF uf 6 Vpd C. uf R SMTG 6 C.7 uf Input pf C pf L DNP. pf. pf L AH 7 6 nh pf nh.7 pf.7 pf pf Output J L R R6 C J C J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of is placed at mils from the edge of AH in pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH in pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH out pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH out pin pad ( 96 MHz). 6. The multilayer inductor (nh) is critical for linearity performance. 7. Do not exceed +.V supply or TVS diode will be damaged.. Ω jumpers may be replaced with copper traces in the target application layout. 9. DNP implies Do Not Place.. (Ferrite Bead) prevents bias line resonances by isolating and C. Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

13 OIP (dbm) ACLR (dbc) OIP (dbm) S (db) Magnitude (db) PdB (dbm) Typical Performance 9-99 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Parameter Conditions Typical Value Units Frequency MHz Gain... db Input Return Loss..6. db Output Return Loss..9.6 db Output PdB dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm Noise Figure db. ACLR Test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR=.dB@.% Prob. Performance Plots 9-99 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C S vs. Frequency +C Return Loss vs. Frequency +C PdB vs. Frequency - - S - -6 S OIP vs. Pout/Tone vs. Freq MHz spacing, +C - ACLR vs. Pout vs. Freq GPP WCDMA, TM+6DPCH, ±MHz Offset, +C OIP vs. Frequency MHz, +C - 99 MHz 9 MHz 96 MHz 99 MHz 9 MHz - 96 MHz Pout / Tone (dbm) -6 6 Channel Output Power (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

14 - MHz Application Circuit (AH-SPCB) Vcc=+V Vbias + R6 VREF uf 6 Vpd C. uf R SMTG 6 C pf Input pf C pf L DNP. pf. pf C pf L AH 7 6 nh pf nh.6 pf. pf C DNP pf Output J L R R6 C C J C C J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of is placed at mils from the edge of AH in pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH in pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH out pin pad (. 96 MHz).. The edge of is placed at mils from the edge of AH out pin pad ( 96 MHz). 6. The multilayer inductor (nh) is critical for linearity performance. 7. Do not exceed +.V supply or TVS diode will be damaged.. Ω jumpers may be replaced with copper traces in the target application layout. 9. DNP implies Do Not Place.. (Ferrite Bead) prevents bias line resonances by isolating and C. Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

15 Icc (ma) ACLR (dbc) OIP (dbm) Gain (db) Magnitude (db) PdB (dbm) Typical Performance AH-SPCB Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Parameter Conditions Typical Value Units Frequency 7 MHz Gain db Input Return Loss. db Output Return Loss 7. db Output PdB dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm Noise Figure db. ACLR Test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset, PAR=.dB@.% Prob. Performance Plots AH-SPCB Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Gain vs. Frequency ⁰C Return Loss vs. Frequency ⁰C PdB vs. Frequency ⁰C - S - - S Icc vs. Pout MHz,GPP WCDMA,TM+6DPCH,MHz Offset,⁰C - ACLR vs. Pout over Frequency GPP WCDMA, TM+6DPCH, MHz Offset, ⁰C 6 OIP vs. Pout/tone over Frequency MHz Spacing, ⁰C MHz 7 MHz MHz 6 - MHz 7 MHz MHz 6 Pout (dbm) -6 6 Pout (dbm) 6 Pout/tone (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

16 7-7 MHz Application Circuit Vcc=+V Vbias + C. uf VREF R6 R R DNP DNP SMTG R Vpd 6 uf 6.7uF C pf Input pf C pf L DNP. pf. pf C pf L AH 7 6 nh pf nh. pf. pf C pf DNP Output J L R R6 C C J R C C J. Vref can be used as device power down voltage (low = off) by swapping with R.. The edge of is placed at 6 mils from the edge of AH out pin pad (.6 6 MHz).. The edge of is placed at. mils from the edge of AH out pin pad ( 6 MHz).. The multilayer inductor ( nh) is critical for linearity performance.. Zero ohm jumpers may be replaced with copper traces in the target application layout. 6. DNP means Do Not Place. 7. (Ferrite Bead) prevents bias line resonances by isolating and C.Steward MI6KR-. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

17 ACLR (dbc) PdB (dbm) OIP (dbm) Gain (db) Return Loss (db) EVM (%) Typical Performance 7-7 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Parameter Conditions Typical Value Units Frequency MHz Gain..6. db Input Return Loss 6.7. db Output Return Loss db Output PdB dbm Channel Power ().% EVM dbm WCDMA Channel Power () ACPR = dbc dbm Output IP Pout= + dbm/tone, Δf = MHz dbm Noise Figure db. EVM Test set-up:.6 OFDMA, 6QAM ½, FFT, symbols, subchannels.. ACLR test set-up: GPP WCDMA, TM±6 DPCH, ± MHz offset PAR =. Prob. Performance Plots 7-7 MHz Test conditions unless otherwise noted: VCC = + V, ICQ = ma, TLEAD = C Small Signal Performance Return Loss vs. Frequency 6 EVM vs Pout vs. Freq OFDM, QAM-6-/, Mb/s S S 7 MHz 6 MHz 7 MHz Pout (dbm) - ACLR vs. Pout vs. Freq GPP WCDMA, TM+6DPCH, +MHz offset, +C PdB vs. Frequency OIP vs Pout/Tone vs. Freq MHz spacing, C MHz 6 MHz 7 MHz 6 7 MHz 6 MHz 7 MHz Output Channel Power (dbm) Pout/tone (dbm) Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

18 Pin Configuration and Description Pin Reference Mark Vbias Iref N/C 7 _Out _In 6 _Out N/C N/C Backside Paddle - /DC GND Pin No. Label Description Vref Voltage supply for active bias. Connect to same supply voltage as Vcc.,, N/C or GND No internal connection. This pin can be grounded or N/C on PCB. Input Input. Requires matching for operation. 6, 7 Output Output and DC supply voltage. Iref Reference current into internal active bias current mirror. Current into Iref sets device quiescent current. Also, can be used as on/off control. Backside Paddle /DC GND Backside Paddle. Multiple vias should be employed to minimize inductance and thermal resistance. See PCB Mounting Pattern for suggested footprint. Evaluation Board PCB Information TriQuint PCB 7 Material and Stack-up.".6 ±.6 Finished Board Thickness." Nelco N-- Nelco N-- ε r =.7 typ. Nelco N-- oz. Cu top layer oz. Cu inner layer oz. Cu inner layer oz. Cu bottom layer Microstrip line details: width =., spacing =.6 The silk screen markers A, B, C, etc. and,,, etc. are used as place markers for critical tuning components. The markers and vias are spaced in. increments. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

19 Package Marking and Dimensions Package Marking: Part Number AHG Lot Code YXXX Z PCB Mounting Pattern. A heat sink underneath the area of the PCB for the mounted device is strictly required for proper thermal operation. Damage to the device can occur without the use of one.. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.mm (# /. ) diameter drill and have a final plated thru diameter of. mm (. ) or equivalent.. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance.. Mounting screws can be added near the part to fasten the board to a heat sink. Ensure that the ground / thermal via region contact the heat sink.. Do not put solder mask on the backside of the PC board in the region where the board contacts the heat sink. 6. Trace width depends upon the PC board material and construction. 7. Use oz. Copper minimum.. All dimensions are in millimeters (inches). Angles are in degrees. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

JEDEC Standard JESD-F MSL Rating MSL Rating: Level Test: 6 C convection reflow Standard: JEDEC Standard JS-- Solderability Compatible with both lead-free (6 C max.

20 Product Compliance Information ESD Sensitivity Ratings Caution! ESD-Sensitive Device ESD Rating: Class C Value: V to < V Test: Human Body Model (HBM) Standard: JEDEC Standard JESD-A ESD Rating: Class Value: Passes V Test: Charged Device Model (CDM) Standard: JEDEC Standard JESD-F MSL Rating MSL Rating: Level Test: 6 C convection reflow Standard: JEDEC Standard JS-- Solderability Compatible with both lead-free (6 C max. reflow temperature) and tin/lead ( C max. reflow temperature) soldering processes. Package contact plating: NiPdAu This part is compliant with EU /9/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). This product also has the following attributes: Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (HBr) Free PFOS Free SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: Tel: customer.support@qorvo.com For information about the merger of MD and TriQuint as Qorvo: Web: For technical questions and application information: sjcapplications.engineering@qorvo.com Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or lifesustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Datasheet: Rev D of - Disclaimer: Subject to change without notice 6 TriQuint Semiconductor, Inc /

AH323-G. 2W High Linearity 5V 2-Stage Amplifier. Applications. Product Features. Functional Block Diagram. General Description.

AH323-G. 2W High Linearity 5V 2-Stage Amplifier. Applications. Product Features. Functional Block Diagram. General Description. Applications Base stations / Repeaters High Power Amplifiers 2G / 3G / 4G Wireless Infrastructure Femtocells LTE / WCDMA / CDMA 20 Pin 5x5 mm QFN Package Product Features Functional Block Diagram 700-2700