TQP7M W High Linearity Amplifier. Product Overview. Key Features. Functional Block Diagram. Applications. Ordering Information

Transcription

1 Product Overview The is a high linearity driver amplifier in industry standard, RoHS compliant, SOT-89 surface mount package. This InGaP/GaAs HBT delivers high performance across a broad range of frequencies while achieving +45 dbm OIP3 and dbm P1dB while only consuming 235 ma quiescent current. All devices are 1% and DC tested. The incorporates on-chip features that differentiate it from other products in the market. The amplifier integrates an on-chip DC over-voltage and over-drive protection. This protects the amplifier from electrical DC voltage surges and high input input power levels that may occur in a system. The is targeted for use as a driver amplifier in wireless infrastructure where high linearity, medium power, and high efficiency are required. The device an excellent candidate for transceiver line cards and high power amplifiers in current and next generation multi-carrier 3G / 4G base stations. Key Features 3-pin SOT 89 Package 4 4 MHz dbm P1dB +45 dbm Output IP db Gain at 214 MHz +5 V Single Supply, 235 ma Current Internal Overdrive Protection Internal DC Overvoltage Protection On chip ESD Protection Power Handling 1:1 VSWR, VCC=+5 V, 2.14 GHz Pout=+29.5 dbm CW Pout=+2 dbm WCDMA SOT 89 Package Functional Block Diagram GND 4 Applications Repeaters BTS Transceivers BTS High Power Amplifiers CDMA / WCDMA / LTE General Purpose Wireless IN GND OUT Top View Ordering Information Part No. Description 1 W High Linearity Amplifier -PCB MHz Evaluation Board -PCB GHz Evaluation Board -PCB GHz Evaluation Board Standard T/R size = 1 pieces on a 7 reel Data Sheet, April 13, 218 Subject to change without notice 1 of 24

2 Absolute Maximum Ratings Parameter Rating Storage Temperature 65 to 15 C Input Power, CW, 5 Ω, T=+25 C Device Voltage (VCC) +3 dbm +8 V Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units Device Voltage (VCC) V TCASE C Tj for >1 6 hours MTTF +17 C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: VCC = +5. V, Temp= +25 C Parameter Conditions Min Typ Max Units Operational Frequency Range 4 4 MHz Test Frequency 214 MHz Gain db Input Return Loss 12. db Output Return Loss 15. db Output P1dB dbm Output IP3 Pout = +15 dbm/tone, f = 1 MHz dbm WCDMA Output Power 5 dbc ACLR (1) +2 dbm Noise Figure 4.4 db Quiescent Current, ICQ ma Thermal Resistance, θjc Module (junction to case) 35.6 C/W 1. ACLR Test set-up: 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Data Sheet, April 13, 218 Subject to change without notice 2 of 24

3 Gain (db) Device Characterization Data 3 Gain and Maximum Stable Gain Input Smith Chart 1 Output Smith Chart 25 Gain (Max).8 4 GHz.6 4 GHz Gain (S21).1 GHz GHz Frequency (GHz) Note: The gain for the unmatched device in 5 ohm system is shown as the trace in red color, [Gain (S21)]. For a tuned circuit for a particular frequency, its expected gain will be higher, up to the maximum stable gain. The maximum stable gain is shown as the black trace, [Gain (Max)]. The impedance plots are shown from.1 4 GHz S-Parameters Test Conditions: VCC=+5 V, ICQ=235 ma, T=+25 C, unmatched 5 ohm system, calibrated to device leads Freq (MHz) S11 (db) S11 (ang) S21 (db) S21 (ang) S12 (db) S12 (ang) S22 (db) S22 (ang) Data Sheet, April 13, 218 Subject to change without notice 3 of 24

4 Evaluation Board, MHz Reference Design J4 J3 J3 +5V 1. uf J4 GND C3 L3 L2 J1 Input 1 pf C3 3.9 nh 1 2,4 3 L3 33 nh 1 pf L2 3.9 nh 1 pf J2 Output 1 pf 7.5 pf 1. Components shown on the silkscreen but not on the schematic are not used. 2. Ω resistor can be replaced with copper trace in the target application layout. 3. All components are of 63 size unless stated on the schematic. 4. The recommended component values are dependent upon the frequency of operation. 5. Critical component placement locations: Distance between Pin 1 Pad left edge to (right edge): 55 mil Distance between Pin 1 Pad left edge to C3 (right edge): 13 mil Distance between Pin 3 Pad right edge to (left edge): 16 mil Distance between Pin 3 Pad right edge to L2 (left edge): 85 mil Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a 1 W High Linearity Amplifier Qorvo C3 1 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632J 7.5 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632U7R5B,, 1 pf CAP, 63, 5%, 5V, NPO/COG various 1. uf CAP, 63, 1%, X5R, 1V various, L2 3.9 nh IND, 63, +/-.3nH TOKO L68-FSL3N9S L3 33 nh IND, 85, 5%, Wirewound Coilcraft 85CS-33XJL Data Sheet, April 13, 218 Subject to change without notice 4 of 24

5 ACPR (dbc) Gain (db) S11 & S22 (db) OIP3 (dbm) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +19 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 1C 2MHz LTE signal, PAR=9.5dB Performance Plots, MHz 23 Gain vs. Frequency Return Loss vs. Frequency 49 OIP3 vs. Pout/tone Input Return Loss Output Return Loss MHz MHz 652 MHz Pout/Tone (dbm) -35 1C 2MHz LTE signal, PAR=9.5dB ACPR vs Pout MHz 635 MHz 652 MHz Pout (dbm) Data Sheet, April 13, 218 Subject to change without notice 5 of 24

6 Evaluation Board, MHz Reference Design C9 J4 J3 1.uF C8 C9 C8 J3 Vcc J4 GND.1uF L2 1pF 18 nh (85) J1 Input 4.7 pf 1 2,4 3 L2 3.3 nh J2 1 pf Output 6.8 pf 5.6 pf 6. Components shown on the silkscreen but not on the schematic are not used. 7. Ω resistor can be replaced with copper trace in the target application layout. 8. All components are of 63 size unless stated on the schematic. 9. The recommended component values are dependent upon the frequency of operation. 1. Critical component placement locations: Distance between Pin 1 Pad left edge to (right edge): 362 mil Distance between Pin 3 Pad right edge to L2 (left edge): 15 mil Distance between Pin 3 Pad right edge to (left edge): 23 mil Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a 1 W High Linearity Amplifier Qorvo 6.8 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632U6R8BAT2A 4.7 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632U4R7BAT2A, 1 pf CAP, 63, 5%, 5V, NPO/COG various C9 1. uf CAP, 63, 1%, X5R, 1V various 5.6 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632U5R6BAT2A C8.1 uf CAP, chip, 63 Various L2 3.3 nh IND, 85, 5%, Ceramic TOKO L68-FSL3N3S 18 nh IND, 85, 5%, Wirewound Coilcraft 85CS-18XJL Data Sheet, April 13, 218 Subject to change without notice 6 of 24

7 P1dB (dbm) ACLR (dbc) Gain (db) S11, S22 (db) OIP3 (dbm) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +19 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 2. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, MHz 23 Gain vs. Frequency Return Loss vs. Frequency 55 Output IP3 vs. Pout / Tone S22 S MHz 758 MHz MHz 86 MHz Pout / Tone (dbm) 32 P1dB vs. Frequency -35 ACLR vs. Pout 31-4 W-CDMA 3GPP Test Model 1+64 DPCH, PAR = 1.2 db at.1% Probability, 3.84 MHz BW MHz 83 MHz 758 MHz Pout (dbm) Data Sheet, April 13, 218 Subject to change without notice 7 of 24

8 ACLR (dbc) P1dB (dbm) OIP3 (dbm) Gain (db) S11, S22 (db) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +19 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, MHz 22 Gain vs. Frequency Return Loss vs. Frequency S22 S ACLR vs. Output Power W-CDMA 3GPP Test Model 1+64 DPCH, PAR = 1.2 db at.1% Probability, 3.84 MHz BW 31 3 P1dB vs. Frequency OIP3 vs. Pout/tone 894 MHz 88 MHz 869 MHz 1 MHz tone spacing MHz 88 MHz 869 MHz Output Power (dbm) Pout/tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 8 of 24

9 Evaluation Board, -PCB9 J4 J3 J3 Vcc J4 GND 1 uf J1 C3 L2 L3 L2 J2 J1 Input 1 pf 3.3nH C3 1 2,4 3 1 pf L3 33 nh 85 L2 2.7 nh J2 1 pf Output 4.7 pf 1 pf 4.7 pf 11. All components are of 63 size unless stated on the schematic. 12. The recommended component values are dependent upon the frequency of operation. 13. Critical component placement locations: Distance between Pin 1 Pad to (right edge): 2 mil Distance between Pin 1 Pad to C3 (right edge): 13 mil Distance between Pin 3 Pad to (left edge): 158 mil Distance between Pin 3 Pad to L2 (left edge): 85 mil Bill of Material, -PCB9 Reference Des. Value Description Manuf. Part Number n/a 1 W High Linearity Amplifier Qorvo C3, 4.7 pf CAP, 63, ±.5 pf, 5V, NPO AVX 632U4R7BAT2A 1 pf CAP, 63, ±.5 pf, 5V, NPO AVX 635A1JAT2A,, 1 pf CAP, 63, 5%, 5V, NPO/COG various 1. uf CAP, 63, 1%, X5R, 1V various 3.3 nh IND, 63, +/-.3nH TOKO L68-FSL3N3S L2 2.7 nh IND, 63, +/-.3nH TOKO L68-FSL2N7S L3 33 nh IND, 85, 5%, Wirewound Coilcraft 85CS-33XJL Data Sheet, April 13, 218 Subject to change without notice 9 of 24

10 P1dB (dbm) OIP3 (dbm) Icc (ma) ACLR (dbc) ACLR (dbc) OIP3 (dbm) Gain (db) S11 (db) S22 (db) Typical Performance, -PCB9 Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +19 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, -PCB9 23 Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency C +25 C 4 C +85 C +25 C 4 C C +25 C 4 C ACLR vs Output Power MHz 5 94 MHz 92 MHz Output Power (dbm) P1dB vs Frequency +85 C +25 C 4 C Freq.=94 MHz ACLR vs Output Power +85 C +25 C 4 C Output Power (dbm) Freq.=94 MHz 1 MHz tone spacing OIP3 vs. Pout / tone +85 C +25 C 4 C OIP3 vs. Pout/tone MHz 94 MHz MHz Pout/Tone (dbm) Icc vs. Output Power Freq.=94 MHz Pout / tone (dbm) Output Power (dbm) Data Sheet, April 13, 218 Subject to change without notice 1 of 24

11 Evaluation Board, MHz Reference Design J4 J3 1. uf C3 J3 +5V.1 uf J4 GND C3 R1 J1 Input 3. pf 1 2, pf 33 nh 85 1 pf J2 Output 2.4 pf 1.8 pf 1. All components are of 63 size unless stated on the schematic. 2. Distance from right edge of to left edge of device pin 1 pad is 65mil 3. Distance from right edge of to left edge of device pin 1 pad is 11mil 4. Distance from left edge of to right edge of device pin 3 pad is 21mil Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a Amplifier, SOT-89 pkg. Qorvo 3. pf Cap., Chip, 63, +/.1pF, 2V AVX 632U3RBAT2A 2.4 pf Cap., Chip, 63, +/.1pF, 2V AVX 632U2R4BAT2A 1.8 pf Cap., Chip, 63, +/.1pF, 2V AVX 632R8BAT2A 1 pf Cap., Chip, 63 various C3 22 pf Cap., Chip, 63 various.1 uf Cap., Chip, 63, 1%, 16V, X7R various 1 uf Cap., Chip, 63, 1%, 1V, X5R various 33 nh Inductor, 85, 5%, Coilcraft HP Series Coilcraft R1 Ω Res, chip, 63 various Data Sheet, April 13, 218 Subject to change without notice 11 of 24

12 ACLR (dbc) OIP3 (dbm) P1dB (dbm) Gain (db) S11 (db) S22 (db) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +16 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, MHz 2 Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency ACLR vs. Output Power W-CDMA 3GPP Test Model 1+64 DPCH, PAR = 1.2 db at.1% Probability, 3.84 MHz BW MHz tone spacing OIP3 vs. Pout / Tone 188 MHz 184 MHz 185 MHz P1dB vs. Frequency MHz 184 MHz 185 MHz Output Power (dbm) Pout / Tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 12 of 24

13 ACLR (dbc) OIP3 (dbm) P1dB (dbm) Gain (db) S11 (db) S22 (db) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +16 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, MHz 2 Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency ALCR vs Output Power W-CDMA 3GPP Test Model 1+64 DPCH, PAR = 1.2 db at.1% Probability, 3.84 MHz BW OIP3 vs. Pout / Tone 1 MHz tone spacing 199 MHz 196 MHz 193 MHz P1dB vs. Frequency MHz 196 MHz 193 MHz Output Power (dbm) Pout / Tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 13 of 24

14 -PCB214 Evaluation Board 1. uf J4 J3 J3 Vcc.1 uf C3 J4 GND C3 R1 R2 C8 33 nh pf J1 Input 1.5 pf 1 2,4 3 R2 C8 22 pf J2 Output 1.5 pf 1.2 pf.6 pf 1. See PC Board Layout, page 11 for more information. 2. Components shown on the silkscreen but not on the schematic are not used. 3. Component (R1) is a Ω resistors may be replaced with copper trace in the target application layout. 4. The recommended component values are dependent upon the frequency of operation. 5. All components are of 63 size unless stated on the schematic. 6. Critical component placement locations: Distance from Pin 1 Pad (left edge) to (right edge): 28 Mils (3. at 214 MHz) Distance from (left edge) to (right edge): 65 Mils (7. at 214 MHz) Distance from Pin 3 Pad (right edge) to (left edge): 31 Mils (3.4 at 214 MHz) Distance from (right edge) to R2 (left edge): 6 Mils (6.5 at 214 MHz) Distance from R2 (right edge) to C8 (left edge): 62 Mils (6.7 at 214 MHz) Bill of Material, -PCB214 Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo 1868 n/a Amplifier, SOT-89 pkg. Qorvo, 1.5 pf Cap., Chip, 63, +/-.5pF, 5V, Accu-P AVX 632R5BAT2A, C3 22 pf Cap., Chip, 63, 5%, 5V, NPO/COG various.1 uf Cap., Chip, 63, 1%, 16V, X7R various 1. uf Cap., Chip, 63, 1%, 1V, X5R various 1.2 pf Cap., Chip, 63, +/-.5pF, 5V, Accu-P AVX 635J1R2ABSTR C8.6 pf Cap., Chip, 63, +/-.5pF, 5V, Accu-P AVX 635JR6ABSTR R1, R2 Ω Resistor, Chip, 63, 5%, 1/16W various 33 nh Inductor, 85, 5%, Coilcraft CS Series Coilcraft 85CS-33XJLB Data Sheet, April 13, 218 Subject to change without notice 14 of 24

15 OIP3 (dbm) P1dB (dbm) Icc (ma) ACLR (dbc) ACLR (dbc) OIP3 (dbm) Gain (db) S11 (db) S22 (db) Typical Performance, -PCB214 Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +11 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm Noise figure db 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, -PCB Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency +85 C C 4 C C +25 C 4 C C +25 C 4 C ACLR vs Output Power -45 ACLR vs Output Power 55 OIP3 vs. Pout / tone MHz 214 MHz 211 MHz C +25 C 4 C Freq.=214 MHz MHz 214 MHz 211 MHz 1 MHz tone spacing Output Power (dbm) Output Power (dbm) Pout / tone (dbm) 55 OIP3 vs. Pout / tone 32 P1dB vs Frequency 6 Icc vs. Output Power C +25 C 4 C Freq.=214 MHz 1 MHz tone spacing C +25 C 4 C 5 4 Freq.=214 MHz Pout / tone (dbm) Output Power (dbm) Data Sheet, April 13, 218 Subject to change without notice 15 of 24

16 Evaluation Board, MHz Reference Design J4 J3 1. uf C3 J3 +5V J4 GND.1 uf C3 R1 12 nh 1 pf Option 2 J1 1 Option 1 Input 1. pf 2, pf J2 Output 1.5 pf 1.5 pf 14. Components shown on the silkscreen but not on the schematic are not used. 15. Ω resistor can be replaced with copper trace in the target application layout. 16. All components are of 63 size unless stated on the schematic. 17. The recommended component values are dependent upon the frequency of operation. 18. Critical component placement locations: Distance between Pin 1(left edge) to (right edge): 135 mil Distance between Pin 1(left edge) to (right edge): 3 mil Distance between Pin 3(right edge) to (left edge): 145 mil for Option 1 and 85 mil for Option 2 Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a 1 W High Linearity Amplifier Qorvo 1 pf CAP, 63, +/-.1pF, 1V, NPO/COG Murata GQM1885A1RBB1J, 1.5 pf CAP, 63, +/-.1pF, 1V, NPO/COG Murata GQM1885A1R5BB1J C3 1 pf CAP, 63 various 22 pf CAP, 63 various.1 uf CAP, chip, 63 Various 1. uf CAP, 63, 1%, X5R, 1V Various R1 Ω RES, chip, 63 Various 12 nh IND, 85, 5%, Wirewound Coilcraft 85CS-12XJL Data Sheet, April 13, 218 Subject to change without notice 16 of 24

17 P1dB (dbm) OIP3 (dbm) OIP3 (dbm) Gain (db) Input Return Loss (db) Output Return Loss (db) Typical Performance (Option 1) Test Conditions: VCC=+5 V,, 5Ω System Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm Output IP3 Quiescent Collector Current, ICQ Pout= +18 dbm/tone, f= 1 MHz dbm 225 ma Typical Performance (Option 2) Test Conditions: VCC=+5 V,, 5Ω System Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB Output IP3 Quiescent Collector Current, ICQ Pout= +18 dbm/tone, f= 1 MHz dbm dbm 225 ma Performance Plots, MHz 19 Gain vs. Frequency Input Return Loss vs. Frequency Output Return Loss vs. Frequency Option 1 Option 2 15 Option 1 Option P1dB vs. Frequency 32-2 Option 1 Option OIP3 vs. Pout/tone (Option 1) OIP3 vs. Pout/tone (Option 2) Option 1 Option MHz 235 MHz 24 MHz Pout/Tone (dbm) 4 23 MHz 235 MHz 24 MHz Pout/Tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 17 of 24

18 Evaluation Board, MHz Reference Design J4 J3 J3 +5V 1. uf J4 GND C3 J1 R1 C3 J2 J1 Input.8 pf 1 2, pf 18 nh (85) 22 pf J2 Output.7 pf 1.2 pf 19. Components shown on the silkscreen but not on the schematic are not used. 2. Ω resistor can be replaced with copper trace in the target application layout. 21. All components are of 63 size unless stated on the schematic. 22. The recommended component values are dependent upon the frequency of operation. 23. Critical component placement locations: Distance between Pin 1 Pad to (right edge): 8 mil Distance between Pin 1 Pad to (right edge): 12 mil Distance between Pin 3 Pad to (left edge): 55 mil Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a 1 W High Linearity Amplifier Qorvo.8 pf CAP, 63, ±.1 pf, 1V, NPO/COG AVX 632UR8BAT2A.7 pf CAP, 63, ±.5 pf, 5V, ACCU-P AVX 635JR7ABSTR, C3 22 pf CAP, 63, 5%, 5V, NPO/COG various 1. uf CAP, 63, 1%, X5R, 1V various 1.2 pf CAP, 63, ±.1 pf, 1V, NPO/COG AVX 635J1R2ABSTR R1 Ω RES, 63, 5%, 1/16W, Chip various 18 nh IND, 85, 5%, Ceramic Coilcraft 85CS-18XJL Data Sheet, April 13, 218 Subject to change without notice 18 of 24

19 OIP3 (dbm) P1dB (dbm) Gain (db) S11, S22 (db) ACLR (dbc) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm OIP3 Pout = +11 dbm / tone, Δf =1 MHz dbm WCDMA Channel Power (1) ACLR = 5 dbc dbm 1. 3GPP WCDMA, TM1+64 DPCH, +5 MHz offset, PAR = 1.2 db at.1% Prob. Performance Plots, MHz 17 Gain vs. Frequency Return Loss vs. Frequency -4 ACLR vs. Output Power S11 S MHz 26 MHz 25 MHz Output Power (dbm) 5 45 OIP3 vs. Pout / Tone 1 MHz tone spacing P1dB vs. Frequency 4 27 MHz 26 MHz 25 MHz Pout / Tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 19 of 24

20 Evaluation Board, MHz Reference Design C9 J4 J3 C9 C8 1.uF C8 J3 Vcc.1uF J4 GND 22 pf 33 nh (85) J1 Input.3 pf 1 2,4 3 J2 22 pf Output.3 pf.9 pf 1. All components are of 63 size unless stated on the schematic. 2. Distance from right edge of to device pin is 43mil 3. Distance from right edge of to device pin is 75mil 4. Distance from right edge of to device pin is 15mil Bill of Material, MHz Reference Des. Value Description Manuf. Part Number n/a n/a Printed Circuit Board Qorvo n/a Amplifier, SOT-89 pkg. Qorvo,.3 pf Cap., Chip, 63, +/1.5pF, 5V AVX 635JR3ABSTR.9 pf Cap., Chip, 63, 5%, 5V, NPO/COG AVX 635JR9ABSTR, 22 pf Cap., Chip, 63, 5%, 5V, NPO/COG various C8.1 uf Cap., Chip, 63, 1%, 16V, X7R various C9 1 uf Cap., Chip, 63, 1%, 1V, X5R various 33 nh Inductor, 63, 5%, Coilcraft CS Series Coilcraft 63CS-33NXJL Ω Res, chip, 63 various Data Sheet, April 13, 218 Subject to change without notice 2 of 24

21 OIP3 (dbm) P1dB (dbm) Gain (db) S11, S22 (db) Typical Performance, MHz Parameter Conditions Typical Value Units Frequency MHz Gain db Input Return Loss db Output Return Loss db Output P1dB dbm Output IP3 Pout = +1 dbm / tone, f = 1 MHz dbm Performance Plots, MHz 15 Gain vs. Frequency Return Loss vs. Frequency S22 S OIP3 vs. Pout/tone 35 P1dB vs. Frequency 43 1 MHz tone spacing 36 MHz 35 MHz 34 MHz Pout/Tone (dbm) Data Sheet, April 13, 218 Subject to change without notice 21 of 24

22 Pin Configuration and Description GND IN GND OUT Pin No. Label Description 1 IN Input. Requires external match for optimal performance. External DC Block required. 2, 4 GND /DC Ground Connection 3 OUT / Vcc Output. Requires external match for optimal performance. External DC Block and supply voltage is required. Evaluation Board PCB Information Qorvo PCB 1868 Material and Stack-up.14".62" ±.6" Finished Board Thickness.14" Nelco N-4-13 Core Nelco N oz. Cu top layer 1 oz. Cu inner layer 1 oz. Cu inner layer 1 oz. Cu bottom layer 5 ohm line dimensions: width =.28, spacing =.28. Data Sheet, April 13, 218 Subject to change without notice 22 of 24

23 Package Marking and Dimensions Marking: Part Identifier 7M913 Lot code YXXX 7M913 YXXX 1. All dimensions are in millimeters. Angles are in degrees. 2. Dimension and tolerance formats conform to ASME Y14.4M The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP Contact plating: NiPdAu PCB Mounting Pattern 29X [.152] 1.26 [.5].63 [.25].76 [.3] 4.5 [.177] Ø.254 (.1) PLATED THRU VIA HOLES PACKAGE OUTLINE 2X.58 [.23] 2X 1.27 [.5] 2.65 [.14].64 [.25] 2X.86 [.34].86 [.34] 3.86 [.152] NOTES: 1. All dimensions are in millimeters [inches]. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper /DC grounding and thermal dissipation. We recommend a.35mm (#8/.135") diameter bit for drilling via holes and a final plated thru diameter of.25mm (.1 ). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. Data Sheet, April 13, 218 Subject to change without notice 23 of 24

24 Handling Precautions Parameter Rating Standard ESD Human Body Model (HBM) 2 ESDA / JEDEC JS ESD Charged Device Model (CDM) C3 JEDEC JESD22-1F MSL Moisture Sensitivity Level Level 3 IPC/JEDEC J-STD-2 Caution! ESD-Sensitive Device Solderability Compatible with both lead-free (26 C max. reflow temp.) and tin/lead (245 C max. reflow temp.) soldering processes. Solder profiles available upon request. Contact plating: NiPdAu RoHS Compliance This part is compliant with the 211/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 215/863/EU. This product also has the following attributes: Product uses RoHS Exemption 7c-I to meet RoHS Compliance requirements. Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (5H12Br42) Free PFOS Free SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: Tel: customer.support@qorvo.com For technical questions and application information: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PEORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 218 Qorvo, Inc. Qorvo is a registered trademark of Qorvo, Inc. Data Sheet, April 13, 218 Subject to change without notice 24 of 24