QPB9318 Dual-Channel Switch LNA Module

Transcription

1 9 Product Overview The is a highly integrated front-end module targeted for TDD base stations. The switch module integrates a two-stage and a high power switch in a dual channel configuration. Power down capability for the s can be controlled with shut-down pins for the module. The can be utilized across the 2..8 GHz range to provide. noise figure for operation in the receive mode and. insertion loss in the transmit mode. The s utilize Qorvo s high performance E- phemt process while the pin-diode based switch supports input RF power signals of up to W average power assuming 8 PAR. The is packaged in a RoHS-compliant, compact mm x mm surface-mount leadless package. The switch module is targeted for wireless infrastructure applications configured for TDD-based MIMO architectures. The module can be used for next generation G or preg solutions or small cell basestation applications. 2 Pad mm x mm leadless SMT Package Key Features GHz Frequency Range Integrates dual channels of a two-stage with a high power switch Max RF Input power: W Pavg (8 PAR). Noise Figure (Rx mode). Gain (Rx mode) +. m OIP (Rx mode). Insertion Loss (Tx mode) Compact package size, x mm Functional Block Diagram Applications OUT_M 2 M_VDD 2 _SD_M IN_M SW_RX_M SW_ANT_M SW_TX_M Wireless Infrastructure Small cell BTS PreG / G Massive MIMO systems TDD-based architectures Bands 8, 4, 42, OUT_D SW_TX_D 8 D_VDD 2 4 _SD_D IN_D SW_RX_D Top View 6 SW_ANT_D 7 Exposed Backside Pad Ordering Information Part No. Description SR pcs on a 7 reel TR pcs on a reel PCB4 Evaluation board Data Sheet, August, 27 Subject to change without notice of 4

2 Absolute Maximum Ratings Parameter Rating Storage Temperature -6 to C Supply Voltage (Pins 2, 7, 9,,, 2) Input Power (Pavg, 8 PAR) Switch Input Power (Pavg, 8 PAR) Switch Input Power (Peak) +7 V +24 m +4 m +48 m Operation of this device outside the parameter ranges given above may cause permanent damage. Recommended Operating Conditions Parameter Min Typ Max Units Voltage V VMODE +28 V TCASE 4 + C Tj for > 6 hours MTTF () +9 C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Note : Rx Mode Electrical Specifications Parameter Conditions () Min Typ Max Units Operational Frequency Range 8 MHz Test Frequency MHz Gain Rx mode Gain Flatness Rx mode, 2.4 to 2.66 GHz.4 Rx mode, Any 6 MHz BW within band.2 Noise Figure (2) Rx mode..7 Output IP Rx mode, Pout/tone = +m, Δf = MHz + +. m OP Rx mode +9.8 m Insertion Loss (2) Tx mode.. Input Return Loss () Rx mode. Output Return Loss () Rx mode 2.4 Channel Isolation (4) Rx mode 4 Switch Isolation () Tx mode, 2 Supply Voltage V Current Per channel 4 7 ma 2 Current Per channel 7 9 ma Shutdown Current Per channel ma Shutdown Control Voltage (Pins, ) On state +. V Off state (Power down) VDD V Switch Supply Voltage +28 V Switch Current (Tx mode) (6) +28V ua +V 4 ma Switch switching time % CTL to /9% RF 2 ns Thermal Resistance Tx mode 22 C/W Rx mode 2 C/W. Test conditions unless otherwise noted: Temp = + C, Ω system. 2. De-embedded to device leads.. Requires external matching. 4. Channel Isolation is the difference in desired channel gain to the cross channel gain.. Switch Isolation is the insertion loss of the switch in the receive path while in Tx mode. 6. Current into Antenna port, per channel in Tx Mode. Data Sheet, August, 27 Subject to change without notice 2 of 4

3 Application Circuit Schematic PCB4 J9 J7 V 2 C6 uf C7 C2 uf C pf 2 J8 V L2 J26 PD2 C R7 2 k R2 K 29 28V/ R C4 28 C C2 27 L 26 C22 C L C2 P Switch Antenna port Main Ch pf R R J V A J P2 OUT Main Ch C C24 22 pf L L C8 C L C9 28V/ T C P Switch TX out Main Ch P4 OUT Diversity Ch C2 C27 22 L2 C L C C4 C2 L7 C26 J6 P Switch TX out Diversity Ch J2 pf C uf V 4 C8 pf C2 uf 9 L9 J J PD V R K R8 2 k C6 2 C7 C C9 J4 28V/ R2 For CH operation J (V A) always on +Vdc and J7 (V 2), J8 (V ) powered up to +Vdc. For CH2 operation J (V A2) always on +Vdc and J2 (V 4), J (V ) powered up to +Vdc. For CH RX operation (similar sequence for CH2):. Set J (28V/ T) VMODE to high (+28Vdc). 2. Set J9 (28V/ R) VMODE to low (Vdc).. Enable s J26 (PD2) to Vdc. For CH TX operation (similar sequence for CH2):. Disable s J (PD) to +Vdc. 2. Set J9 (28V/ R) VMODE to high (+28Vdc).. Set J (28V/ T) VMODE to low (Vdc). R2, R, R7 & R8 need to be placed to improve the stability in the first stage. It is recommended that they be placed as close to the pin as possible. 4 L C28 6 L8 C6 C29 pf R4 R6 P6 Switch Antenna port Diversity Ch 28V/ T2 J V A2 Data Sheet, August, 27 Subject to change without notice of 4

4 Application Circuit Layout PCB4 Bill of Material PCB4 Ref Des Value Description Manuf. Part Number n/a n/a Printed Circuit Board U n/a Dual Channel Switch Module Qorvo C2, C29 CAP, pf, %, V, CG, 42 various C, C4, C, C8, C9, C, C2, C4, C6, C7, C9, C2, C2, C, C6, L, L2 CAP, pf, %, V, CG, 42 various C2, C6, C, C2 uf CAP, 2%, 6.V, XR, 42 various C, C7, C, C8 pf CAP, %, V, CG, 42 various L, L, L7, L IND, %, M/L, 42 various C24, C27 22 Ω RES, %, /6W, 42 various L2, L, L4, L6, L8, L9 IND, %, M/L, 42 various R, R, R4, R6 249 Ω RES, %, /6W, 42 various R2, R K Ω RES, %, /6W, 42 various R7, R8 2K RES, %, /6W, 42 various Data Sheet, August, 27 Subject to change without notice 4 of 4

5 Typical Performance Rx Mode Conditions() Parameter Typical Value Units Frequency MHz Gain Input Return Loss Output Return Loss m m Output P Pout= + m/tone, Δf= MHz OIP Noise Figure(2). Test conditions unless otherwise noted:, 2,, 4, A, A2 = +V; 28V/ T, 2 = +28V; 28V/ R, 2, PD, 2 = V; Temp. = + C 2. De-embedded Performance Plots Rx Mode () Test conditions unless otherwise noted:, 2,, 4, A, A2 = +V; 28V/ T, 2 = +28V; 28V/ R, 2, PD, 2 = V; Temp.= + C Rx Gain 4 Ant Return Loss Rx Return Loss 28 Return Loss () Return Loss () Gain () Noise Figure vs Frequency OIP vs Pout/tone 4 OIP vs Pout/tone 4 Temp.=+ C Freq.= 2.6 GHz.. 2. GHz 2.4 GHz 2.6 GHz 2.7 GHz 2. GHz De-embedded. OIP (m) OIP (m) Noise Figure () Pout (m/tone) P vs Frequency 22 4 Pout (m/tone) Channel to Channel Isolation Isolation () P (m) Main to Diversity 8 +8C 7 Data Sheet, August, 27 Subject to change without notice of 4

6 Performance Plots Rx Mode () Test conditions unless otherwise noted:, 2,, 4, A, A2 = +V; 28V/ T, 2 = +28V; 28V/ R, 2, PD, 2 = V; Temp.= + C Rx Gain 4 Ant Return Loss Rx Return Loss 2 28 Return Loss () Return Loss () Gain () Noise Figure vs Frequency OIP vs Pout/tone 4 OIP vs Pout/tone 4 Temp.=+ C Freq.= 2.6 GHz.. 2. GHz 2.4 GHz 2.6 GHz 2.7 GHz Pout (m/tone) P vs Frequency GHz De-embedded. OIP (m) OIP (m) Noise Figure (). Pout (m/tone) Channel to Channel Isolation Isolation () P (m) Diversity to Main 8 +8C 7 Data Sheet, August, 27 Subject to change without notice 6 of 4

7 Typical Performance Tx Mode Conditions() Parameter Typical Value Frequency Insertion Loss(2) Units MHz Input Return Loss Output Return Loss Test conditions unless otherwise noted:, 2,, 4, A, A2, PD, 2 = +V; 28V/ R, 2 = +28V; 28V/ T, 2 = V; Temp. = + C De-embedded Performance Plots Tx Mode Test conditions unless otherwise noted:, 2,, 4, A, A2, PD, 2 = +V; 28V/ R, 2 = +28V; 28V/ T, 2 = V; Temp.= + C Tx Insertion Loss. Ant Return Loss TX Mode TX Mode - -2 De-embedded Return Loss () Return Loss () Insertion Loss () -.2 Tx Return Loss TX Mode Tx Insertion Loss. - Ant Return Loss -.6 TX Mode De-embedded - -2 TX Mode Return Loss () -.4 Tx Return Loss Return Loss () Insertion Loss () -.2 TX Mode Data Sheet, August, 27 Subject to change without notice 7 of 4 -

8 Application Circuit Schematic 4 to 8 MHz J9 J7 V 2 C6 uf C7 C2 uf C pf 2 J8 V L2 J26 PD2 C R7 2 k R2 K 29 28V/ R C4 28 C C2 27 L 26 C7. pf C L nh C2 P Switch Antenna port Main Ch pf R R J V A J P2 OUT Main Ch C C24. pf pf L L C8 C L C9 28V/ T C P Switch TX out Main Ch P4 OUT Diversity Ch C2 C27. pf L2 C L C C4 C2 L7 C26 J6 P Switch TX out Diversity Ch J2 pf C uf V 4 C8 pf C2 uf 9 L9 J J PD V R K R8 2 k C6 2 C7 C C9 J4 28V/ R2 For CH operation J (V A) always on +Vdc and J7 (V 2), J8 (V ) powered up to +Vdc. For CH2 operation J (V A2) always on +Vdc and J2 (V 4), J (V ) powered up to +Vdc. For CH RX operation (similar sequence for CH2): 4. Set J (28V/ T) VMODE to high (+28Vdc).. Set J9 (28V/ R) VMODE to low (Vdc). 6. Enable s J26 (PD2) to Vdc. For CH TX operation (similar sequence for CH2): 4. Disable s J (PD) to +Vdc.. Set J9 (28V/ R) VMODE to high (+28Vdc). 6. Set J (28V/ T) VMODE to low (Vdc). R2, R, R7 & R8 need to be placed to improve the stability in the first stage. It is recommended that they be placed as close to the pin as possible. 4 L C8 6 L8. pf nh C6 C29 pf R4 R6 P6 Switch Antenna port Diversity Ch 28V/ T2 J V A2 Data Sheet, August, 27 Subject to change without notice 8 of 4

9 Application Circuit Layout 4 to 8 MHz Bill of Material 4 to 8 MHz Ref Des Value Description Manuf. Part Number n/a n/a Printed Circuit Board U n/a Dual Channel Switch Module Qorvo C2, C29 CAP, pf, %, V, CG, 42 various C, C4, C, C8, C9, C, C2, C4, C6, C7, C9, C2, C2, C, C6, L, L2 CAP, pf, %, V, CG, 42 various C2, C6, C, C2 uf CAP, 2%, 6.V, XR, 42 various C, C7, C, C8 pf CAP, %, V, CG, 42 various C24, C27, C7, C8. pf CAP, +/-.pf, V, CG, 42 various L, L, L7, L IND, %, M/L, 42 various L, L8 nh IND, %, M/L, 42 various L2, L4, L6, L9 IND, %, M/L, 42 various R, R, R4, R6 249 Ω RES, %, /6W, 42 various R2, R K Ω RES, %, /6W, 42 various R7, R8 2K RES, %, /6W, 42 various Data Sheet, August, 27 Subject to change without notice 9 of 4

10 Isolation () NF () OIP (m) Gain () S () S22 () Typical Performance 4 to 8 MHz Parameter Conditions () Typical Value Units Frequency MHz Gain Input Return Loss Output Return Loss Output P m OIP Pout= + m/tone, Δf= MHz m Noise Figure (2) TX Mode Insertion Loss (2) Input Return Loss Output Return Loss Test conditions unless otherwise noted:, 2,, 4, A, A2 = +V; 28V/ T, 2 = +28V; 28V/ R, 2, PD, 2 = V; Temp. = + C 2. De-embedded Performance Plots 4 to 8 MHz Test conditions unless otherwise noted:, 2,, 4, A, A2 = +V; 28V/ T, 2 = +28V; 28V/ R, 2, PD, 2 = V; Temp.= + C 2 Gain vs. Frequency ANT Return Loss vs. Frequency Output Return Loss vs. Frequency 28 Temp.=+ C TX Ins. Loss RX Gain -. - Temp.=+ C TX mode RX mode - TX term in TX mode out in RX mode Temp.=+ C Not Deembedded Channel to Channel Isolation 6 Main to Diversity Diversity to Main Noise Figure 2..9 Temp.=+ C De-embedded Frequency (GHz) OIP vs Pout/tone Temp.=+ C 4MHz MHz 6MHz 7MHz 8MHz Pout (m/tone) Data Sheet, August, 27 Subject to change without notice of 4

11 Pin Configuration and Description M_VDD _SD_M IN_M SW_RX_M SW_ANT_M 9 24 OUT_M SW_TX_M OUT_D SW_TX_D 8 7 D_VDD _SD_D 2 IN_D 4 SW_RX_D 6 SW_ANT_D Exposed Backside Pad Pin No. Label Description,, 4,, 6, 8,,,, 7, 9, 2, 2, 22, 24, 26, 28, Top View Ground connection. This pin is connected internally and can be left floating or connected to ground. 2 OUT_M Main channel RX output port. Bias port for 2. Needs external DC block. 7 OUT_D Diversity channel RX output port. Bias port for 2. Needs external DC block. 9 D_VDD Diversity channel bias voltage supply pin. External choke and bypass caps needed. _SD_D Common shutdown pin for both & 2 on diversity channel. 2 IN_D Diversity channel RF input to chain. External DC block cap needed. 4 SW_RX_D RX port of switch on diversity channel. 6 SW_ANT_D Diversity channel antenna port on switch. 8 SW_TX_D TX port of switch on diversity channel. 2 SW_TX_M TX port of switch on main channel. SW_ANT_M Main channel antenna port on switch. 27 SW_RX_M RX port of switch on diversity channel. 29 IN_M Main channel RF input to chain. External DC block cap needed. _SD_M Common shutdown pin for both & 2 on main channel. 2 M_VDD Main channel bias voltage supply pin. External choke and bypass caps needed. Backside Pad Ground connection. The back side of the package should be connected to the ground plan though as short of a connection as possible. PCB vias under the device are required. Data Sheet, August, 27 Subject to change without notice of 4

12 Package Marking and Dimensions Marking: Part number Trace Code XXXX. All dimensions are in microns. Angles are in degrees. 2. Dimension and tolerance formats conform to ASME Y4.4M The terminal # identifier and terminal numbering conform to JESD 9- SPP-2. Data Sheet, August, 27 Subject to change without notice 2 of 4

13 PCB Mounting Pattern. A heat sink underneath the area of the PCB for the mounted device is recommended for proper thermal operation. 2. Ground / thermal vias are critical for the proper performance of this device. Vias should use a.mm (#8 /. ) diameter drill and have a final plated thru diameter of. mm (. ).. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. Data Sheet, August, 27 Subject to change without notice of 4

14 Handling Precautions Parameter Rating Standard ESD Human Body Model (HBM) Level B ESDA / JEDEC JS--22 ESD Charged Device Model (CDM) Level C JEDEC JESD22-CF MSL Moisture Sensitivity Level Level IPC/JEDEC J-STD-2 Caution! ESD-Sensitive Device Solderability Compatible with both lead-free (26 C max. reflow temp.) and tin/lead (24 C max. reflow temp.) soldering processes. Solder profiles available upon request. Contact plating: Electrolytic plated Au over Ni RoHS Compliance This part is compliant with 2/6/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 2/86/EU. This product also has the following attributes: Product uses RoHS Exemption 7c-I to meet RoHS Compliance requirements Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (CH2Br42) Free PFOS Free SVHC Free Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: Tel: customer.support@qorvo.com For technical questions and application information: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 27 Qorvo, Inc. Qorvo is a registered trademark of Qorvo, Inc. Data Sheet, August, 27 Subject to change without notice 4 of 4