Metall Oxide Semiconductor Field Effect Transistor. 650V CoolMOS TM E6 Power Transistor IPx65R600E6. Rev. 2.3,

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1 MOSFET Metall Oxide Semiconductor Field Effect Transistor CoolMOS E6 650V CoolMOS TM E6 Power Transistor IPx65R600E6 Data Sheet Rev. 2.3, Power Management & Multimarket

2 1 Description CoolMOS TM is a revolutionary technology for high voltage power MOSFETs, designed according to the superjunction (SJ) principle and pioneered by Infineon Technologies. CoolMOS TM DE series combines the experience of the leading SJ MOSFET supplier with high class innovation. The resulting devices provide all benefits of a fast switching SJ MOSFET while not sacrificing ease of use. Extremely low switching and conduction losses make switching applications even more efficient, more compact, lighter, and cooler. Features Extremely low losses due to very low F O M R dson*qg and E oss Very high commutation ruggedness Easy to use/drive JEDEC 1) qualified, Pb-free plating, available in Halogen free mold compound 2) Applications PFC stages, hard switching PWM stages and resonant switching PWM stages e.g. PC Silverbox, Adapter, LCD & PDP TV, Lightning, Server, Telecom and UPS. Please note: For MOSFET paralleling the use o fferrite beads on the gate or separate totem poles is generally recommended. Table 1 Key Performance Parameters Parameter Value Unit V max 700 V R DS(on), max 0.6 Ω Q G, typ 23 nc I D, pulse 18 A E 400V 2 µj Body diode di/dt 500 A/µs Type / Ordering Code Package Marking Related links IPD65R600E6 PG-TO252 IFX CoolMOS Webpage IPP65R600E6 PG-TO220 65E6600 IFX Design tools PG-TO220 FullPAK 1) J-STD20 and JESD22 2) For PG-TO252: non-halogen free (OPN: IPD65R600E6BT); Halogen free (OPN: IPD65R600E6AT) Rev. 2.3 Page

3 Table of Contents 650V CoolMOS TM E6 Power Transistor 1 Description Maximum ratings Thermal characteristics Electrical characteristics Electrical characteristics diagrams Test circuits Package outlines Revision History Rev. 2.3 Page

4 2 Maximum ratings At T j = 25 C, unless otherwise specified. Table 2 Maximum ratings Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Continuous drain current 1) I D 7.3 A T C = 25 C 4.6 T C = 100 C Pulsed drain current 2) I D, pulse 18 T C = 25 C Averlanche energy, single pulse E AS 142 mj I D = 1.3A; V DD = 50V; T C = 25 C (see Table 11) Averlanche energy, repetitive E AR 0.21 I D =1.3 A, V DD =50V Avalanche current, repetitive I AR 1.3 A MOSFET dv/dt ruggedness dv/dt 50 V/ns V DS =0 480 V Gate source voltage V GS V static Power dissipation for Non FullPAK Power dissipation for FullPAK AC (f >1 Hz) P tot 63 W T C = 25 C P tot 28 W T C = 25 C Operating and storage temperature T j, T stg C Mounting torque TO-220 Mounting torque TO-220 FullPAK 60 Ncm M3 and M3.5 screws 50 M2.5 Screws Continous diode forward current I S 6.3 A T C = 25 C Diode pulse current 2) I S, pulsed 18 A T C = 25 C Reverse diode dv/dt 3) dv/dt 15 V/ns V DS =0 480 V, I SD I D, Maxumum diode commutation di f /dt 500 A/µs T C = 125 C speed 3) (see table 22) 1) Limited by T j, max. Maximum duty cycle D=0.75 2) Pulse width t p limited by T j, max 3) Identical low side and high side switch with identical R G Rev. 2.3 Page

5 3 Thermal characteristics Table 3 Thermal characteristics TO-220 (IPP65R600E6) Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Thermal resistance, junction-case R thjc 2.0 C/W Thermal resistance, junctionambient R thja 62 leaded Soldering temperature, wavesoldering only allowed at leads T sold 260 C 1.6mm (0.063 in.) from case for 10 s Table 4 Thermal characteristics TO-220 FullPAK () Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Thermal resistance, junction-case R thjc 4.5 C/W Thermal resistance, junctionambient R thja 80 leaded Soldering temperature, wavesoldering only allowed at leads T sold 260 C 1.6mm (0.063 in.) from case for 10 s Table 5 Thermal characteristics TO-252 (IPD65R600E6) Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Thermal resistance, junction-case R thjc 2.0 C/W Thermal resistance, junction-ambient R thja 62 SMD version, device on PCB, minimal footprint 35 SMD version, device on PCB, 6cm 2 cooling area 1) Soldering temperature, wave- &reflowsoldering only allowed T sold 260 C Reflow MSL1 1) Device on 40mm*40mm*1.5 epoxy PCB FR4 with 6cm 2 (one layer, 70µm thick) copper area for drain connection. PCB is vertical without air stream cooling. Rev. 2.3 Page

6 4 Electrical characteristics Electrical characteristics, at T j=25 C, unless otherwise specified Table 6 Static characteristics Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Drain-source Breakdown voltage V (BR)DSS 650 V V GS = 0V, I D = 1.0mA Gate threshold voltage V GS(th) V DS = V GS, I D = 0.21mA 1 µa V DS =600 V, V GS =0V, Zero gate Voltage drain current I DSS T j =150 C T j =25 C 10 V DS =600 V, V GS =0V, Gate- source leakage current I GSS 100 na V GS = 20V, V DS = 0V Ω V GS = 10V, I D =2.1A, Drain- source on- state resistance R DS(on) T j = 150 C T j = 25 C 1.40 V GS = 10V, I D =2.1A, Gate resistance R G 10.5 Ω f= 1MHz, open drain Table7 Dynamic characteristics Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Input capacitance C iss 440 pf V GS = 0V, V DS = 100V, Output capacitance C oss 30 f= 1MHz Effective output capacitance, C o(er) 21 V GS = 0V, energy related 1) V DS =0 480V Effective output capacitance, C o(tr) 88 I D = const time related 2) V GS = 0V, V DS =0 480 V Turn- on delay time t d(on) 10 ns V DD =400 V Rise time t r 8 V GS =13 V, I D =3.2A, Turn- off delay time t d(off) 64 R G = 6.8 Ω Fall time t f 11 (see table 20) 1) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V (BR)DSS 2) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V (BR)DSS Rev. 2.3 Page

7 Table 8 Gate charge characteristics Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Gate to source charge Q GS 2.75 nc V DD = 480V, I D = 3.2A, Gate to drain charge Q GD 12 V GS =0 to 10 V Gate charge, total Q G 23 Gate plateau voltage V plateau 5.5 V Table 8 Reverse diode characteristics Parameter Symbol Values Unit Note/Test Condition Min. Typ. Max. Diode forward voltage V SD 0.9 V V GS =0V, I F =3.2A, T j =25 C Reverse recovery time t rr 270 ns V R =400 V, I F =3.2A, Reverse recovery charge Q rr 2.0 nc dif/d t =100 A/µs Peak reverse recovery current I rrm 13 A (see table 22) Rev. 2.3 Page

8 5 Electrical characteristics diagrams 650V CoolMOS TM E6 Power Transistor Table 10 Power dissipation Non FullPAK Power dissipation FULLPAK P tot = f(t C ) P tot = f(t C ) Table 11 Max. transient thermal impedance Non FullPAK Max. transient thermal impedance Non FullPAK Z (thjc) =f(tp); parameter: D=t p /T Z (thjc) =f(tp); parameter: D=t p /T Rev. 2.3 Page

9 Table 12 Safe operating area T C =25 C Non FullPAK Safe operating area T C =25 C FullPAK I D =f(v DS ); T C =25 C; V GS > 7V; D=0; parameter t p I D =f(v DS ); T C =25 C; V GS > 7V; D=0; parameter t p Table 13 Safe operating area T C =80 C Non FullPAK Safe operating area T C =80 C FullPAK I D =f(v DS ); T C =80 C; V GS > 7V; D=0; parameter t p I D =f(v DS ); T C =80 C; V GS > 7V; D=0; parameter t p Rev. 2.3 Page

10 Table 14 Typ. output characteristics T C =25 C Typ. output characteristics T C =125 C I D =f(v DS ); T j =25 C; parameter: V GS I D =f(v DS ); T j =125 C; parameter: V GS Table 15 Typ. drain-source on-state resistance Drain-source on-state resistance R DS(on) =f(i D ); T j =125 C; parameter: V GS R DS(on) = f(t j) ; I D =4.9A; V GS =10V Rev. 2.3 Page

11 Table 16 Typ. transfer characteristics Typ. gate charge I D =f(v GS ); V DS =20V V GS =f(q gate ), I D =4.9 A pulsed Table 17 Avalanche energy Drain-source breakdown voltage E AS =f(t j ); I D =1.8 A; V DD =50 V V BR(DSS) =f(t j ); I D =1.0 ma Rev. 2.3 Page

12 Table 18 Typ. capacitances Typ. C OSS stored energy C=f(V DS ); V GS = 0 V; f=1 MHz E OSS =f(v DS ) Table 19 Forward characteristics of reverse diode I F = ƒ(v SD ); parameter: T j Rev. 2.3 Page

13 6 Test circuits Table 20 Switching times test circuit and waveform for inductive load Switching times test circuit for inductive load Switching time waveform V DS V DS 90% V GS V GS 10% t d(on) t f t d(off) t r t on t off Table 11 Unclamped inductive load test circuit Unclamped inductive waveform V (BR)DS I D V DS V D V DS V DS I D Table 22 Test circuit for diode characteristics Diode recovery waveform Rev. 2.3 Page

14 7 Package outlines Figure 1 Outlines TO-252,, dimensions in mm/inches Rev. 2.3 Page

15 Figure 2 Outlines TO220, dimensions in mm/inches Rev. 2.3 Page

16 1 2 3 MILLIMETERS DIMENSIONS MIN. MAX. DOCUMENT NO. A Z8B A A REVISION b b b SCALE 5:1 b mm b c D D EUROPEAN PROJECTION E e 2.54 H L L1 øp ISSUE DATE Q Figure 3 Outlines TO220 FullPAK, dimensions in mm Rev. 2.3 Page

17 650VCoolMOSªE6PowerTransistor IPx65R600E6 RevisionHistory IPx65R600E6 Revision: ,Rev.2.3 Previous Revision Revision Date Subjects (major changes since last revision) Revised TO220 Full PAK package drawing on page Outline PG-TO-220 FullPAK update TrademarksofInfineonTechnologiesAG AURIX,C166,CanPAK,CIPOS,CoolGaN,CoolMOS,CoolSET,CoolSiC,CORECONTROL,CROSSAVE,DAVE,DI-POL,DrBlade, EasyPIM,EconoBRIDGE,EconoDUAL,EconoPACK,EconoPIM,EiceDRIVER,eupec,FCOS,HITFET,HybridPACK,Infineon, ISOFACE,IsoPACK,i-Wafer,MIPAQ,ModSTACK,my-d,NovalithIC,OmniTune,OPTIGA,OptiMOS,ORIGA,POWERCODE, PRIMARION,PrimePACK,PrimeSTACK,PROFET,PRO-SIL,RASIC,REAL3,ReverSave,SatRIC,SIEGET,SIPMOS,SmartLEWIS, SOLIDFLASH,SPOC,TEMPFET,thinQ,TRENCHSTOP,TriCore. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: Publishedby InfineonTechnologiesAG 81726München,Germany 2018InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics ( Beschaffenheitsgarantie ). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer sproductsandanyuseofthe productofinfineontechnologiesincustomer sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice( Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. 17 Rev.2.3,