HCD80R600R 800V N-Channel Super Junction MOSFET
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1 HCD80R600R 800V N-Channel Super Junction MOSFET Features Very Low FOM (R DS(on) X Q g ) Extremely low switching loss Excellent stability and uniformity 00% Avalanche Tested Application Switch Mode Power Supply (SMPS) Uninterruptible Power Supply (UPS) Power Factor Correction (PFC) Motor Control & LED Lighting Power DC-DC Converters Key Parameters Parameter Value Unit j,max 850 V I D 9 A R DS(on), max 0.65 Ω Qg, Typ 0.5 nc Package & Internal Circuit G D-PAK S D June 208 Absolute Maximum Ratings T J =25 unless otherwise specified Symbol Parameter Value Units S Drain-Source Voltage 800 V Gate-Source Voltage ±30 V I D Drain Current Continuous (T C = 25 ) 9.0 A Drain Current Continuous (T C = 00 ) 5.5 A I DM Drain Current Pulsed (Note ) 26 A E AS Single Pulsed Avalanche Energy (Note 2) 20 mj dv/dt MOSFET dv/dt ruggedness, =0 640V 50 V/ns dv/dt Reverse diode dv/dt, =0 640V, I DS I D 5 V/ns P D Power Dissipation (T C = 25 ) 83 W T J, T STG Operating and Storage Temperature Range -55 to +50 T L Maximum lead temperature for soldering purposes, /8 from case for 5 seconds 300 Thermal Resistance Characteristics Symbol Parameter Typ. Max. Units R θjc Junction-to-Case --.5 /W R θja Junction-to-Ambient
2 Electrical Characteristics T J =25 C unless otherwise specified Symbol Parameter Test Conditions Min Typ Max Units On Characteristics Gate Threshold Voltage =, I D = 250 μa V R DS(ON) Off Characteristics BS Drain-Source Breakdown Voltage = 0 V, I D = 250 μa V I DSS Static Drain-Source On-Resistance Zero Gate Voltage Drain Current = 800 V, = 0 V μa = 800 V, T J = μa I GSS Gate-Body Leakage Current = 30 V, = 0 V ±00 na Dynamic Characteristics = 0 V, I D = 4.5 A Ω C iss Input Capacitance pf C oss Output Capacitance = 00 V, = 0 V, f =.0 MHz pf C rss Reverse Transfer Capacitance pf Switching Characteristics t d(on) Turn-On Time ns t r Turn-On Rise Time = 400 V, I D = 4.5 A, ns t d(off) Turn-Off Delay Time R G = 25 Ω ns t f Turn-Off Fall Time ns Q g Total Gate Charge nc Q gs Gate-Source Charge = 640 V, I D = 4.5 A = 0 V nc Q gd Gate-Drain Charge nc Source-Drain Diode Maximum Ratings and Characteristics I S Continuous Source-Drain Diode Forward Current I SM Pulsed Source-Drain Diode Forward Current V SD Source-Drain Diode Forward Voltage I S = 4.5 A, = 0 V V trr Reverse Recovery Time I S = 4.5 A, = 0 V ns Qrr Reverse Recovery Charge di F /dt = 00 A/μs μc Notes ;. Repetitive Rating : Pulse width limited by maximum junction temperature 2. I AS =2A, =50V, R G =25Ω, Starting T J =25 C 3. Pulse Test : Pulse Width 300μs, Duty Cycle 2% A
3 Typical Characteristics I D, Drain Current [A] R DS(ON) [Ω] , Drain-Source Voltage [V] I D [A] 20V 0V 8V Figure. On Region Characteristics Figure 3. On Resistance Variation vs Drain Current and Gate Voltage 7V 6V 5.5V 5V. = 0 V 2. T J = 25 I D, Drain Current [A] I F [A] E+02 E+0 E+00 E-0 E-02 E , Gate-Source Voltage [V] Figure 2. Transfer Characteristics E-04. = 0 V us Pulse Test E V SD [V] = 20 V us Pulse Test Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature Capacitances [pf] 00 0 Ciss Coss [V] V 400V 640V Crss Drain-Source Voltage [V]. = 0 V 2. f = MHz Q G [nc]. I D = 4.5 A Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
4 Typical Characteristics (continued) I D [A] B VDSS (Normalized) = 0 V 2. I D = 250 ua T J [ ] Figure 7. Breakdown Voltage Variation vs Temperature DC 0ms ms 00us 0us R DS(on) (Normalized) I D [A] = 0 V 2. I D = 4.5 A T J [ ] Figure 8. On-Resistance Variation vs Temperature 0.0. T C = T J(MAX) = Single Pulse [V] Figure 9. Maximum Safe Operating Area T C [ ] Figure 0. Maximum Drain Current vs Case Temperature 0 Z θjc [K/W] single pulse 0.0 E t P [S] Figure. Transient Thermal Response Curve
5 2V 200nF 3mA 50KΩ 300nF Fig 2. Gate Charge Test Circuit & Waveform Same Type as Fig 3. Resistive Switching Test Circuit & Waveforms R L 0V Q gs 90% Q g Q gd Charge R G ( 0.5 rated ) 0V V in 0% t d(on) t r t d(off) tf t on t off Fig 4. Unclamped Inductive Switching Test Circuit & Waveforms L E AS = ---- L L I 2 2 AS BS BS -- I D BS I AS R G I D (t) 0V (t) t p Time
6 Fig 5. Peak Diode Recovery dv/dt Test Circuit & Waveforms R G I S Driver + _ Same Type as L dv/dt controlled by RG I S controlled by pulse period ( Driver ) D = Gate Pulse Width Gate Pulse Period 0V I FM, Body Diode Forward Current I S ( ) di/dt I RM Body Diode Reverse Current ( ) Body Diode Recovery dv/dt V f Body Diode Forward Voltage Drop
7 Package Dimension D-PAK (TO-252A)
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