All-Analog Digital Multimeter (DMM)
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1 6.101 Final Project 1 1 Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology April 19, 2018
2 Design goals What is an all-analog DMM? Goal: Create an all-analog digital multimeter All-analog: no digital circuits/logic (except where necessary) Digital: no needle-style readouts (seven-segment displays) Figure 1: Traditional DMM
3 Key design considerations Why is this difficult? Accurary: harder because everything is analog Digitization: A/D conversion is inherently digital Flow control: Multiple ranges, functions means lots of analog multiplexing Serialization: Need to use same circuit multiple times to save space
4 Key design considerations Input and input protection 2 System overview Frontend: Circuits to convert measured parameter to voltage (all-analog) Backend: Discrete ADC, displays measured signals on seven-segment displays (hybrid A/D) Range selection Clock out V I R C (L) In ( V) Digit register selector Analog modulus unit (AMU) V 7-segment controller Remainder 7 7 State controller 7
5 Key design considerations Why is this cool? It s a really unusual thing to do I develop a new ADC topology and implement it The end result is functional Complexity (it ends up being an analog computer)
6 Frontend Data acquisition modules Series of selectable circuits that convert device parameters to voltage Voltage: Calibrated attenuator Current: Calibrated shunt resistor Resistance: Precision current source Capacitance: Pulsed current source (integrator)
7 Frontend Voltage measurement Input protection x10 Output Input Figure 2: Voltage block
8 Frontend Current measurement Input + Input High-current shunt Output (to voltage block) Figure 3: Current block
9 Frontend Resistance measurement Input + Input I Reference voltages Output Figure 4: Resistance block
10 Frontend Capacitance measurement Ideas: Constant-current pulse generator with discharge resistor (use DUT as integrator), measure peaks: I C = C dv C (t) dt = V C (t) = 1 C I C dt = C = t on I C V C LM555 variable-width pulse generator (duty cycle varies with capacitance, average the output) Use the DUT as a LPF and measure the reactance: X C = 1 2πfC
11 Backend Designing a discrete ADC Goals: Output as base-10 (not binary) for digital display High ( 3 digit) accuracy Minimal cost: use as few components as possible (a) Flash ADC (b) Folding ADC
12 Backend My solution Combine flash ADC (easy to implement) with folding ADC (modulus operator) Serialize the process to minimize the component count Implement a three-state analog state machine that computes one digit at a time Use sample-and-hold amplifiers as analog registers to hold data in between states Design it so it s easy to drive seven-segment controllers (CD4511)
13 Backend Analog modulus comparator unit (ACU) Input 0.1 Magnitude comparator 0.01 State Priority encoder To Vref x10 To displays Figure 6: ACU block
14 Projected key dates Timeline Week of April 9: Seven-segment controllers finished, magnitude comparator and voltage reference completed Week of April 16: Voltage reference multiplexer completed, finish ACU (tentative) Week of April 23: Frontend modules completed (voltage, current, resistance) Week of April 30: Complete capacitance module, integrate frontend and debug
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