Precision CMOS Analog Switches

Transcription

1 Precision MO Analog witches G417, G418, G419 ERIPTION The G417, G418, G419 monolithic MO analog switches were designed to provide high performance switching of analog signals. ombining low power, low leakages, high speed, low on-resistance and small physical size, the G417 series is ideally suited for portable and battery powered industrial and military applications requiring high performance and efficient use of board space. To achieve high-voltage ratings and superior switching performance, the G417 series is built on s high voltage silicon gate (HVG) process. Break-beforemake is guaranteed for the G419, which is an PT configuration. An epitaxial layer prevents latchup. Each switch conducts equally well in both directions when on, and blocks up to the power supply level when off. The G417 and G418 respond to opposite control logic levels as shown in the Truth Table. FEATURE ± 15 V analog signal range On-resistance - R (on) : 20 Fast switching action - t ON : 100 ns Ultra low power requirements - P : 35 nw TTL and MO compatible MiniIP and OI packaging 44 V supply max. rating 44 V supply max. rating ompliant to RoH directive 2002/95/E BENEFIT Wide dynamic range Low signal errors and distortion Break-before-make switching action imple interfacing Reduced board space Improved reliability APPLIATION Precision test equipment Precision instrumentation Battery powered systems ample-and-hold circuits Military radios Guidance and control systems Hard disk drives FUNTIONAL BLOK IAGRAM AN P ONFIGURATION G417 ual-in-line and OI 1 8 N 2 7 GN TRUTH TABLE Logic G417 G418 0 ON OFF 1 OFF ON Logic "0" 0.8 V Logic "1" 2.4 V Top View G419 ual-in-line and OI GN TRUTH TABLE G419 Logic W 1 W 2 Logic "0" 0.8 V Logic "1" 2.4 V 0 ON OFF 1 OFF ON Top View * Pb containing terminations are not RoH compliant, exemptions may apply ocument Number:

2 G417, G418, G419 ORERG FORMATION Temp. Range Package Part Number G417, G418 G to to 85 8-Pin Plastic MiniIP 8-Pin Narrow OI 8-Pin Plastic MiniIP 8-Pin Narrow OI G417J G417J-E3 G418J G418J-E3 G417Y G417Y-E3 G417Y-T1 G417Y-T1-E3 G418Y G418Y-E3 G418Y-T1 G418Y-T1-E3 G419J G419J-E3 G419Y G419Y-E3 G419Y-T1 G419Y-T1-E3 ABOLUTE MAXIMUM RATG Parameter (Voltages referenced to ) Limit Unit 44 GN 25 (GN - 0.3) to () igital Inputs a () - 2 to () + 2, V, V or 30 ma, whichever occurs first urrent, (Any Terminal) ontinuous 30 urrent, or (Pulsed at 1 ms, 10 % uty ycle) 100 torage Temperature (AK uffix) - 65 to 150 (J, Y uffix) - 65 to 125 Power issipation (Package) b 8-Pin Narrow OI d 400 mw 8-Pin Plastic MiniIP c Pin erip e 600 Notes: a. ignals on X, X, or X exceeding or will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to P board. c. erate 6 mw/ above 75. d. erate 6.5 mw/ above 75. e. erate 12 mw/ above 75. V ma 2 ocument Number: 70051

3 G417, G418, G419 HEMATI IAGRAM Typical hannel V Level hift/ rive GN Figure 1. PEIFIATION a Parameter ymbol Test onditions Unless Otherwise pecified = 15 V, = = 5 V, V = 2.4 V, 0.8 V f Temp. b Typ. c A uffix - 55 to 125 uffix - 40 to 85 Min. d Max. d Min. d Max. d Analog witch Analog ignal Range e V ANALOG V rain-ource On-Resistance witch Off Leakage urrent hannel Off Leakage urrent R (on) I (off) I (off) I (on) I = - 10 ma, V = ± 12.5 V = 13.5 V, = V = 16.5, = V V = ± 15.5 V V = ± 15.5 V = 16.5 V, = V V = V = ± 15.5 V G417 G418 G419 G417 G418 G igital ontrol Input urrent V Low I IL Input urrent V High I IH ynamic haracteristics R Turn-On Time t L = 300, L = 35 pf G417 ON V = ± 10 V G418 ee witching Time G417 Turn-Off Time t OFF Test ircuit G418 R L = 300, L = 35 pf Transition Time t TRAN V 1 = ± 10 V, V 2 = ± 10 V G419 Break-Before-Make R L = 300, L = 35 pf t Time elay (G403) V 1 = V 2 = ± 10 V G harge Injection Q L = 10 nf, V gen = 0 V, R gen = 0 60 p Unit na µa ns ocument Number:

4 G417, G418, G419 PEIFIATION a Parameter ymbol Test onditions Unless Otherwise pecified = 15 V, = = 5 V, V = 2.4 V, 0.8 V f Temp. b Typ. c A uffix - 55 to 125 ynamic haracteristics ource Off apacitance (off) 8 f = 1 MHz, V = 0 V G417 rain Off apacitance (off) 8 G418 G417 hannel On 30 apacitance (on) f = 1 MHz, V = 0 V G418 G Power upplies Positive upply urrent I+ 5 Negative upply urrent I- = 16.5 V, = V Logic upply urrent I L V = 0 or 5 V Ground urrent I GN uffix - 40 to 85 Min. d Max. d Min. d Max. d Unit pf µa PEIFIATION a for Unipolar upplies Test onditions Unless Otherwise pecified = 12 V, = 0 V Parameter ymbol = 5 V, V = 2.4 V, 0.8 V f Temp. b Typ. c A uffix - 55 to 125 uffix - 40 to 85 Min. d Max. d Min. d Max. d Analog witch Analog ignal Range e V ANALOG V rain-ource On-Resistance R (on) I = - 10 ma, V = 3.8 V = 10.8 V ynamic haracteristics Turn-On Time t ON R L = 300, L = 35 pf, V = 8 V 110 Turn-Off Time t OFF ee witching Time Test ircuit 40 Break-Before-Make Time elay t G419 Only R L = 300, L = 35 pf harge Injection Q L = 10 nf, V gen = 0 V, R gen = 0 5 p Power upplies Positive upply urrent I Negative upply urrent I- = 13.2 V, = 5.25 V Logic upply urrent I L V = 0 or 5 V µa Ground urrent I GN Notes: a. Refer to Process Option Flowchart. b. = 25, = as determined by the operating temperature suffix. c. Typical values are for EIGN AI ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. V = input voltage to perform proper function. tresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Unit ns 4 ocument Number: 70051

5 G417, G418, G419 TYPIAL HARATERITI 25, unless otherwise noted I = - 10 ma ± 5 V T A = 125 ± 8 V R (on) ( ) ± 10 V ± 12 V ± 15 V R (on) ( ) ± 20 V V - rain Voltage (V) R (on) vs. V and upply Voltage V - rain Voltage (V) R (on) vs. Temperature = 15 V = = 5 V = 16.5 V = V = 5 V V = 0 V L = 10 nf 1 nf 10 G417/418: I (of f), I ( of f) G419: I (off) pf I (pa) 0-10 G417/418: I (on) G419: I (off), I (on) Q (p) pf V or V - rain or ource Voltage (V) Leakage urrents vs. Analog Voltage V - ource Voltage (V) rain harge Injection (V) V TH = 7 V 1.0 = 5 V () Input witching Threshold vs. upply Voltages ocument Number:

6 G417, G418, G419 TYPIAL HARATERITI 25, unless otherwise noted = 15 V, = = 5 V, V = 3 V Pulse t ON G417/418/419 ource 2 t ON, t OFF (ns) t OFF (db) = 15 V = = 5 V G419 ource k 10 k 100 k 1 M 10M 100M Temperature ( ) witching Time vs. Temperature f - Frequency (Hz) rosstalk and Off Isolation vs. Frequency t ON, t OFF (ns) = 0 V = 5 V V = 3 V t ON t ON, t OFF (ns) = 0 V = 5 V V = 3 V t ON 50 t OFF t OFF 40 ± 10 ± 11 ± 12 ± 13 ± 14 ± 15 ± 16 upply V oltage (V) witching Time vs. upply Voltages upply V oltage (V) witching Time vs. 10 ma 1 ma = 15 V, = = 5 V, V = 5 V, 50 % -ycle 1 µa 100 na = 16.5 V, = V = 5 V, V = 0 V I UPPLY 100 µa 10 µa I+, I- I UPPLY 10 na 1 na 100 pa I+, I- 1 µa I L 10 pa 1 pa I GN 100 na k 10 k 100 k 1M 10M f - Frequency (Hz) Power upply urrents vs. witching Frequency 0.1 pa Temperature ( ) upply urrent vs. Temperature 6 ocument Number: 70051

7 G417, G418, G419 TET IRUIT is the steady state output with the switch on. ± 10 V GN + 15 V R L 300 L 35 pf Logic Input witch Input 3 V 0 V V 50 % 90 % t r < 20 ns t f < 20 ns t OFF witch Output 0 V t ON L (includes fixture and stray capacitance) = V R L R L + r (on) Note: Figure 2. witching Time (G417, G418) Logic input waveform is inverted for switches that have the opposite logic sense V Logic Input 3 V t r < 20 ns t f < 20 ns V V V 2 2 R L 300 L 35 pf V 1 = V 2 90 % GN witch Output 0 V t t L (includes fixture and stray capacitance) Figure 3. Break-Before-Make (G419) + 15 V V 1 1 Logic Input 3 V 0 V 50 % t r < 20 ns t f < 20 ns V 2 2 R L 300 L 35 pf V 1 V 01 t TRAN t TRAN 90 % GN witch Output V 2 V % L (includes fixture and stray capacitance) = V R L R L + r (on) Figure 4. Transition Time (G419) ocument Number:

8 G417, G418, G419 TET IRUIT R g 3 V GN L 10 nf X OFF ON Q = x L OFF Figure 5. harge Injection + 15 V + 15 V V R g = V R g = V, 2.4 V R L R L 0.8 V GN GN V X TA LK Isolation = 20 log = RF bypass Figure 6. rosstalk (G419) Off Isolation = 20 log Figure 7. Off Isolation V + 15 V V R g = 50 0 V, 2.4 V R L GN Figure 8. Insertion Loss 8 ocument Number: 70051

9 G417, G418, G419 TET IRUIT + 15 V + 15 V N 0 V, 2.4 V G417/418 Meter HP4192A Impedance Analyzer or Equivalent 0 V, 2.4 V 2 1 G Meter HP4192A Impedance Analyzer or Equivalent GN f = 1 MHz GN f = 1 MHz Figure 9. ource/rain apacitances APPLIATION witched ignal Powers Analog witch The analog switch in Figure 10 derives power from its input signal, provided the input signal amplitude exceeds 4 V and its frequency exceeds 1 khz. This circuit is useful when signals have to be routed to either of two remote loads. Only three conductors are required: one for the signal to be switched, one for the control signal and a common return. A positive input pulse turns on the clamping diode 1 and charges 1. The charge stored on 1 is used to power the chip; operation is satisfactory because the switch requires less than 1 µa of stand-by supply current. Loading of the signal source is imperceptible. The G419 s on-resistance is a low 100 for a 5 V input signal µf Input 1 UT 2 ontrol R L2 10 k GN G419 R L1 10 k Figure 10. witched ignal Powers Remote PT Analog witch ocument Number:

10 G417, G418, G419 APPLIATION Micropower UP Transfer witch When V drops to 3.3 V, the G417 changes states, closing W 1 and connecting the backup cell, as shown in Figure prevents current from leaking back towards the rest of the circuit. urrent consumption by the MO analog switch is around 100 pa; this ensures that most of the power available is applied to the memory, where it is really needed. In the stand-by mode, hundreds of A are sufficient to retain memory data. When the 5 V supply comes back up, the resistor divider senses the presence of at least 3.5 V, and causes a new change of state in the analog switch, restoring normal operation. Programmable Gain Amplifier The G419, as shown in figure 11, allows accurate gain selection in a small package. witching into virtual ground reduces distortion caused by R (on) variation as a function of analog signal amplitude. GaAs FET river The G419, as shown in figure 12 may be used as a GaAs FET driver. It translates a TTL control signal into - 8 V, 0 V level outputs to drive the gate. V (5 V) 1 R k V ENE Memory W 1 G i ell R k GN Figure 11. Micropower UP ircuit G R 1 R 2 1 GaAs FET 2 UT 5 V G419 V - GN UT + Figure 12. Programmable Gain Amplifier - 8 V Figure 13. GaAs FET river maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for ilicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see /ppg? ocument Number: 70051

11 Package Information OI (NARROW): 8-LEA JEE Part Number: M E H A 0.25 mm (Gage Plane) h x 45 All Leads e B A 1 L q mm 0.004" MILLIMETER HE IM Min Max Min Max A A B E e 1.27 B B H h L q EN: Rev. I, 11-ep-06 WG: 5498 ocument Number: ep-06 1

12 Package Information A 1 E 1 Q 1 A L E im Min Max Min Max A A B B E E e e A L Q EN: Rev. E, 09-Jul-01 WG: 5478 B 1 e 1 B e A 15 MAX NOTE: End leads may be half leads. ocument Number: Jul-01 1

13 Package Information L e 1 E E 1 Q 1 A A 1 L im Min Max Min Max A A B B E E e B B e A 7.62 B B L L Q EN: Rev., 09-Jul-01 WG: 5348 B 1 B e A ocument Number: Jul-01 1

14 VIHAY ILIONIX TrenchFET Power MOFETs Application Note 808 Mounting LITTLE FOOT, O-8 Power MOFETs Wharton Mcaniel urface-mounted LITTLE FOOT power MOFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. ee Application Note 826, Recommended Minimum Pad Patterns With Outline rawing Access for MOFETs, ( for the basis of the pad design for a LITTLE FOOT O-8 power MOFET. In converting this recommended minimum pad to the pad set for a power MOFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. In the case of the O-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOFET for a single MOFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are inches wide. ince the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the P board Figure 1. ingle MOFET O-8 Pad Pattern With opper preading Figure 2. ual MOFET O-8 Pad Pattern With opper preading The minimum recommended pad patterns for the single-mofet O-8 with copper spreading (Figure 1) and dual-mofet O-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. ince surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the P board, thermal connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. APPLIATION NOTE ocument Number: Revision: 18-Jun-07 1

15 Application Note 826 REOMMENE MIMUM PA FOR O (4.369) (0.711) APPLIATION NOTE (1.194) (6.248) (3.861) (0.559) (1.270) Recommended Minimum Pads imensions in Inches/(mm) Return to Index Return to Index ocument Number: Revision: 21-Jan-08

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