XIII International PhD Workshop OWD 2011, October Multichannel Electronic Readout for Optical Radiation Sensors

Transcription

1 XIII International PhD Workshop OWD 2011, October 2011 Multichannel Electronic Readout for Optical Radiation Sensors Łukasz Kotynia, Technical University of Lodz ( , Prof. Andrzej Napieralski, Technical University of Lodz) Abstract This paper presents selected aspects of fast multichannel electronic readout for optical sensors. Special emphasis is put on features such as lowlatency and high repetition rate of readout of the complete information from a multichannel sensor external photodiode array (PDA). The complete readout chip architecture, from preamplifier to digital converter, is briefly described, whereas the input charge-sensitive amplifier is analyzed in detail. The paper presents tradeoffs and challenges related to design of analog-mixed signal Integrated Circuit in deep submicron CMOS technology. 1 Introduction Optical radiation is loosely classified as electromagnetic radiation of wavelength ranging from 100 nm to 1 mm. In this paper, I concentrate on electronics for semiconductor detectors namely InGaAs and silicon photodiodes which operate in this range. Detection of optical radiation is a broad field of science with many branches. The advance in electronic and electro-optic technology has enable construction of measurement devices for many different applications from industrial (automotive) to medical and scientific purposes. Positron Emission Tomography, X-ray computed tomography, baggage or cargo non-destructive inspection are only some examples [1]. Generic model of radiation detector can be specified [2]. Pre- Pulse amplifier Shaping A/D Conversion electronic readout Fig. 1. Radiation detector generic model of a single channel. Simplified signal are shown below. Dotted and solid lines indicate current and voltage signals, respectively. Fig. 1 shows schematically principle of operation of a generic radiation detector model. A sensor (e.g. photodiode) generates a short current signal upon stimulus from incident radiation. The signal needs to be amplified and then shaped (with band-pass filter) in order to facilitate analog-to-digital conversion. In fact, the same generic model can be extended to detect non-optical radiation. High Energy Physics (HEP) heavily uses different flavors of radiation detectors to measure characteristic features of particles. And the HEP experiment indirectly was the motivation to start the investigation on this project. The paper is organized as follows. Section 2 briefly presents motivations and possible applications of the proposed integrated readout chip. Section 3 presents the overall chip architecture with special attention paid to preamplifier and some aspects of fast analog signal processing, mainly feedback configuration. Finally, the paper is concluded with final remarks and plans for the future. Semiconductor detectors physics and models are out of the scope of this paper. 2 Motivation Although the proposed chip is not intended to be used for particle detection, it can theoretically be used as part of equipment of facilities like Free- Electron Laser in Hamburg (FLASH) or European X-ray Free Electron Laser (E-XFEL). These linacbased free electron lasers generate femtosecond X- ray light pulses for variety of experiments [3]. In short, Free-Electron Lasers can be seen as devices which transform kinetic energy of relativistic electrons into electromagnetic energy of photons [4]. Therefore electron beam diagnostics and control become one of the key elements of FELs operation. Tight timing requirements for the diagnostic electronics are related with the specific pulse operation mode [5] shown in Fig. 2. In this operation scheme electrons are generated in bunches. A group of such bunches constitute so called bunch-train. The bunch-to-bunch spacing is critical for the diagnostic instrumentation since information on every bunch in a train is desirable. The interval between electron bunches for FLASH is specified to 1µs and will shrink to around 220ns for the E-XFEL which is currently under construction. 529

2 Fig. 2. Pulse-mode operation of FLASH. There are attempts to build a diagnostic system based on available devices [6]. This approach is based on employing the Beetle chip[7] an Integrated Circuit developed for the LHCb experiment at CERN. This readout IC is able to detect pulses coming with repetition rate up to 40MHz. However, the readout frequency of the complete information from all channels in the Beetle chip is limited to 1.1MHz due to the fact that detected data is stored in internal pipeline. Storing data in a type of internal (analog) memory is a common strategy in the HEP experiments where only an interesting fraction of information is being read out and analyzed. The novelty of this approach is to develop an IC that enable not only detecting but also reading out the complete data from the sensors with repetition rate in megahertz range. 3 Chip architecture continuous discharge mode. This section of the channel is described in detail in the next section. 3) The main goals of the shaper are to filter out noise, amplify (shaper contain an amplifier which is not shown in Fig. 3) signal and shorten the pulse duration. The latter task is especially important in case of high frequency readout chips. The pulse shaping section is a band-pass filter composed, in this case, of one differentiator and two integrators. We call this type of filter CR-(RC) 2. This architecture is a compromise between shaped pulse duration, symmetry and silicon area, power. More information regarding shapers can be found in [8]. 4) Analog-to-digital converter. Currently it is realized as a 3-bit flash ADC employing 7 comparators and digital decoder. Fig. 4. Example of single channel output. From top: short photocurrent pulse, output of the CSA stage, output of the shaper, 3 digital busses. Fig. 3. Schematic of a single channel of the readout chip. The shaper is shown simplistically for sake of clearance. The generic model from Fig. 1 is shown in more detail in Fig. 3. The proposed architecture is composed of: 1) Photodiode Array (PDA) model which is represented by piece-wise-linear (PWL) current source (photocurrent generator) and parallel capacitor C T. The latter element is a lumped parasitic capacitance of the photodiode and all the parasitic stray capacitances (connection, bounding, etc.) 2) Charge-Sensitive Amplifier. This part is composed of an amplifier with a capacitance in the feedback path. Additional resistor discharges this capacitance in so called Fig. 4 shows an example of output of the channel upon the stimulus. 3.1 Charge-Sensitive Amplifier (CSA) In this section the Charge-Sensitive Amplifier is analyzed in more details starting from calculating the CSA gain, i.e. voltage at the CSA output (V csa) as a function of the photocurrent Gain and input charge Let us assume for a moment that the resistance R f is close to infinity and all the charge is stored in the feedback capacitance C f. By applying the CKL to the circuit from Fig. 3, we get: 530 (1) where C T is a lumped parasitic capacitance of the diode and connections and R f and C f are resistance and capacitance of the feedback loop, respectively. Assuming an ideal amplifier is ideal, we can write:

3 where K 0 is independent on frequency, we get the final formula for the CSA gain: Using some approximation, we obtain: First of all, it was assumed that the core amplifier gain (K 0) is big. What is more, a parameter sometimes called dynamic input capacitance needs to be much greater than the parasitic capacitance of the sensor. Finally, assuming an ideal Dirac function at the input of the CSA ( = ( )), we can express the CSA output in the time domain: The equation implies that it is possible to easily change the CSA gain by adjusting the capacitance in the feedback loop. However, this is true, however, only when capacitance C T is much smaller than the dynamic capacitance C d. Keeping the dynamic capacitance high (by increasing gain of the core amplifier) with regard to parasitic capacitance C T plays also an important role in charge collection. To summarize, we want to have a big core amplifier gain in order to: make the CSA input independent on sensor capacitance maximize charge collected on the feedback capacitance Timing response Now let us consider the timing response of the CSA taking into account a single-pole core amplifier model, i.e.: where K 0 is a low frequency gain and ω 0 is the pole. Using this equation with Equation (1) and assumptions derived in the last subsection, we get: where =. The CSA usually has two well-separated poles which allow us to rewrite the transfer function in another form where the poles are expressed as: (2) (3) i d C T C d V in Fig. 5. Simplified schematic of the CSA stage including Miller multiplication. Let us calculate fraction of the total charge generated in the sensor that goes into the CSA input using the schematic from Fig. 5 which includes a "dynamic" input capacitance which can be calculated according to the Miller's theorem. Using the following basic equations: Again, taking into account that the CSA input is a Dirac-like function ( = ( )), we can express the CSA in the time domain: (4) we can write Fig. 6. Impact of the core amplifier GBW on the CSA response. The first time constant (τ f) is responsible for signal decay and will be analyzed in more detail in the next section. Time constant τ p is responsible for 531

4 the peaking time (see Fig. 6). It is advisable to maximize the Gain Bandwidth product (GBW) in order to transfer all the charge and minimize peaking time. 3.2 Aspect of fast analog signal processing As it was said, the CSA gain is set by the feedback capacitance. Let us now analyze impact of the feedback resistance on the CSA behavior taking into account that input pulses may come every 220ns. With this approach, charge gathered at the feedback capacitance is being continuously discharge by the feedback resistor. Due to noise performance it is desirable to specify big value of R f. However, consecutive pulses that come with high frequency move the CSA output dc level from nominal value (measured without stimulus). This shift in V csa may drastically change operating point of the core amplifier. This phenomenon is shown in Fig. 7 top. What is more, even if shift of the CSA output level does not cause core amplifier to stop working, this shift will impact the dc level of the shaper output. The latter case is shown in Fig. 7 bottom and brings additional complication in analog-to-digital conversion. Let us now assume that the core amplifier has very high GBW ( = 0). Equation (4) becomes in that case (5) Assuming that current pulses of equal charge value Q go into the CSA at constant frequency f, it can be calculated that the dc shift at the CSA output equals Assuming that = 10, = 50Ω and = 1/220"#, we get dc voltage shift of around 341mV which is in good agreement with simulation results shown in Fig. 7. Fig. 7. Impact of high repetition rate of pulses on dc shift at the CSA output (simulation results). Small value of R f is desirable. However, in practical case, one needs to take into account noise contribution of the feedback resistance. It can be shown that low value of R f increases noise [2]. There is another aspect of the feedback configuration which can be illustrated considering output of the shaper. Transfer function of the shaping section from Fig. 3 can be written as: Assuming step function at the shaper input (for ), we can calculate the response in time domain: where V in denotes the step function amplitude. Fig. 8. Impact of the feedback resistance on the CSA (top) and shaper (bottom) response. Specifying small value of R f breaks the above assumption and the output of the shaper demonstrates undershoot. Fig. 8 gathers parametric simulations for different value of R f. It can be seen that with small values of the feedback resistance ( = 500Ω), the undershoot is very visible but the signal comes back to the baseline after about 300ns. For large value of R f, we observe that the undershoot amplitude is much smaller. However, the signal tail is getting longer causing pile-ups. This is a very undesirable phenomenon for high-frequency readout systems. In general, there are two possible strategies of alleviate the problem with pulse pile-ups. One can insert a very high resistance to minimize undershoot amplitude or insert very low resistance to shorten the tail. However, there are other aspects that need to be taken into account. From the noise performance point of view, R f should be relatively high. On the other hand, fast signal processing requires short signal tails to avoid pile-ups. There is also a matter of voltage shift. It has to be emphasized that high frequency of operation is possible to obtain only by compromising the noise performance. In case of this project, it was decided to set = 400Ω to satisfy high-frequency operation constraint and preserve stability (not described in this paper). 532

5 Even with relatively low feedback resistance, the shaper output signal tail does not allow frequency of input pulses in range of several MHz The baseline shift of the shaper output may impact the analog-todigital conversion Fig. 9. Therefore, an additional section, called Pole-Zero Cancellation (PZC) circuit [9], was added to the system. additional resistor allow using this architecture with impulses with repetition rate of 4.5MHz. Fig. 9. Response of the shaper upon stimulus of a pulse train (without PZC) In order to better understand the principle of operation of the circuit with PZC, let us consider schematic of the analog channel shown in Fig. 10. Fig. 11. Response of the shaper upon stimulus of a pulse train (with PZC) Theoretically, using PZC allow increasing the feedback resistance which can limit the noise. However, additional constraint needs to be taken into account. Typically, photodiode arrays are dccoupled with the readout electronics. Consequently, the sensor leakage current cannot be neglected. This current flows through the resistive branch of the CSA feedback causing additional dc shift at the CSA output. Lowering R f may limit this unwanted phenomenon. In order to assess impact of the CSA feedback resistor on the CSA noise performance, a noise simulation was done. Assuming that noise from individual transistors and resistors is not correlated, we can express the total noise Fig. 10. Schematic of the analog channel with PZC Let us first consider the CSA output without R PZC element assuming that the CSA core amplifier has a very high gain bandwidth product. Then Equation (5) is applicable and can be written in a Laplace form: By adding the additional resistor we change the voltage after the PZC section which can be now expressed as: If the condition where rmsnoise is integrated root-mean-square of the output noise over the bandwidth (here 10Hz to 10GHz). cascode transistor 2% rest 39% input transistor 46% Rf 13% Fig. 12. Noise contribution of the CSA elements. is met, we can rewrite the above equation into In other words, zero introduced by the PZC circuit cancels the pole of CSA which may cause undesirable undershoots and pile-ups. Fig. 11 Shows the response of the shaper after applying the PZC circuit. As it can be seen, Fig. 12 gathers simulation results for the CSA with core amplifier in folded-cascode architecture. As it can be seen the input transistor is the main contributor of noise. The feedback resistor generates less noise than current mirrors and output buffers (gathered under the rest label). Different simulations (transient, noise) show that =400Ω and ' 200( are good compromises taking into account high frequency of operation and expected high input charge amount. 533

6 4 Conclusions and future work The selected aspects of high-speed readout ICs for optical radiation sensor were presented. Analytical considerations were followed by simulation results. First results show that reading out signals from multichannel sensor is possible with repetition rate in range of a few megahertz. Additional analysis needs to be done in order to account for leakage current. Additional elements will be provided in order to mitigate the undesirable impact of this current on base line shift. Bibliography [1] hp [2] Spieler, H.: Semiconductor Detector Systems, Oxford University Press, USA (October 20, 2005) [3] FLASH. The Free-Electron Laser in Hamburg e395/e2188/flash-broschrefrs_web.pdf [4] Murphy, J.B. and Pellegrini, C.: Introduction To The Physics Of The Free Electron Laser, Lecture Notes in Physics, 1988, Volume 296/1988 [5] Koprek, W. et al.: Intra-train Longitudinal Feedback for Beam Stabilization at FLASH, THOAI2, FEL2010, Malmo, Sweden, August 2010 [6] Kotynia, L. et al.: 1-MHz Line Detector For Intra- Bunch-Train Multichannel Feedback, DIPAC2011, Hamburg, TUPD038, 2011 [7] Loechner, S. and Schmelling, M. ; The Beetle Reference Manual, LHCb note [8] Gryboś, P.: Front-End Electronics For Multichannel Semiconductor Detector Systems, Institute of Electronic Systems. Warsaw University of Technology, 2010 [9] Grybos, P., Maj, P., Szczygiel, R.: Comparison of Two Pole-Zero Cancellation Circuits for Fast Charge Sensitive Amplifier in CMOS Technology, MIXDES 2007 Author: Łukasz Kotynia, M. Sc. Technical University of Lodz ul. Wólczanska 221/223 budynek B Łódź, Poland tel lkotynia@dmcs.p.lodz.pl 534