Hot or Not? Power dissipation in analog front end electronics for 2D detectors. Paul O Connor BNL
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1 Hot or Not? Power dissipation in analog front end electronics for 2D detectors Paul O Connor BNL
2 Multi-element Si 2D detectors HELIOS (1983) ATLAS (2008) EARLY CCD (1985) PanStarrs (2008) SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
3 Non-silicon pixels CdZnTe Gas micropattern MAPMT GEM Philips MicroMEGAS SWIFT Hamamatsu INTEGRAL SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
4 Commercial products Crystallography detector Cardiac SPECT (gamma camera) Digital still camera Hybrid p-i-n/cmos 6Mpix CsI scintillator/p-i-n CMOS 12 Mpix CCD 10Mpix SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
5 Power and cooling have become limiting factors Cable pollution Limited volume (ATLAS) 60kW 1m 3 Heat removal from cryostat (LSST) 600W -100C Radiation length (mostly services) (XFEL) 3kW.01m 3 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
6 On-detector power density limited by cooling capacity Pixel density trend pixels/cm 2 1E+7 1E+6 1E+6 1E+5 1E+5 1E+4 1E+4 1E+3 1E+3 1E+2 1E+1 1E+1 1E+0 1E+0 1E-1 STAR TPC PHX MVD PHX PAD DEPFET1 M'pix2 STAR TPC PHX MVD PHX PAD DEPFET1 M'pix2 gamma cam EXAFS PET XAMPS1 barcode LHC pixels DEPFET2 MAPS LSST gamma cam EXAFS PET XAMPS1 barcode DEPFET2 LHC pixels LSST MAPS 1E-2 1E Year Thermal impedances Temperature dependences Noise Speed Leakage Temp (K) Power density limit Forced liquid cooling required Limit of natural convection with 10 C temp. rise SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
7 Power and cooling issues in data processing Data center power efficiency P TOTAL /P IT data: Google NCSA Petascale computing center (24MW) US total: 7GW (2006) PC Data center future power source? H 2 O-cooled CPU 180W/cm W/ft 2 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3, IBM
8 Multi-element 2D Area Detectors Detector more-or-less planar sensitive surface covered with N PIX sensitive elements ( pixels ) on-detector electronics measures quantity of charge time of occurrence fluence/grey level etc. transmit to DAQ information content = no. of resolution elements ( bits ) Signal characteristics TRACKER IMAGER SPECTROMETER Pulsed - X X Random X X X Triggered X - - Data-driven X X X Integrating - X - Event-by-event X - X Occupancy <10% 100% <50% Time-tag? X - X Dyn. Rng. (bits) SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
9 Power Efficiency Figure of Merit Information generation rate IGR = 2! 2 Nbits : effective number of Nbits N pix! fs resolution elements. f s : event or frame rate Power efficiency [IGR] = resolution elements per second ( bits per second ) E B = P IGR A measure of the energy required per resolution element. [E B ] = Joule similar measures used in computing and communications SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
10 Signal chain optional multiplexing preamp filter analog feature extraction/ analog memory ADC DSP off-detector driver electronics organization N chan =1 N chan =N col N chan =N pix wirebond tileable detector can transfer charge/voltage/current matrix switch per pixel bump bond (hybrid) monolithic power to sustain IGR independent of parallel or serial organization SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
11 Power (W) Preamplifier power efficiency Power vs. detector capacitance τs=1µs ENC= 10e - 20e - 50e - 100e - 200e - Power (W) Power vs. shaping time 10-1 ENC=50e - 100e - 200e - Cdet=1pF Det. capacitance (pf) 500e Usually optimized for minimum ENC, which depends on detector capacitance and shaping time. Dynamic range is determined by detector predicted E B has wide range (fj pj), depending on the experiment Noise (rms e - ) SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3, Power (W) n e - Power vs. ENC 10µs 100n 1u 10u Pulse shaping time (s) 1µs 100ns τs=10ns Cdet=1pF
12 Charge sensitive preamp power efficiency (empirical) charge preamplifier: E B P = Q d max #" s /! Q E B, pj hybrid values cluster around 1pJ no trend with technology feature size C D, pf SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
13 ADC power efficiency 1pJ (12b) 1pJ (10b) E B in same range (1pJ) as charge preamplifier A. Matsuzawa, Trends in High Speed ADC Design, ASICON 10/07 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
14 Signal chain components E B compared Expresses the power cost of achieving SNR and speed Useful rules of thumb during design partitioning charge amplifier: E B = Q P d max #" p /! Q Typical 1.5pJ Best 0.005pJ ADC: E B = 2 P d ENOB! f s 1pJ 0.05pJ off-chip serial link: E = B P f d bit 20pJ 7.5pJ note: pj = mw/mbps SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
15 Net power dissipation B ADC B drvr P det = IGR! ( EB + N preamp SAMP! + ) + nsp 1 nsp2 E E P other where IGR = information generation rate E B,preamp, E B,ADC, E B,drvr are energy per bit of preamp, ADC, and driver resp. N SAMP = no. of ADC samples per pulse n sp1, n sp2 = sparsification ratio into ADC, driver resp. P other = power in analog/digital memory, DSP, regulators, control & monitoring functions, etc. Common sources of wasted power: digitize more than minimum no. of samples digitize faster than minimum rate digitize with more than needed no. of bits of resolution inefficient voltage regulators SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
16 SCEPTER Peak Detector/Derandomizer Derandomizer 2 ASIC inputs 32 1 PULSE RREQ ASIC outputs New architecture for efficient readout of multichannel detectors Self-triggered and self-sparsifying Simultaneous amplitude, time, and address measurement for 32 input channels Set of 8 peak detectors act as derandomizing analog memory Rate capability ~ 10MHz 2mW/channel Reconstructed points Actual waveforrm PDOUT TDOUT SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
17 Example: readout of a TPC using analog buffering Mini-TPC with GEM readout for LEGS experiment at BNL TPC Chamber Double-GEM (gain ~ 500) drift time: 7µs trigger rate: 2kHz occupancy: <3% (pads) Pads ~8000 Anode Plane Front-End Electronics ~8000 channels SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
18 TPC Digitization Power N pads 8000 N timeslices 500 N voxels 4x10 6 Digitization Energy (12 bit resolution): J/bit * 2 12 * N voxels = 16 mj Power (FADC): 16mJ / 7µs = 2000W (250 mw/chan) Power (buffer and readout at 2 khz trigger rate): 16mJ / 500µs = 30W ( 4 mw/chan) Compare with 0.75mW/chan for amplifier + 0.6mW/chan for PD + TAC. With sparsified readout of only occupied channels buffered in PD: P ADC ~ 0.6W (75 µw/chan). SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
19 Packaging Construct stack of several die with connections between layers: stack-and-wirebond embedded in HDI polymer metallic face-to-face bond oxide-bond, through-silicon vias Can mix technologies, potentially including high-resistivity detector layer High fill-factor mosaics Reduce long wire lengths Inter-layer EMI Power density increase by ~ N layers Interlayer vias not to scale with intralayer lithographically-defined vias SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
20 Examples: Trackers ALICE pixel (CERN) RatCAP (BNL) LEGS TPC (BNL) ATLAS CSC (BNL) RatCAP tomograph 32-channel RatCAP ASIC 0.18um CMOS image of conscious rat brain 24-channel ASIC preamp/shaper sampling/digitizing board Area e4 cm 2 Pixels Rate 2M 2M 700K 2.4e7 cps/fps DR e IGR 3.0e12 6.4e9 8.7e10 2.3e10 s -1 P W SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
21 Examples: Imagers MWASIC (BNL) Medipix-2 (CERN) LSST (IN2P3,Harvard, Penn, UTenn, Purdue, BNL) Previous Pixel Shutter 3 bits threshold Maskbit Polarity ClockOut Mux Input Ctest Vth Low Disc1 Preamp Disc2 Vth High Testbit 3 bits threshold Test Input Analog Maskbit Double Disc logic Mux 13 bits Shift Register Conf 8 bits configuration Next Pixel Digital + - 8k 8p 2p 2k Vref Vref 5K Vref 5K K 10K 10K 5K outp inp CDS (switches) inm outm Vref 100pF 100pF "diff DSI" outp "diff DSI" outm Vref Area cm 2 Pixels 64 66K 3.2G - Rate 190K cps/fps DR 330K 8K 240K - IGR 6.1e10 1.6e11 4.5e12 s -1 P W SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
22 Examples: Spectrometers MAIA (BNL, CSIRO) NSASIC (BNL) FEXAMPS (BNL, SLAC) Area cm 2 Pixels M - Rate 8M 2.1M 1K cps/fps DR K - IGR 1.6e9 9.2e8 2.0e13 s -1 P W SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
23 P (W) Power efficiency compared Tracker Imager Spectrometer E B =1nJ NSASIC RatCAP CSC LEGS TPC MAIA Medipix2 MWASIC E B =1pJ LSST ALICE FEXAMPS.01 1.E IGR (s -1 ) EB, J 1.E-08 1.E-09 1.E-11 1.E-12 DSC Efficiency density correlation? 1.E-13 1.E+07 1.E+08 1.E+09 1.E+10 1.E+11 1.E+12 1.E+13 1.E+14 1.E+15 IGR/A, bits/s/cm 2 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
24 Conclusions Powering and cooling on-detector electronics poses engineering challenges in large 2D detectors. Power/performance ratio E B measures electronics efficiency. Preamp, ADC, and driver are the largest power consumers in typical signal chain. CMOS technology evolution provides limited opportunity to reduce analog power consumption. Sparsification and derandomization, as early as possible and preferably in analog domain, are important for efficient architecture. Planning for power efficiency should be part of the detector development process from the earliest phases. SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
25 THE END SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
26 REFERENCES P. O'Connor; Low Noise CMOS Signal Processing IC for Interpolating Cathode Strip Chambers; BNL 61085; IEEE Trans. Nucl. Sci. NS-42 (1995) P. O'Connor and G.De Geronimo; Prospects for charge sensitive amplifiers in scaled CMOS; Nucl. Instrum. & Meth. A484 (2002) G. De Geronimo, P. O'Connor, A. Kandasamy; Analog peak detector and derandomizer for high rate spectroscopy; IEEE Trans. Nucl. Sci. 49 (2002) P. O Connor, G. De Geronimo and A. Kandasamy, Amplitude and Time Measurement ASIC with analog derandomization, Nucl. Instrum. & Meth. A505 (2003), G. De Geronimo, P. O Connor, MOSFET Optimization in deep submicron CMOS technology for charge amplifiers, IEEE Trans. Nucl. Sci. 52 (2005), B. Yu et al., A GEM based TPC for the LEGS experiment, 2005 IEEE Nucl. Sciences Symposium Conference Record, P. O Connor, Future Trends in Microelectronics - Impact on Detector Readout, International Symposium on Detector Development, April , SLAC J-F. Pratte et al., Front-end electronics for the RatCAP mobile animal PET scanner, IEEE Trans. Nucl. Sci. 51 (2004), G. De Geronimo, A. Dragone, J. Grosholz, P. O Connor, E. Vernon, ASIC With multiple energy discrimination for high-rate photon counting applications, IEEE Trans. Nucl. Sci. 54 (2007), M. Campbell, PS Applications, Joint Workshop on Detector Development for Future Photon Science and Particle Physics Experiments, DESY, Oct. 14, 2008, D.P. Siddons, Detector R&D for NSLS-II, X-ray Photon Correlation Spectroscopy & Microbeam SAXS at NSLS- II Workshop, Jan. 11, 2008, G. De Geronimo et al., Front-end ASIC for high resolution X-ray spectrometers, IEEE Trans. Nucl. Sci. 55 (2008), G. Haller, N. Van Bakel, Two dimensional detectors for LUSI science, LCLS FAC Oct 2007, A. Dragone, J-F. Pratte, P. Rehak, G. Carini, R. Herbst, P. O Connor, D.P. Siddons, XAMPS detector readout ASIC for LCLS, 2008 IEEE Nucl. Sci. Symposium Conference Record, N44-8 (2008). SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
27 BACKUPS SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
28 Outline 2D area detectors Optimizing power/performance Device and Circuit Level System level Examples SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
29 Input transistor (M 1 ) optimization Optimize for total (white + 1/f) series noise: adjust W,L while holding I d and t p constant Correct modeling of weak, moderate, and strong inversion (EKV model): dependence of g m, C g, γ on operating point Low-frequency noise: dependence on L g spectral dependence Predict result of scaling to new technologies P. O Connor, Proc. FEE2003 Snowmass G. De Geronimo, P. O Connor, TNS52(6),3223 (2005) SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
30 Noise (rms e - ) Noise (rms e - ) Preamplifier power efficiency Equivalent Noise Charge vs. detector capacitance and shaping time τs=1µs P=10mW P=1µW Det. capacitance (pf) n P=10mW P=1µW Cdet=1pF Power (W) Usually optimized for minimum ENC, which depends on detector capacitance and shaping time Noise (rms e - ) Dynamic range is determined by detector predicted E B has wide range (fj pj), depending on the experiment. 100n 1u 10u Pulse shaping time (s) SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3, µs Power vs. ENC 1µs 100ns τs=10ns Cdet=1pF
31 Parameters for detector comparison Project Type unit pixels power (W) area (cm 2 ) 2^ENOB rate (Hz) IGR (s -1 ) E B (J) IGR/A (cm -2 s -1 ) P/A (W/cm 2 ) LEGS T plane E E E E E RatCAP T ring E E E E E ALICE T chip E E E E E CSC T chamber E E E E E Medipix-2-img I chip E E E E E MWASIC-img I chip E E E E E LSST I FPA 3.20E E E E E E DSC I FPA 1.00E E E E E E NSASIC S chip E E E E E FEXAMPS S 1K^2 det 1.00E E E E E E MAIA S 96-pad detector E E E E E SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
32 MOSFET Scaling 20V 4V Voltages, dimensions reduced by α Results: r E = Conductance Capacitance Speed I / V I / CV const. const. 1!! Switching energy Power/gate Density Power density CV 2 CV f 2 1 3! 1 2! 2! const. SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
33 Industry Scaling Roadmap New generation every ~2 years with α = 2 L g (1970) 8 µm (2007) 18 nm 180 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
34 Can Scaling Continue? Until 180nm node: follow classical scaling with α = 2 2.8X performance per generation Now: thermal voltage prevents further voltage scaling continue (super) scaling L g V DD, V TH have stopped scaling Gate density and speed continue to scale Increase of E, conductance Switching energy decreases only by 1/α not 1/α 3 Power density increase ~ α Static power from leakage, gate tunneling make power problem worse SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
35 CMOS Scaling impact on analog more, faster transistors better radiation resistance reduced gain poorer matching lower noise margins dynamic range limited by low supply voltage Min. Feature Size, um SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3, Dynamic Range uw 100 uw 1000 uw
36 Mixed-signal chips SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
37 SLAC Advanced Instrumentation Seminar Paul O'Connor BNL December 3,
Power dissipation tradeoffs in analog front end electronics for 2D detectors. Paul O Connor BNL
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