The BaBar Silicon Vertex Tracker (SVT) Claudio Campagnari University of California Santa Barbara

Size: px

Start display at page:

Download "The BaBar Silicon Vertex Tracker (SVT) Claudio Campagnari University of California Santa Barbara"

Ernest Grant
5 years ago
Views:

1 The BaBar Silicon Vertex Tracker (SVT) Claudio Campagnari University of California Santa Barbara

2 Outline Requirements Detector Description Performance Radiation

3 SVT Design Requirements and Constraints (from TDR) Performance Requirements z z resolution resolution < < mm mm Single Single vertex vertex resolution resolution < < mm. mm. Stand-alone Stand-alone tracking tracking for for PP T < T < MeV/c. MeV/c. PEP-II Constraints Permanent Permanent dipole dipole (B1) (B1) magnets magnets at at +/- +/ cm cm from from IP. IP. Polar Polar angle angle restriction: restriction: < < Θ < < Must Must be be clam-shelled clam-shelled into into place place after after installation installation of of B1 B1 magnets magnets Bunch Bunch crossing crossing period: period: ns ns (nearly (nearly continuous continuous interactions). interactions). Radiation Radiation exposure exposure at at innermost innermost layer layer (nominal (nominal background background level): level): Average: Average: krad/year. krad/year. In In beam beam plane: plane: krad/year. krad/year. SVT SVT is is designed designed to to function function in in up up to to X nominal nominal background. background.

4 SVT characteristics Five layers, double sided Barrel design, L4 and 5 not cylindrical 340 wafers, 6 different types Low mass Kevlar-Carbon Fiber support ribs Upilex fanouts to route signal to ends Double-sided AlN HDI (104 of these) Outside tracking volume Mounted on Carbon Fiber cones (on B1 magnets) Atom chips 1156 chips, 140K channels

Layer Radius (mm) Modules/ Layer Wafers/ Module F Pitch (mm) Z Pitch (mm) 1 32 6 4 50 or 100 100 2 40 6 4 55

5 Layer Radius (mm) Modules/ Layer Wafers/ Module F Pitch (mm) Z Pitch (mm) or or or a b a b

6 Space Frame and Support Cones mounted on B1 magnets

Fanout Properties: Properties: < < 0.03 0.

7 SVT Modules Z-Side Z-Side High Density Interconnect (mechanical model) Micro-bonds Flexible Upilex Fanout Micro-bonds Phi-Side Phi-Side Fanout Fanout Properties: Properties: < < % X X Si Wafers Carbon/Kevlar fiber Support ribs

SVT High Density Interconnect Functions: Functions: Mounting Mounting and and cooling cooling for for readout readout ICs. ICs. Mechanical Mechanical mounting mounting point point for for module.

8 SVT High Density Interconnect Functions: Functions: Mounting Mounting and and cooling cooling for for readout readout ICs. ICs. Mechanical Mechanical mounting mounting point point for for module. module. Berg Connector Mounting Buttons Flexible Tail (testing version) Features: Features: AlN AlN substrate. substrate. Double Double sided. sided. Thermistor Thermistor for for temp. temp. monitor. monitor. 33 different different models. models. AToM Chips Upilex Fanout

9 Silicon Wafers Features Manufactured at at Micron. Micron µm µm thick. thick. 6 6 different wafer wafer designs. n n - - bulk, bulk, kω kω cm. cm. AC AC coupling to to strip strip implants. Polysilicon Bias Bias resistors on on wafer, wafer, 5 MΩ. MΩ. Bulk Bulk Properties Bias Bias current: current: to to µa µa Bulk Bulk current: current: to to µa µa Depletion Depletion voltage: voltage: to to V V Strip Strip Properties n-side n-side n-side n-side n-side n-side p-side p-side Strip Strip Pitch: Pitch: µm µm µm µm µm50 µm50 µm µm Inter-strip Inter-strip C: C: AC AC decoupling decoupling C: C: Implant-to-back Implant-to-back C: C: Bias Bias R: R: 4 4 to to 8 8 MΩ MΩ 4 4 to to 8 8 MΩ MΩ 4 4 to to 8 8 MΩ MΩ 4 4 to to 8 8 MΩ MΩ

10 Silicon Wafers Edge guard ring P-stop 55 µm n + Implant Bias ring Polysilicon bias resistor p + Implant Al 50 µm Polysilicon bias resistor Edge guard ring p + strip side n + strip side

11 The AToM Chip Custom Custom Si Si readout readout IC IC AToM AToM = A Time Time Over Over threshold threshold Machine Machine 5.7 mm Features: Features: Channels Channels per per chip chip Rad-Hard Rad-Hard CMOS CMOS process process (Honeywell) (Honeywell) Simultaneous Simultaneous Acquisition Acquisition Digitization Digitization Readout Readout Sparsified Sparsified readout readout Time Time Over Over Threshold Threshold (TOT) (TOT) readout readout Internal Internal charge charge injection injection 8.3 mm

12 The AToM Chip Si C AC PRE AMP CAL DAC C INJ Shaper Thresh DAC Comp 15 MHz Revolving Buffer 193 Bins TOT Counter Time Stamp Event Time Event Number Chan # Buffer Buffer Sparsification Readout Buffer Serial Data Out Amp, Amp, Shape, Shape, Discr, Discr, Calib Calib 5-bit 5-bit CAL CAL DAC DAC (0.5 (0.5 fc/count) fc/count) 5-bit 5-bit Thr Thr DAC DAC (0.05 (0.05 fc/count) fc/count) Shaping Shaping time time ns ns Typical Typical threshold threshold fc fc Trigger Trigger Latency Latency Buffer Buffer MHz MHz Sample Sample rate rate Total Total storage storage = = us us TOT, TOT, Tstamp, Tstamp, Buffering Buffering 4 4 bits bits TOT TOT (logarithmic) (logarithmic) 5 5 bits bits Hit Hit Tstamp Tstamp (67 (67 ns/count) ns/count) 4 4 buffers buffers / / channel channel

13 Performance Calibration, Noise Occupancy Efficiency Intrinsic Resolution

Calibration Hits Noise, gain, pedestals, bad channels obtained from scanning threshold with and without charge injection and counting hits 600K errfun fits, 150K linear

14 Calibration Hits Noise, gain, pedestals, bad channels obtained from scanning threshold with and without charge injection and counting hits 600K errfun fits, 150K linear fits once a day; takes ~ 2 minutes Very stable Downloadable chip parameters have not changed since Oct 1999 Offset Counts Offset Noise Threshold Threshold DAC Offset Qinj Counts

15 Noise Layer ENC Layer ENC 1φ z 880 2φ z 970 3φ z φ z φ z MIP at normal incidence, about 23,000 electrons

16 Occupancy (Layer 1) forward backward Offline t t ~ 300 nsec effective occupancy lower by by factor ~ 3

17 Cluster efficiency ε 97% (SW + HW) Excluding 9/208 malfunctioning readout sections

18 Resolution

19 Standalone reconstruction of low P T tracks Reconstruction of π s from D* D π s is (mostly) with SVT alone

20 Map of malfunctioning modules (9/208) Bad φ Bad z Layer 1 perfect Problems are from shorts on hybrids elec. probems on wafers slipped out cables

21 Radiation Monitored by 12 diodes at ~ radius of layer 1 Diodes can abort beam Operation tricky due to heavy radiation damage SVTRAD System

22 Measured absorbed Dose

23 Projected absorbed dose, midplane Based on PEP II current profile and measured dose/current Includes injection, etc A bit conservative. Off-midplane ~ x5 lower

24 Consequences of high doses Bulk damage to Si increase I LEAK increase in noise not a real problem until very high doses type inversion Damage to chips originally tested (fully) only to 2 MRad test to higher doses

25 Bulk Damage ~ Damage effectiveness from Moll NIEL scaling: high energy electron cause significant damage (~1/10 of hadrons) Not appreciated by us until recently

26 Tests at Elettra (Trieste) C -2 vs V curve show inversion Results in ~ agreement with NIEL scaling hypothesis Leakage current increase of order 2 µa/cm 2 agrees with in-situ measurement

27 Detector Radiation Tests (Cont.) Electrical properties after inversion: Strip isolation OK Edge currents, no sudden increase, manageable Still to do: test of charge-collection efficiency According to literature, should be OK sensors OK to at least 5-6 MRad

28 AtoM tests beyond 2MRad Noise = α + β C Load Significant increase in noise but chip functions to at least 5 MRad

29 SVT Module Replacement Summer 04 shutdown: replace L1/2 midplane modules worst case dose by then ~ 3.5 MRad other malfunctioning modules New modules identical to existing ones New modules under construction now

30 Conclusion The BaBar SVT is working well efficient resolution according to spec standalone tracking Replace radiation damaged modules in 04 Extend lifetime to ~ 07 After that? depends on many things (machine, physics etc.)

BaBar SVT: Radiation Damage and Other Operational Issues

BaBar SVT: Radiation Damage and Other Operational Issues SLAC 1 Outline 2 Intro to BaBar and SVT Radiation Environment Damage to Si Detectors Damage to Front End Electronics Performance Degradation Other