The Wide Field Imager

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1 Athena Kickoff Meeting Garching, 29.January 2014 The Wide Field Imager Norbert Meidinger, Athena WFI project leader

2 WFI Flight Hardware Architecture (1 st Draft)

3 DEPFET APS Concept Active pixel sensor Depleted P-channel Field Effect Transistor p-fet on depleted n-bulk signal charge collected in potential minimum below FET channel transistor current modulation 300 pa/el. combined function of sensor & amplifier low capacitance (20 ff) and noise excellent spectroscopic performance charge storage capability readout on demand complete clearing of signal charge no reset noise back-illuminated, fully depleted quantum efficiency

4 readout sequence 1st measurement: signal + baseline clear: removal of signal charges 2nd measurement: baseline difference = signal Integration time matrix organisation common bulk & back contact thin homogeneous entrance window row connection of ext. gate + reset column connection of r/o nodes (drain) windowing option operation philosophy one active row all operations in parallel fast processing all other rows turned off minimum power consumption signal charge integration

5 DEPFET Heritage MPE + PNSensor + MPG HLL: - Simbol-X / XEUS / IXO / Athena prototypes - MIXS on ESA s BepiColombo: 55 Fe T=-60 C

6 Athena DEPFETs Further development for high frame rates: Problem: photon hits during signal sampling E meas (<E X ) Step 1: gateable DEPFET Electronic shutter built-in in each pixel suppresses signals during sampling period Status: shielding 10 4 (sim.: 10 6 ) 10 x less background Bähr A. Bähr

7 Focal Plane Sensors WFI: Wide field survey power + high count-rate/timing capability FoV = 40 arcmin (opt. 50 arcmin) central + 4 surrounding DEPFET APS Central chip: 256 x 256 pixels; = 7.7 arcmin Pixel: 100 x 100 µm 2 ( = 1.8 arcsec) on-axis PSF = 5 arcsec oversampling: x 2.8 Surrounding chips: 448 x 640 pixels (option: 576 x 768 pixels) Pixel: 130 x 130 µm 2 58 x 83 mm 2 75 x 100 mm 2

8 Frontend Electronics Analog frontend ASIC: 64-ch. VERITAS 2 (prototype under test) sensing the current through each column Row-wise readout: 2.5 µs Output (64-ch.) serialized to 1 fully diff. output buffer Control frontend ASIC: Switcher (used for MIXS/BepiCol) voltages to gate and reset transistor for each row provided by Heidelberg University Switcher ASIC 256 x 256 Architecture Sensor + FEE window-mode address sub-area of DEPFET matrix Readout ASIC

9 Focal Plane Design Central chip: 2 hemispheres Central chip: 8 / 16 VERITAS Switcher Surrounding chips: 28 / 36 VERITAS2 120 / 144 Switcher-ASICs Est.power dissipation: Central det.: 9 / 13 W Outer det.: 62 W / 80 W 18.4 cm ( 50`) 15.1 cm ( 40`)

10 Filter Wheel Positions: open, filter, on-board cal-source, closed Mosaic of 5 large, thin, freestanding filters: optical / UV light blocking filter protector acoustic noise (rocket launch!) (L1 Athena design)

11 Concept for Signal Chain (Detector + Electronics System) x 5 X-ray photon focused on DEPFET APS Signal electrons collected in Pixel First amplification on-chip Signal amplification + shaping in VERITAS2 Analog voltage signal fed into ADC cluster Frame pre-processing (FPGA): Offset subtract., common mode correction, lower + upper threshold Frame builder: event pattern recognition, data compression Events buffered in mass memory and transmitted to ground station

12 Instrument performance: Effective area On-axis response of mirrors + WFI (incl. FoV-averaged vignetting) > 1 m 1 kev detector mirror Christian Schmid

13 Instrument performance: Quantum Efficiency High Quantum Efficiency in [0.3 kev; 15 kev] bulk (450 µm) fully depleted "thin" photon entrance window: 70 nm SiO 2 /Si 3 N 4 + Al light block. filter (e.g. 70 nm) External filter (e.g. 40 nm Al on 320 nm PP): Stronger suppression of optical + UV light Contamination protection

14 Instrument performance: Spectral resolution DEPFET : Excellent spectral resolution (but: small array, slow readout, integration time >> readout time, ) MIXS DEPFET calibration 55 Fe

15 Instrument performance: Background Sensitivity of WFI (faint sources!) depends on background photon + particle flux: a) diffuse cosmic X-ray background flux defined by effective area of mirror system b) interaction of particles with instrument suppression of fluorescence photons with graded-z shield (layer stack of material high low Z) continuum background (e.g. electrons, Bremsstrahlung) A. Rau Predicted photon background (green) - cosmic X-ray background (black) - particle interactions (red) 1.4 x 10-4 cnt/kev/s/arcmin 2 at 1 kev

16 Instrument performance: Readout Speed - Time resolution Concept for central DEPFET: 2 hemispheres Readout: 4 x 64-ch. VERITAS2 / hemisph. Readout time: 2.5 µs / row Goal (tbv): readout of 2 rows simult. (8 VERITAS2 / hemisph.) 410 MPix/s Fullframe: 320 µs [3.1 kf/s] or goal 160 µs [6.3 kf/s] Window mode: 16 rows ( 6 x 5``-PSF) readout time: 20 µs or goal: 10 µs [100 kf/s] Example: PSF = 5 arcsec; source with 0.5 (1.0) Crab throughput: 88% (79%) and pile-up 3% (6%) Time resolution of outer detectors: 40`: 1.5 ms (= 667 f/s) 717 Mpix/s

17 Instrument performance: HTR capability Simulated detector efficiency (2 hem.; 2-row-r/o; 2.5µs) Valid pattern vs. photon rate / Crab for fullframe and window mode (256 x 256, 256 x 16 pixels) on-axis PSF of 3, 5 Pile-up fraction of valid pattern C.Schmid

18 Work Breakdown Structure Top Level WFI (ATHENA Payload) MPE Project Office WFI Science Project Management Systems Engineering Scientific Requirements Astro-Physical Simulations Project Controlling & Contracts Management Product Assurance Data Analysis & Evaluation Scientific Operations Support

19 WBS Flight System Camera Head Detector Electronics (5x tbd) Instrument Control Unit (nom & red tbd) Soft- & Firmware Filter Wheel Mechanical & Thermal Structure DePFET Detectors ADCs Central Processor Module Instrument Control Software Straylight Baffle Mechanical & Thermal I/F AFE - VERITAS ADC Cluster FPGA (pre-processor) Controller Module FW, HK, ThermC., Onboard Data Processing & Reduction Filter Instrument Structure (incl. baseplate) CFE - Switcher Sequencer TM/TC Interface Calibration Source Thermal Sytem & Control Detector Board with Proximity Electronics Power Conditioning Scientific Data HS Interface (uni direction) Actuator Mechanism Graded Z-Shield Frame Builder Module ICU Chassis FW Mechanics & Housing Proton Shield Harness & Flex Connectors CH Chassis DE Chassis Flight System

20 WBS Ground Support / Integration & Operation

21 Energy Range Field of View kev 40` (baseline) 50` (opt.) Central DEPFET Sensor Format: 256 x 256 Pixel 26 x 26 mm 2 Pixel size: 100 x 100 µm 2 (1.8") PSF (on-axis): 5" (3") oversampling by 2.8 (1.7) Outer DEPFET Sensors 448 x 640 Pixel (baseline) 58 x 83 mm x 768 Pixel (opt) 75 x 100 mm 2 Pixel size: 130 x 130 µm 2 (2.3") Quantum efficiency (depend. optical blocking filter) Energy resolution Time resolution central sensor Window mode (16 rows) Time resolution outer sensor 277 ev: 24% 1 kev: 87% 10 kev: 96% FWHM@6keV < 150 ev 320 µs goal (tbv): 160 µs (=6.3kf/s) 20 µs goal: 10 µs ( frames/s) 1.5 ms (40` FoV) 1.9 ms (50` FoV) Count rate capability 0.5 Crab: 88% throughput; 3% pile-up 1 Crab: 79% throughput; 6% pile-up Pixel rate: WFI Summary 1.1 GPix/s

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