DIGITAL ELECTRONICS INTRODUCTION. August 2012

Transcription

1 AM DIGITAL ELECTRONICS INTRODUCTION August 2012 DISTRIBUTION RESTRICTION: Approved for public release. Distribution is unlimited. DEPARTMENT OF THE ARMY MILITARY AUXILIARY RADIO SYSTEM FORT HUACHUCA ARIZONA

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3 CHANGE PAGE LIST OF EFFECTIVE PAGES INSERT LATEST CHANGED PAGES. DISTROY SUPERSEDED PAGES NOTE The portion of this text affected by the changes is indicated by a vertical line in the outer margins of the page. Changes to illustrations are indicated by shaded or screened areas or by miniature pointing hands. Changes of issue for original and changed pages are: ORIGIONAL..0. Page NO. Change No. Title Page NO. Change No. Page No. Change No. *Zero in this column indicates an original page A Change 0 US Army 2. RETAIN THIS NOTICE AND INSERT BEFORE TABLE OF CONTENTS. 3. Holders of this document will verify that page changes and additions indicated above have been entered. This notice page will be retained as a check sheet. This issuance, together with appended pages, is a separate publication. Each notice is to be retained by the stocking points until the standard is completely revised of canceled Ver. 0 a

4 CONTENTS 1 INTRODUCTION TO DIGITAL LOGIC INTEGRATED CIRCUITS: BIPOLAR AND MOS TRANSISTORS: LOGIC FAMILY: Logic Family Interfacing: Commercial Logic Families: Integrated Injection Logic (PL) COMPUTER AND LOGIC SUBSYSTEMS DIGITAL CIRCUITS NUMBERING SYSTEMS: Binary Numbering System (2 bits): Octal Number system (Base 8): Hexadecimal (Base 16): UNIT AND NUMBER BASE (RADIX) POSITIONAL NOTATION ARITHMETIC IN BINARY AND HEXIMITAL: BOOLEAN ALGEBRA INTRODUCTION: BOOLEAN OPERATORS AND SYMBOLS: Truth Tables: AND Operation: The OR Operation: NOT Operation TIMING DIAGRAMS: LOGIC SIGNAL VOLTAGE LEVELS TTL GATE VOLTAGES: CMOS GATE VOLTAGES: WORST CASE: SCHMITT TRIGGER: MIXED DIGITAL TYPE CIRCUITS: Ver. 0 i

5 PREFACE Improvements Suggested corrections, or changes to this document, should be submitted through your State Director to the Regional Director. Any Changes will be made by the National documentation team. Distribution Distribution is unlimited. Versions The Versions are designated in the footer of each page if no version number is designated the version is considered to be 1.0 or the original issue. Documents may have pages with different versions designated; if so verify the versions on the Change Page at the beginning of each document. REFERENCES Allied Communications Publications (ACP): 1. ACP Communications Instruction, General 2. ACP Radiotelegraph Procedures 3. ACP Radiotelephone Procedures 4. ACP Communications Instructions Radio Teletypewriter 5. ACP Communications Instructions Operating Signals DOD Instructions 1. DOD Instruction US Army Documents US Army Regulations 1. AR Military Auxiliary Radio System (MARS) and Amateur Radio Program US Army FM/TM Manuals 1. FM Tactical Radio Operations 2. TM Electrical Design, Lightning and Static Electricity Protection US Army MARS 1. AM US Army MARS Net Plan Commercial References 1. Basic Electronics, Components, Devices and Circuits; ISBN X, By William P Hand and Gerald Williams Contributors This document has been produced by the Army MARS Technical Writing Team under the authority of Army MARS HQ, Ft Huachuca, AZ. The following individuals are subject matter experts who made significant contributions to this document. William P Hand Ver. 0 iii

6 ACRONYMS AND ABBREVIATIONS: AM Digital Electronics - Introduction Abbreviations CMOS DTL ECL FET HEX LSD LSI MOS MOSFET MSD MSI NAND NOR NRZ RAM RTL SSI TTL Definition Complementary Metal Oxide Semiconductor Diode Transistor Logic Emitter coupled logic Field Effect Transistor Hexadecimal Base 16 Number system Least Significant Digit Large Scale Integration Metal Oxide Semiconductor Medal Oxide Semiconductor Field Effect Transistor Most Significant Digit Medium Scale Integration Negative AND Inverted AND Circuit Negative OR Inverted OR Circuit Non-Return to Zero Random Access Memory Resistor Transistor Logic Small Scale Integration Transistor-Transistor Logic Ver. 1.0 iii

7 1 INTRODUCTION TO DIGITAL LOGIC Digital logic is a complex system of simple gates (electronic on-off switches) intended to control some device. It makes decisions on the basis of tests and routes electrons according to predetermined rules. Digital logic is a true-false, go-no-go system. Complex decisions can be made by combining a large enough number of gates. Logic operations fall into three categories: control, memory, and computation. A computer does computations but it also has control logic to route data from memory to arithmetic unit, from memory to the outside world, and so on. Logic systems designed for control purposes may also have some computing logic and memory hardware. For example, a traffic light controller might count the cars in several directions and make calculations to determine when to change the lights. Memory could also be included to remember that traffic is unusually light on Sunday mornings and heavy on certain holidays. Figure 1-1 illustrates how gates can be used for controlling various actions. Figure 1-1 Logic Gate Example Ver

8 1.1 INTEGRATED CIRCUITS: AM Digital Electronics - Introduction An integrated circuit is a lot of gates made in microscopic proportions on the W' square (more or less) wafer (chip) of silicon. The individual gates are connected by microscopic printed wiring into circuits to do specific jobs, such as counting, or decoding digital information. Photographic masks and high temperature automated chemical techniques permit almost molecule by molecule formation of the circuitry. Integrated circuits are classified according to the number of gates on the chip, without regard to specific function (that is, whether control, memory, or computation). 1. SSI Small Scale Integration (SSI) is an integrated circuit package with 12 or fewer logic gates on the chip. 2. MSI Medium Scale Integration (MSI) is an integrated circuit package with between 12 and 100 logic gates on the chip. 3. LSI Large Scale Integration (LSI) is an integrated circuit package with over 100 gates on the chip. Up to 10,000 gates on a chip is currently possible, with up to one-half million on a chip in experimental stages. 1.2 BIPOLAR AND MOS TRANSISTORS: Digital integrated circuits are made of either bipolar (junction) or metal oxide semiconductor (MOS) transistors. The MOS transistor is simpler, much smaller, and consumes very little power compared to a conventional bipolar transistor. However, it is very slow. It is used where 100 to 10,000 (or sometimes more) gates on a chip are required. The bipolar transistor works at a much higher speed than the MOS, but it takes much more space on a chip and consumes a great deal more power. Because of its size and power requirements, it is used only in SSl and MSI packages (up to 100 gates). 1.3 LOGIC FAMILY: A logic family is a group of compatible functional integrated circuit packages. Like Tinker-toys or Leggo, they can be assembled into a variety of forms-no sanding or fitting is required-they just snap together. Each family is based on a specific type of transistor LOGIC FAMILY INTERFACING: When subsystems based on two different logic families must work together in a system, a little extra hardware is required. The special components are called interface components. The most popular logic families are fairly compatible, but there are some minor technical difficulties COMMERCIAL LOGIC FAMILIES: Transistor-Transistor-Logic (TTL): The transistor-transistor-logic (TTL) family is the most popular small scale integration commercial logic family. It is based on bipolar transistors, and it is last, but power hungry Metal Oxide Semiconductor (MOS): The metal oxide semiconductor (MOS) family has two types, called the "P" type (P-MOS) and the "N" type (N-MOS), depending on whether the P-MOS transistor or the N - M OS transistor is the basis of the family. Both types are used when 100 or more gates on a chip are required. They are slower than TTL, but easy on power. The complementary metal oxide semiconductor (C-MOS) family utilizes a double-barreled MOS transistor. Ver

9 1.3.3 INTEGRATED INJECTION LOGIC (PL) A most exciting, fairly new logic family, it is as fast as the TTL and as miserly with power as the MOS. Its small size and simple construction make it suitable for large scale integration (LSI). 12L is based on a radical, upside-down bipolar transistor design. The emitter coupled logic (ECL)family is a complex, expensive gate circuit. 1.4 COMPUTER AND LOGIC SUBSYSTEMS Figure 1-2 is a flow diagram of the hierarchy of digital systems. Note that the logic flow eventually branches and there are two possible end results: (1) Microcomputers (2) Mini and large computers So far LSI has been used less in larger computers because of its slower speed. Integrated injection logic promises to make LSI minicomputers possible. There is also a trend to combine several minis to make up very large computing systems. The flow diagram (reference Figure 1-2) soon branches into two gate assignment categories: (1) memory (using flip-flops, described below), and (2) combinational logic 1.5 DIGITAL CIRCUITS Digital circuits, or Logic circuits as they are called at times, have to deal with two states or conditions, but there are many different digital states that can be used. The most common three are: 1. Positive Logic - A zero voltage and a Positive voltage for the two states 2. Negative Logic - A zero voltage and a negative voltage for the two states 3. Non-return to Zero - Plus voltage for one and a negative for the other state In order to understand how information can be conveyed in just two signal states, we must understand the basics of different mathematical systems and basics Boolean algebra. We are familiar with the base 10 system we use every day but there are many different types of numbering systems. We humans use a decimal, or base-10, numbering system, probably because people have 10 fingers. If we had three fingers and a thumb on each hand, then in all probability we would be using the octal numbering system, which has a base of 8. Early computers were designed around the decimal numbering system. This approach made computer logic capabilities unnecessarily complex and did not make efficient use of resources. (For example, 10 vacuum tubes were needed to represent one decimal digit.) In 1945, as computer pioneers were struggling to improve this cumbersome approach, John von Neumann suggested that the numbering system used by computers should take advantage of the physical characteristics of electronic circuitry. To deal with the basic electronic states of on and off, von Neumann suggested using the binary numbering system. His insight has vastly simplified the way computers handle data. Ver

10 Early computers were designed around the decimal numbering system. This approach made the creation of computer logic capabilities unnecessarily complex and did not make efficient use of resources. (For example, 10 vacuum tubes were needed to represent one decimal digit.) In 1945, as computer pioneers were struggling to improve this cumbersome approach, John von Neumann suggested that the numbering system used by computers should take advantage of the physical characteristics of electronic circuitry. To deal with the basic electronic states of on and off, von Neumann suggested using the binary numbering system. His insight has vastly simplified the way computers handle data. Ver

11 Computers operate in binary and communicate to us in decimal. A special program translates decimal into binary on input, and binary into decimal on output. Under normal circumstances, a programmer would see only decimal input and output. On occasion, though, he or she must deal with long and confusing strings of 1s and 0s that represent the content of RAM, the computers memory. Occasionally a programmer or computer engineer takes a snapshot of the contents of RAM (on-bits and off-bits) at a given moment in time. To reduce at least part of the confusion of seeing only 1s and 0s on the output, the hexadecimal (base-16) numbering system is used as shorthand to display the binary contents of both RAM and secondary storage, such as disk. The decimal equivalents for binary, decimal, and hexadecimal numbers are shown in Figure 1-1. We know that in decimal, any number greater than 9 is represented by a sequence of digits. When you count in decimal, you "carry" to the next position in groups of 10. As you examine Figure 1, notice that you carry in groups of 2 in binary and in groups of 16 in hexadecimal. Also note that any combination of four binary digits can be represented by one "hex" digit. Table 1-1 Number Systems Decimal Binary Octal Hex Zero One Two Three Four Five Six Seven Eight Nine Ten A Eleven B Twelve C Thirteen D Fourteen E Fifteen F Sixteen Seventeen Eighteen Nineteen Twenty Ver

12 The hexadecimal numbering system is used only for the convenience of the programmer, computer scientist, or computer engineer when reading and reviewing the binary display of memory. Computers do not operate, or process in hex. During the 1960s and early 1970s, programmers often had to examine the contents of RAM to debug their programs (that is, to eliminate program errors). Today's programming languages have user friendly diagnostics (error messages) and computerassisted tools that help programmers during program development. These diagnostics and development aids have minimized the need for applications programmers to convert binary and hexadecimal numbers into their more familiar decimal equivalents. However, if you become familiar with these numbering systems, you should achieve a better overall understanding of computers. And, someday you may need to read hex to decode an error message or set the jumpers on an expansion card. Ver

13 1.6 NUMBERING SYSTEMS: BINARY NUMBERING SYSTEM (2 BITS): The binary system has only two digits or bits. Each bit is either a one or a zero. The binary, or base-2, numbering system is based on the same principles as decimal, or base-10, numbering system, with which we are already familiar. The only difference between the two numbering systems is that binary uses only two digits, 0 and 1, and the decimal numbering system uses 10 digits, 0 through 9. The equivalents for binary, decimal, and hexadecimal numbers are shown in Figure 1-1. The value of a given digit is determined by its relative position in a sequence of digits. Consider the example in Figure 2. If we want to write the number 124 in decimal, the interpretation is almost automatic because of our familiarity with the decimal numbering system. To illustrate the underlying concepts, let's give Ralph, a little green two-fingered Martian, a bag of 124 (decimal) marbles and ask him to express the number of marbles in decimal. Ralph, who is more familiar with binary, would go through the following thought process (see Figure 2). Figure 1-1 Binary Numbering System Ver

14 1.6.2 OCTAL NUMBER SYSTEM (BASE 8): The octal, or base 8, number system is a common system used with computers. Because of its relationship with the binary system, it is useful in programming some types of computers. Look closely at the comparison of binary and octal number systems in Table 1-3. You can see that one octal digit is the equivalent value of three binary digits. The following examples of the conversion of octal 2258 to binary and back again further illustrate this comparison: Table Binary and Octal Comparison Ver

15 1.6.3 HEXADECIMAL (BASE 16): The biggest drawback to using a binary numbering system for computer operations is that programmers may have to deal with long and confusing strings of 1s and 0s. To reduce confusion, hexadecimal, or base-16, numbering system is used as shorthand to display binary contents of primary and secondary storage. Binary and hexadecimal numbering systems are multiples of 2: 2 and 24, respectively. Because of this, there is a convenient relationship between these systems. The numbering-system equivalence table shown in Figure 1 illustrates that a single hexadecimal digit represents four binary digits (01112 = 716, = D16, = A16 where subscripts are used to indicate the base of the numbering system). In hexadecimal, or "hex," letters are used to represent six higher order digits. Two hexadecimal digits can be used to represent eight-bit byte of an EBCDIC equals sign (=) ( are the same as 7E16). Figure 1-2 illustrates how a string of EBCDIC bits can be reduced to a more recognizable form using hexadecimal. Figure 1-2 Number System Expressed in Different Ways The word System is shown as it would appear in input/output, internal binary notation, and hexadecimal notation. We can convert one number in a numbering system to an equivalent number in another numbering system. For example, there are occasions when we might wish to convert a hexadecimal number into its binary equivalent. We shall also learn the fundamentals of numbering-system arithmetic. Figure 1-3 Converting Numbering Systems Ver

16 1.7 UNIT AND NUMBER AM Digital Electronics - Introduction The terms that you learned in the decimal and binary sections are also used with the octal system. The unit remains a single object, and the number is still a symbol used to represent one or more units. 1.8 BASE (RADIX) As with the other systems, the radix, or base, is the number of symbols used in the system. The octal system uses eight symbols - 0 through 7. The base, or radix, is indicated by the subscript POSITIONAL NOTATION The octal number system is a positional notation number system. Just as the decimal system uses powers of 10 and the binary system uses powers of 2, the octal system uses power of 8 to determine the value of a number's position. The following bar graph shows the positions and the power of the base: Remember, that the power, or exponent, indicates the number of times the base is multiplied by itself. The value of this multiplication is expressed in base 10 as shown below: All numbers to the left of the radix point are whole numbers, and those to the right are fractional numbers. MSD and LSD when determining the most and least significant digits in an octal number, use the same rules that you used with the other number systems. The digit farthest to the left of the radix point is the MSD, and the one farthest right of the radix point is the LSD. Ver

17 1.10 ARITHMETIC IN BINARY AND HEXIMITAL: The essentials of decimal arithmetic operations have been drilled into us so that we do addition and subtraction almost by instinct. We do binary arithmetic, as well as that of other numbering systems, in the same way that we do decimal arithmetic. The only difference is that we have fewer (binary) or more (hexadecimal) digits to use. Figure 1-4 illustrates and compares addition and subtraction in decimal with that in binary and hex. Notice in Figure 1-4 that you carry to and borrow from adjacent positions, just as you do in decimal arithmetic. FIGURE 1-4 Binary, Decimal, and Hexadecimal Arithmetic Comparison As you can see, the only difference in doing arithmetic in various numbering systems is the number of digits used. Ver

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19 2 BOOLEAN ALGEBRA 2.1 INTRODUCTION: Boolean algebra, a form of mathematics used for exercises in formal logic, was invented by George Boole, an English mathematician, in For 100 years Boole's logical algebra (symbolic logic) remained a curiosity, suitable only for philosophical debate. Then in the' mid-1950s Claude Shannon of the Bell Telephone Company discovered that Boole's logic was just the tool he needed to solve the complex switching problems involved in providing telephone service. Computer designers quickly realized the potential benefits of applying Shannon's Boolean symbolic logic. Boolean algebra is far simpler than ordinary algebra. In Boolean there are no roots or powers, for instance. It is a binary system; a variable or constant in Boolean can have only one of two possible values, 0 or 1. A gate (electronic on-off switch) in a computer (or other digital) circuit can be in only one of the two possible conditions, on or off 2.2 BOOLEAN OPERATORS AND SYMBOLS: The operators in ordinary algebra are add (+), subtract (-), multiply (X), divide (+), roots (";-), and powers (X n ). Boolean algebra, however, contains only the operators AND (Boolean multiplication), OR (Boolean sum), and NOT (complement or inversion). The AND operation is indicated by a dot ( ) or by writing the letters together as for multiplication in ordinary algebra. The OR operation is indicated by a plus sign (+). The NOT operation is indicated by a bar (-) over a letter that represents a variable. It is important to remember that the symbols (+) and (.) do not mean the same thing in Boolean as in ordinary algebra. Electronic gates are super-speed versions of ordinary mechanical switches. Modern gates can switch from off to on, or from on to off, in 10 nanoseconds or less TRUTH TABLES: Tables that show the results of all possible combinations of true and false conditions in logical statements are called truth tables. Boolean expressions are either true or false; that is, they are binary (two-state) in nature. Digits 1 and 0 are used to represent true and false conditions; 1 symbolizes a true condition and 0 symbolizes a false condition. Symbols 0 and 1 are used in general logic equations to represent false and true, respectively. When we are discussing hardware other symbols are often used as follows: True = 1 High = H +5 Volts False = 0 Low = L 0 Volts Ver

20 2.2.2 AND OPERATION: The AND operation is represented by the Boolean expression A.B = f. The f symbol stands for "function" and is used to indicate that we are dealing with a formal logic equation. All possible combinations for the AND operation with two variables are listed in Figure 2-1. As the table shows, when both A and B are false, f is false; when A is true and B is false, f is false; when A is false and B is true, f is false; and when both A and B are true, f is true. When there are two possible conditions for each variable in the truth table, the number of possible combinations is equal to 2n, where n is the number of independent variables in the logical expression. When there are two independent variables, the number of combinations is 22, or 4. When there are three independent variables, the number of combinations is i, or 8. All possible combinations for the three-variable AND expression, f = A B'C, are listed in the truth table in part F of Figure 2-1 Figure 2-1 The AND Gate with Truth Tables Ver

21 In the common TTL logic family, zeros and 1s are represented by voltages: 5 Volts = Logical 1 0 Volts =- Logical 0 A 1 (+5 volts) is often called high, and 0 volts low. Truth tables are often written in the form shown in the truth table on the right in part (f) of Figure THE OR OPERATION: The 0 R operation is represented by the Boolean expression f = A + B. All possible combinations for the OR operation with two variables are listed in the truth table in Figure 2-2. As the tables show, when both A and B are false, f is false; when A is true and B is false, f is true; when A is false and B is true, f is true; and when both A and Bar] true, f is true. Figure 2-2 OR Function with Truth Table Ver

22 2.2.4 NOT OPERATION The inverter is an inverting pulse amplifier that performs the NOT operation, often called the complement operation. If a I goes in, a 0 comes out; if a O goes in, a 1 comes out. An A in produces an Ā (NOT A) out. Figure 2-3 illustrates inverter operation. Summary of inverter functions 1. if A = 0 A = I 2. if A = I A = 0 3. if A = Hi A = Lo 4. if A= Lo A = Hi Figure 2-3 Inverter (NOT Function) with Truth Tables Ver

23 2.3 TIMING DIAGRAMS: Logic diagrams show how data flows in circuits. Truth tables tell us exactly what the circuit does. In addition because nearly all digital circuits are precisely timed by a clock generator, it is offer necessary to know exactly when the gate opens and closes. The timing diagram provides this information. Figure 2-4 show: timing diagrams for: two-input AND gate, two-input OR gate, and triinverter. Both AND gates and OR gates can have a number of inputs, but inverters have only one. Figure 2-4 Timing Diagrams Ver

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25 3 LOGIC SIGNAL VOLTAGE LEVELS Logic gate circuits are designed to input and output only two types of signals: "high" (1) and "low" (0), as represented by a variable voltage: full power supply voltage for a "high" state and zero voltage for a "low" state. In a perfect world, all logic circuit signals would exist at these extreme voltage limits, and never deviate from them (i.e., less than full voltage for a "high," or more than zero voltage for a "low"). However, in reality, logic signal voltage levels rarely attain these perfect limits due to stray voltage drops in the transistor circuitry, and so we must understand the signal level limitations of gate circuits as they try to interpret signal voltages lying somewhere between full supply voltage and zero. 3.1 TTL GATE VOLTAGES: TTL gates operate on a nominal power supply voltage of 5 volts, +/ volts. Ideally, a TTL "high" signal would be 5.00 volts exactly, (reference Figure 3-1) and a TTL "low" signal 0.00 volts exactly. However, real TTL gate circuits cannot output such perfect voltage levels, and are designed to accept "high" and "low" signals deviating substantially from these ideal values. "Acceptable" input signal voltages range from 0 volts to 0.8 volts for a "low" logic state, and 2 volts to 5 volts for a "high" logic state. "Acceptable" output signal voltages (voltage levels guaranteed by the gate manufacturer over a specified range of load conditions) range from 0 volts to 0.5 volts for a "low" logic state, and 2.7 volts to 5 volts for a "high" logic state: Figure 3-1 TTL Signal Levels If a voltage signal ranging between 0.8 volts and 2 volts were to be sent into the input of a standard TTL gate, there would be no certain response from the gate. Such a signal would be considered uncertain, and no logic gate manufacturer would guarantee how their gate circuit would interpret such a signal. As you can see, the tolerable ranges for output signal levels are narrower than for input signal levels, to ensure that any TTL gate outputting a digital signal into the input of another TTL gate will transmit voltages acceptable to the receiving gate. The difference between the tolerable output and input ranges is called the noise margin of the gate. For TTL gates, the low-level noise margin is the difference between 0.8 volts and 0.5 volts (0.3 volts), while the high-level noise margin is the difference between 2.7 volts and 2 volts (0.7 volts) (reference Figure 3-2). Simply put, the noise Ver

26 margin is the peak amount of spurious or "noise" voltage that may be superimposed on a weak gate output voltage signal before the receiving gate might interpret it wrongly: Figure 3-2 TTL High Noise 3.2 CMOS GATE VOLTAGES: CMOS gate circuits have input and output signal specifications that are quite different from TTL. For a CMOS gate operating at a power supply voltage of 5 volts, the acceptable input signal voltages range from 0 volts to 1.5 volts for a "low" logic state, and 3.5 volts to 5 volts for a "high" logic state. "Acceptable" output signal voltages (voltage levels guaranteed by the gate manufacturer over a specified range of load conditions) range from 0 volts to 0.05 volts for a "low" logic state, and 4.95 volts to 5 volts for a "high" logic state: Figure 3-3 CMOS 5V Input Signal Levels It should be obvious from these figures that CMOS gate circuits have far greater noise margins than TTL: 1.45 volts for CMOS low-level and high-level margins, versus a maximum of 0.7 volts for TTL. In other words, CMOS circuits can tolerate over twice the amount of superimposed "noise" voltage on their input lines before signal interpretation errors will result. Ver

27 CMOS noise margins widen even further with higher operating voltages. Unlike TTL, which is restricted to a power supply voltage of 5 volts, CMOS may be powered by voltages as high as 15 volts (some CMOS circuits as high as 18 volts) (Reference Figure 3-4). Shown here are acceptable "high" and "low" states, for both input and output, of CMOS integrated circuits operating at 10 volts and 15 volts, respectively. Figure 3-4 Higher Voltage CMOS Inputs Ver

28 3.3 WORST CASE: Margins for acceptable "high" and "low" signals may be greater than what is shown in previous illustrations. What is shown represents "worst-case" input signal performance, based on manufacturer's specifications. In practice, it may be found that a gate circuit tolerates "high" signals of considerably less voltage and "low" signals of considerably greater voltage than those specified. Conversely, extremely small output margins -- guaranteeing output states for "high" and "low" signals to within 0.05 volts of power supply "rails" -- are optimistic. Such "solid" output voltage levels are true only for conditions of minimum loading (reference Figure 3-5). If the gate is sourcing or sinking substantial current to a load, the output voltage will not be able to maintain these optimum levels, due to internal channel resistance of the gate's final output for MOSFETs. Within the "uncertain" range for any gate input, there will be some point of demarcation dividing the gate's actual "low" input signal range from its actual "high" input signal range. That is, somewhere between the lowest "high" signal voltage level and the highest "low" signal voltage level guaranteed by the gate manufacturer, there is a threshold voltage at which the gate will actually switch its interpretation of a signal from "low" or "high" or vice versa. For most gate circuits, this unspecified voltage is a single point: Figure 3-5 Typical Response to a Variable Input Signal In the presence of AC "noise" voltage superimposed on the DC input signal, a single threshold point where the gate alters its interpretation of logic level results in an erratic output: Figure 3-6 Slowly Changing AC Signal Input Ver

29 If the AC input signal varies as shown in Figure 3-7, there is a similar problem like (analog) voltage comparator op-amp circuits. With a single threshold where an input causes the output to switch between "high" and "low" states, presence of significant noise cause erratic changes in output: 3.4 SCHMITT TRIGGER: Figure 3-7 Data Signal input with AC Noise Some positive feedback provides a solution to this problem. With an op-amp, this is done by connecting the output back around to the noninverting (+) input through a resistor. In a gate circuit, this entails redesigning the internal gate circuitry, establishing feedback inside the gate package rather than through external connections. A gate so designed is called a Schmitt trigger. Schmitt triggers interpret varying input voltages according to two threshold voltages: a positive-going threshold (VT+), and a negative-going threshold (VT-)(reference Figure 3-8): Figure 3-8 Schmitt Trigger Response to a Noisy Input Signal Schmitt trigger gates are distinguished in schematic diagrams by the small "hysteresis" symbol drawn within them, reminiscent of the B-H curve for a ferromagnetic material. Hysteresis engendered by positive feedback within the gate circuitry adds an additional level of noise immunity to the gate's performance. Schmitt trigger gates are frequently used in applications Ver

30 where noise is expected on the input signal line(s), and/or where an erratic output would be very detrimental to system performance. 3.5 MIXED DIGITAL TYPE CIRCUITS: The voltage level requirements of TTL and CMOS technology can present interface problems in design when the both types of gates are used in the same circuit design. Although operating CMOS gates on the same 5.00 volt power supply voltage required by the TTL gates is no problem, TTL output voltage levels will not be compatible with CMOS input voltage requirements. For Example reference Figure 3-9 where a TTL NAND gate outputting a signal into a CMOS inverter gate. Both gates are powered by the same 5.00 volt supply (V cc ). If the TTL gate outputs a "low" signal (guaranteed to be between 0 volts and 0.5 volts), it is properly interpreted by the CMOS gate's input as a "low" (expecting a voltage between 0 volts and 1.5 volts): Figure 3-9 TTL Low Output is Within Limits However, when the TTL gate outputs a "high" signal (guaranteed to be between 5 volts and 2.7 volts), it might not be properly interpreted by the CMOS gate's input as a "high" (expecting a voltage between 5 volts and 3.5 volts): Ver

31 Figure 3-10 TTL High Output outside Limits Given this mismatch, it is entirely possible for a TTL gate to output a valid "high" signal (valid, that is, according to the standards for TTL) within the "uncertain" range for CMOS input, and may be (falsely) interpreted as a "low". An easy "fix" for this problem is to augment the TTL gate's "high" signal voltage level by means of a pullup resistor: Figure 3-11 TTL High Output outside Limits Ver

32 Something more than this is required to interface a TTL output with a CMOS input, if the receiving CMOS gate is powered by a greater power supply voltage: Figure 3-12 TTL Not Compatible with CMOS Directly There will be no problem with CMOS interpreting a TTL gate's "low" output, but a "high" signal from a TTL gate is another matter entirely. The guaranteed output voltage range of 2.7 volts to 5 volts from the TTL gate output is nowhere near CMOS gate's acceptable range of 7 volts to 10 volts for a "high" signal. If we use an open-collector TTL gate instead of a totem-pole output gate, though, a pullup resistor to the 10 volt V dd supply rail will raise the TTL gate's "high" output voltage to the full power supply voltage supplying the CMOS. Since an open-collector gate can only sink current, not source current, the "high" state voltage level is entirely determined by power supply to which the pullup resistor is attached, thus neatly solving the mismatch problem: Ver

33 Figure 3-13 TTL Driving CMOS CMOS gates have excellent output voltage characteristics, thus there is typically no problem connecting a CMOS output to a TTL input. The only significant issue is current loading presented by TTL inputs, since CMOS output must sink current for each TTL inputs while in the "low" state. When CMOS is powered by a voltage source in excess of 5 volts (V cc ), though, a problem will result. The "high" output state of the CMOS gate, being greater than 5 volts, will exceed the TTL gate's acceptable input limits for a "high" signal. A solution to this problem is to create an "open-collector" inverter circuit using a discrete NPN transistor, and use it to interface the two gates together: Figure 3-14 CMOS Driving a Transistor Ver

34 The "pullup" resistor is optional, since TTL inputs automatically assume a "high" state when left floating, which is what will happen when the CMOS gate output is "low" and the transistor cuts off. Of course, one very important consequence of implementing this solution is the logical inversion created by the transistor: when the CMOS gate outputs a "low" signal, the TTL gate sees a "high" input; and when the CMOS gate outputs a "high" signal, the transistor saturates and the TTL gate sees a "low" input. So long as this inversion is accounted for in the logical scheme, all will be well. Ver