DSP based Digital Control Design for DC-DC Switch Mode Power Converter. Shamim Choudhury Texas Instruments Inc.

Transcription

1 DSP based Digital Control Design for DC-DC Switch Mode Power Converter Shamim Choudhury Texas Instruments Inc. 1

2 Digital Control of DC/DC Converter DC/DC Buck Converter Iin Io Vo Vin L C RL Vin = 4V ~ 6V, Vo = 1.6V, Io = 16A L = 1uH, C = 1620uF, ESR = ohm PWM Freq = 250kHz, Digital Control Loop Sampling Freq, fs = 250kHz, Voltage Control Loop Bandwidth = 20kHz, Phase Margin = 45 deg Settling Time < 75uSec 2

3 Digital Control of DC/DC Converter N N+1 Sampling period (Ts) Sampling Scheme 1 PWM period n n+1 Sample to PWM Update Delay T d = 0.5T s (Computation Delay) PWM/ ADC ADC conv time Int Update PWM Int ISR Code execution Context save Execute Controller Context restore spare Back-ground t PWM/ADC N Sampling period (Ts) PWM period ADC conv time N+1 n n+1 Update PWM Update PWM Sampling Scheme 2 Sample to PWM Update Delay T d = 2.0T s (Computation Delay) Update PWM Int ISR Int Code execution Context save Execute Controller Context restore spare Back-ground t 3

4 Vin Iin Digital Control of DC/DC Converter Control Design by Emulation L C RL Vo Vos Kd Output Voltage Sensing Gain Vo(n) G P (s) = Vo d d PWM U(n) TMS320F2810 Gc(z) A/D Vo(n) E(n) Vref + Vo 2V 7FFFFFFF V o ( n) = V 7FFFFFFh => Kd=0.5 o K d V = V o omax ( n) K d max = K V d omax = K V d 1 omax, for V o ( n) 0 in Q

5 Digital Control of DC/DC Converter Control Design by Emulation Vin=5.0, RL=0.1, Kd=0.5, L=1uH, C=1620uF, Rc=0.004 ohm, Ignore Sample & Hold (S&H) Effect, PWM Modulator Gain Fm = 1, Continuous Plant Gp1(s) = Kd.Fm.Gp(s), 1.62x10-5 s Gp1(s) = x10-9 s x10-5 s + 1 Gc(s) =?, Gc(z) =? d Fm U(n) Vo Gp(s) Kd Vo(n) E(n) Gc(z) Vref + 5

6 Digital Control of DC/DC Converter Use Matlab SISOTOOL for the plant Gp1(s) and design the continuous controller Gc1(s) Continuous System Bode Plot (Matlab) s-plane root locus (Matlab) Settling Time(1%) < 45uS BW = 25kHz, PM = 71 deg 14.3 s^ s + 7.2e009 Gc1(s) = s^ s 6

7 Digital Control of DC/DC Converter Compute Equivalent Discrete Controller Gc(z) 1. Discrete Equivalents via Numerical Integration 1a. Forward rule, s= (z-1)/t s 2a. Backward rule, s = (z-1)/zt s 3a. Trapezoidal/Tustin/Bilinear, s = 2(z-1)/T s (z+1) 2. Pole-Zero Matching Equivalents, z = e sts 3. Hold Equivalents : zero-order-hold (ZOH), first-order-hold (FOH) In Matlab, Gc_z = c2d(gc_s, Ts, 'matched') z^ z Gc1(z) = z^ z In Matlab, Gc_z = c2d(gc_s, Ts, tustin') z^ z Gc1(z) = z^ z [pole-zero matched, T s = 4uSec] [Tustin, T s = 4uSec] 7

8 Discrete System Bode Plot, Pole-Zero Matched Controller, Gp1(z)*Gc1(z) Digital Control of DC/DC Converter Control Design by Emulation (Matlab) BW = 25.2kHz, PM = 53.1 deg, GM = 11.3dB Transient Response (Fpwm = 250KHz), Pole-Zero Matched Controller Gp1(z)*Gc1(z) Discrete System Bode Plot, Tustin Controller, Gp1(z)*Gc1(z) (Matlab) BW = 25.4kHz, PM = 53.6 deg, GM = 11.2dB 8

9 Digital Control of DC/DC Converter Direct Digital Control Iin Vo Vin L C RL Kd Vo G P (s) = d d D/A (ZOH) Hc U(n) Gc(z) T s Vo(n) E(n) + Comp Delay Model Hc = e -std, Td = Comp Time Delay TMS320F2810 Vref 9

10 Direct Digital Control of DC/DC Converter Effect of Sampling & Hold Time Delay Ts/2 PM = deg Ts ZOH = -ωts/2 = -180f/fs fs = 250kHz, f = 7.25kHz, additional phase lag of 5.2 PM = 28 deg f = 125kHz, additional phase lag of 90 10

11 Digital Control of DC/DC Converter Direct Digital Control Vin=5.0, RL=0.1, Kd=0.5 L=1uH, C=1620uF, Rc=0.004 ohm Gp(z) d ZOH Gp(s) Vo Kd 1.62x10-5 s Kd.Gp(s) = x10-9 s x10-5 s + 1 ZOH(s) = (1 e -sts )/s Hc = e -std Discrete Plant Model, Gp(z) = Z{ZOH(s).Kd.Gp(s).Hc} U(n) Gc(z) Vo(n) E(n) Vref Gp1(z) = (0.0494z )/(z z ), [Td=0, Hc = 1] Hc T s + 11

12 Direct Digital Control of DC/DC Converter Use Matlab SISOTOOL for Gp1(z), and design Gc2(z) Discrete System Bode Plot, 2 Pole 2 Zero Type Controller, Gp1(z)*Gc2(z) (Td=0) BW = 27.9kHz, PM = 61.6 deg, GM = 9dB Gp1(z)*Gc2(z) Settling Time(1%) < 56 usec z^ z Gc2(z) = z^ z

13 Direct Digital Control of DC/DC Converter Effect of Computation Delay Bode Plot (Matlab) Plant with computation delay [T d = 0.5T s ], Gp2(z) = (0.022z^ z )/z(z^ z ), Controller with no delay compensation, Gc2(z)=(14.87 z^ z )/(z^ z ) Gp2(z)*Gc2(z) Phase Lag, Hc = -ωt d = -360fT d Loss of PM from (Gp1*Gc2) to (Gp2*Gc2) = = 20.6 deg BW = 26.9kHz, PM = 41 deg, GM = 7.46dB Hc = 360(26900)(2uS) = deg 13

14 Direct Digital Control of DC/DC Converter Bode Plot (Measured) Gp2(z)*Gc2(z) BW = 22.45kHz, PM = 40 deg, GM = 10.7dB 14

15 Direct Digital Control of DC/DC Converter Transient Response (F pwm = 250KHz) Gp2(z)*Gc2(z) 15

16 Direct Digital Control of DC/DC Converter Effect of Computation Delay Bode Plot (Matlab) Plant with increased computation delay [T d = 2.0T s ], Gp3(z) = (0.022z^ z )/z^2(z^ z ), Controller with no delay compensation, Gc2(z)=(14.87 z^ z )/(z^ z ) 2 Pole 2 Zero Type Controller Gp3(z)*Gc2(z) Phase Lag, Hc = -ωtd = -360fTd BW = 27.9kHz, PM = deg, GM = -2.22dB, Unstable Loop. Loss of PM from (Gp1*Gc2) to Gp3*Gc2 = 61.6 (-19) = 80.6 deg Hc = 360(27900)2(4uS) = deg 16

17 Direct Digital Control of DC/DC Converter Transient Response (Fpwm = 250KHz) Unstable System, Uncompensated for Computation Delay Gp3(z)*Gc2(z) 17

18 Direct Digital Control of DC/DC Converter Redesigned Controller with Delay Compensation Bode plot (Matlab) 3 Pole 3 Zero Type Controller Gp3(z)*Gc3(z) BW = 16.1kHz, PM = 46.4 deg, GM = 3.77dB 14.4 z^ z^ z Gc3(z)=U/E= z^ z^ z

19 Direct Digital Control of DC/DC Converter Redesigned Controller with Delay Compensation Bode plot (Measured) Gp3(z)*Gc3(z) BW = 15.28kHz, PM = deg, GM = 3.4dB 19

20 Direct Digital Control of DC/DC Converter Transient Response (Fpwm = 250KHz) System Compensated for Computation Delay Gp3(z)*Gc3(z) 20

21 Digital Control of DC/DC Converter Voltage Mode Control: Computation Flow, Benchmark Results z z z z -2 Gc(z) = U/E = = z z z z -2 ( n 2) + a1 U( n 1) + b2 E( n 2) + b1 E( n 1) + b E( n) U ( n) = a2 U 0 Usat ( n) = min U ( n) max Dprd = Usat ( n) PWMPRD Vref Vo Gc(z) Dprd TMS320C28x=150MHz (32-bit implementation) Sampling Freq (KHz) Cycles Overhead Available Cycles Cycles/loop Number of Loops

22 Digital Control of DC/DC Converter Sampling Frequency (fs) Selection Hc = -ωt d = -360fT d = -360f(kT s ) = -360k /(fs/f), [ k = T d /T s ] fc = crossover frequency Phase Lag (Hc) fs/fc=5 fs/fc=10 fs/fc=12.5 fs/fc= K Computation Delay per unit Ts, (Td /Ts) 22

23 Digital Control of DC/DC Converter Sampling Frequency (fs) Selection fs = 12.5*fc fs = 20*fc fs = 30*fc 23

24 Digital Control of DC/DC Converter PWM Resolution & Limit Cycle DSP Clock Freq = 150MHz, fpwm = 250kHz, PWM Duty Ratio Resolution = 1/(150M/250k) = 1/600 = 0.167% ADC resolution = 10bits, Vo = 2V (max), Vo Sensing Resolution Vad = 2V/1024 = 1.95mV Vin PWM Vpwm For Vin = 5V, Applied Volt Resolution Vpwm1 = 5V/600 = 8.33mV, For Vin = 2V, Applied Volt Resolution Vpwm2 = 2V/600 = 3.33mV, Vo Sense circuit A/D Vad Vpwm1 > Vad, => Limit Cycle Vpwm2 Vad, => Negligible Limit Cyc. Vin = 5V Vo = 1.6V Vin = 2V Vo = 0.8V 24