Designing low-frequency decoupling using SIMPLIS

Transcription

1 Designing low-frequency decoupling using SIMPLIS K. Covi

2 Traditional approach to sizing decoupling Determine effective ESR required Parallel electrolytic caps until ESR = ΔV/ΔI where ΔV = desired voltage tolerance ΔI = worst-case load change Example: p690 Power 4 CPU ΔV = 3% of 1.5V, ΔI = 1500A effective ESR = 30uΩ 2 capacitor books with over uF aluminum electrolytic caps CPU decoupling uF 38mΩ aluminum electrolytics per cap book 50uΩ uF 25mΩ organic Tantalum on processor board 104uΩ Effective ESR = 33.8uΩ max, typically much less 2 Designing low-frequency decoupling using SIMPLIS 18 October 2007

3 Simplified decoupling model 3 Designing low-frequency decoupling using SIMPLIS 18 October 2007

4 Current supplied by capacitor after a load step current load current ΔI supply current capacitor discharge current t 0 time 4 Designing low-frequency decoupling using SIMPLIS 18 October 2007

5 Solve for maximum ΔV For t 0 [ τ: ΔV = ΔIhR For t 0 > τ: ΔV = ΔIh(R/2)h(τ/t 0 + t 0 /τ) (τ = RC = capacitor time constant) t 0 < τ t 0 = τ t 0 > τ Output voltage vs. C Capacitor current Response is limited by ESR! 5 Designing low-frequency decoupling using SIMPLIS 18 October 2007

6 But it s not so simple anymore Denser packaging limits the number of output caps Fewer caps with much lower ESR shorter time constant All multi-layer ceramic designs very short time constant Result is that ESR no longer predicts ΔV Regulator response time typically longer than RC time constant of decoupling caps (t 0 > τ) Can use ΔV = ΔIh(R/2)h(τ/t 0 + t 0 /τ) equation, but how to determine t 0? t 0 usually limited by feedback compensation 6 Designing low-frequency decoupling using SIMPLIS 18 October 2007

7 Computer modeling SPICE Different models for transient and AC analysis Full switching model is very slow Convergence problems!!! SIMPLIS Same model use for both transient and AC analysis Up to 50x faster than SPICE simulators No convergence problems 7 Designing low-frequency decoupling using SIMPLIS 18 October 2007

8 Current-Mode Hysteretic Buck Converter I L I LOAD I SNS V C Switching frequency ~800kHz 8 Designing low-frequency decoupling using SIMPLIS 18 October 2007

9 Key waveforms SIMPLIS PSPICE 1V/div V C I SNS 2A/div I LOAD I L Transient response virtually identical 9 Designing low-frequency decoupling using SIMPLIS 18 October 2007

10 AC analysis with SIMPLIS 10 Designing low-frequency decoupling using SIMPLIS 18 October 2007

11 SIMPLIS model POP trigger 11 Designing low-frequency decoupling using SIMPLIS 18 October 2007

12 MOSFETs replaced by ideal switch model Piecewise-linear resistor represents body diode Ideal switches These simplifications have no effect on regulator dynamic performance 12 Designing low-frequency decoupling using SIMPLIS 18 October 2007

13 What does POP mean? POP stands for Periodic Operating Point Analysis POP analysis rapidly locates the steady state operating point of a switching system without having to simulate the startup transient conditions. This considerably speeds the study of effects such as load transients. Unlike the static methods used in SPICE, this analysis mode emulates a frequency sweep measurement as might be conducted on real hardware producing gain and phase plots without having to derive averaged models. (excerpted from 13 Designing low-frequency decoupling using SIMPLIS 18 October 2007

14 POP algorithm finding periodic steady state Output voltage 14 Designing low-frequency decoupling using SIMPLIS 18 October 2007

15 Add AC source to measure loop gain AC source Bode plot probes 15 Designing low-frequency decoupling using SIMPLIS 18 October 2007

16 Loop gain Error amplifier is rolling off at high frequency Loop gain Error amp Power stage Move zero to cancel power-stage pole 16 Designing low-frequency decoupling using SIMPLIS 18 October 2007

17 Move zero to match power stage (was 1nF) Zero moves from 15.9kHz to 7.2kHz 17 Designing low-frequency decoupling using SIMPLIS 18 October 2007

18 Compensator gain and phase vs op amp GBW phase gain 1 MHz 10 MHz 100 MHz 18 Designing low-frequency decoupling using SIMPLIS 18 October 2007

19 Updated Loop gain Loop phase Loop gain Error amp Power stage Error amp zero cancels power stage pole 19 Designing low-frequency decoupling using SIMPLIS 18 October 2007

20 Step response 20 Designing low-frequency decoupling using SIMPLIS 18 October 2007

21 22uF 0805 X5R decoupling cap model: C=10.2uF R=2mΩ L=0.44nH 1.25V & 800kHz 21 Designing low-frequency decoupling using SIMPLIS 18 October 2007

22 Step response with 10 caps ΔV = 120mV Output Voltage Step load change ΔV = 10% needs improvement! 22 Designing low-frequency decoupling using SIMPLIS 18 October 2007

23 Output impedance 23 Designing low-frequency decoupling using SIMPLIS 18 October 2007

24 Measuring output impedance Inject AC current into output Convert AC voltage source to AC current source Unity-gain voltage-controlled current source 24 Designing low-frequency decoupling using SIMPLIS 18 October 2007

25 Open- and closed-loop output impedance Open-loop Loop gain Closed-loop Parameter B: adjusts gain without moving zero 25 Designing low-frequency decoupling using SIMPLIS 18 October 2007

26 Loop gain vs B 66dB B=1 B=2 B=4 26 Designing low-frequency decoupling using SIMPLIS 18 October 2007

27 Output impedance vs loop gain 66dB open-loop B=1 B=2 B=4 8mΩ Z CL = Z OL / (1+loop gain) 27 Designing low-frequency decoupling using SIMPLIS 18 October 2007

28 Step response vs loop gain ΔV = 40mV B=1 B=2 B=4 8mΩ x 5A= 40mV excellent agreement! 28 Designing low-frequency decoupling using SIMPLIS 18 October 2007

29 Can the number of output caps be reduced? 10 caps 5 caps Peak output impedance the same with 5 or 10 caps 29 Designing low-frequency decoupling using SIMPLIS 18 October 2007

30 Step response vs number of output caps 10 caps 5 caps What s causing the overshoot? 30 Designing low-frequency decoupling using SIMPLIS 18 October 2007

31 Slew rate limiting of error amp! Error voltage 1V/us 5V/us Inductor current Transient response was limited by 1V/us max slew rate 31 Designing low-frequency decoupling using SIMPLIS 18 October 2007

32 Parameterized op amp I forgot to adjust SR when I increased GBW (again!) 32 Designing low-frequency decoupling using SIMPLIS 18 October 2007

33 Step response with 5V/us amplifier 10 caps 5 caps Power stage cannot slew fast enough in negative direction 33 Designing low-frequency decoupling using SIMPLIS 18 October 2007

34 Summary Difficult to size decoupling with all ceramic or low-esr electrolytic caps Computer modeling is essential to predict the regulator response to sudden load changes SPICE is OK for simulating transient behavior, but AC analysis not possible with switching model SIMPLIS provides both transient and AC analysis with the same model Relatively easy to size decoupling once loop gain can be observed and the compensation optimized 34 Designing low-frequency decoupling using SIMPLIS 18 October 2007

35 Thank you! 35 Designing low-frequency decoupling using SIMPLIS 18 October 2007