Implementation of Quantum dot Cellular Automata based Multiplexer on FPGA

Transcription

1 Implementation of Quantum dot Cellular Automata based Multiplexer on FPGA B.Ramesh 1, Dr. M. Asha Rani 2 1 Associate Professor, 2 Professor, Department of ECE Kamala Institute of Technology & Science, Singapur, Karimnagar, India JNTUH college of Engineering, Hyderabad, India Abstract: A novel technology the Quantum dot Cellular Automata (QCA) appears to be an alternate nano scale technology to provide the properties and functionalities of that have made CMOS successful over the past several decades. The experiment is carried out in QCA were demonstrated and realized the fundamental digital blocks. This paper introduce the designing a computationally useful and regular structure of QCA based FPGA implementation. Index Terms: QCA, FPGA, Mux, Quantum dot. I. INTRODUCTION The microelectronic technology is leading the digital system design using CMOS devices. One alternate for CMOS computing technology with quantum dots is called the quantum dot cellular automata (QCA) proposed in the year 1993 by lent and fabricated an idealized QCA cell in 1997.The basic structure of the QCA cell is a set of four charge containers called quantum dots positioned at the corners of a square as shown in figure 1 [1], [2]. The dimensions of QCA cell is 20nm X 20nm, in which the diameter of each dot is 5nm and quantum dots are separated by 5nm.The binary representation of QCA cell can be specified with its polarization. The polarization levels as shown in figure 1 are P=-1, representing binary 0 and P=+1 representing binary 1 [2]. The QCA based basic elements of digital logic are Majority gate, Inverter and QCA wires[6].the majority gate is one which accepts three binary inputs and produces the binary output based on the majority of the inputs illustrated in figure 2, Corresponding Author: Mr. B.Ramesh, Associate Professor, Kamala Institute of Technology & Science, Singapur, Karimnagar. Id: brameshb2@rediffmail.com Fig. 1. QCA cells with four dots. Quantum dot cell has electrons in two opposite dots and two empty. Polarization P= -1for binary state 0 and P=1 for binary state 1. a QCA inverter produce the output is complement of the given binary input shown in figure 2 and the QCA wire is an array of QCA cells which transfers given signal at one end of an array to the other end as shown in figure 2(c) [15]. Input P input (c) Output Pbar output Fig.2. Basic elements in QCA. A QCA majority gate. QCA inverter with input P and output Pbar. (c) QCA wire, output=input

2 In conventional CMOS technology Field Programmable Gate Arrays (FPGA) are implemented using basic digital circuits like configurable logic blocks, programmable inter connects and I/O blocks [3]. Unlike CMOS, in QCA based FPGA the basic elements such as QCA NAND gates in a regular structure can be modeled using majority gate. The organization of the topics in this paper will begin with a discussion in section II experimentation and realization of QCA cell. In section III the basic properties of FPGA s and how they relate to QCA. In section IV challenges in generation of QCA FPGA. In section V the basic block for the QCA based FPGA and its routing mechanism. In section VI QCA based FPGA implementation. Finally conclusions on QCA based FPGA. QCA Basic building blocks In introduction it is indicated the aim of this work is to develop a QCA based regular structure to build an FPGA design, the previous research on QCA showing that the position of an electron in a particular QCA cell can control the position of second electron [9]. In these experiments, aluminum islands act as the dots, are coupled by aluminum oxide tunnel junctions [1]. Aluminum metal tunnel-junction technology the basic components like, a majority gate, binary QCA wire was experimentally demonstrated. In a majority gate a four dot QCA cell is the basic element, five such cells were arranged with three input cells, one out cell and one driving cell, and the majority of the inputs determines the polarization value of the output QCA cell as show in figure 2. The functionality of majority gate demonstrates the logic function: AB+BC+AC where A, B and C binary input variables. The functionality of majority gate is given in table I. Logical AND/OR gates were demonstrated using majority gate by fixing the polarization of one of the inputs of the majority gate. A QCA binary wire was demonstrated by fabricating metallic QCA cells by arranging them in the form of a linear array.[11]. TABLE I TRUTH TABLE OF QCA MAJORITY GATE Inputs of a QCA Output majority gate A B C Group of four clock signals enables direction of information flow in QCA cells. In the clocked metaldot QCA cells, dots were taking energy from clock signals; there is no electrically isolated power supply [8]. II. FPGA DESIGN In conventional CMOS technology basic building blocks in FPGA are configurable logic blocks (CLBs), Programmable interconnects and Programmable I/Os (inputs/outputs). Unlike CMOS, QCA based FPGA design use basic elements are QCA cells. In this design NAND gates are the basic gates and QCA wires are used for interconnects. The interconnections in FPGA often take from four neighboring logic cells [3]. How QCA based FPGA will be focused in the next section. QCA based FPGA A regular structure of NAND gates and interconnecting wires are used to implement a basic model of QCA based FPGA. This section deals with implementation of QCA based NAND gate and few routing models. A QCA based NAND gate consists of one majority gate with one input is fixed to a polarization value P=- 1, which performs the function of a logical AND gate and two QCA cells followed by it results the inversion of AND i.e. NAND gate shown in figure 3, here p, q are the binary inputs and y binary outputs. The simulation QCA design were carried out using

3 QCADesigner software, simulation results of NAND gate are shown in figure 3, here p, q accepts the binary values 00, 01, 10 and 11 during different time intervals and produce output 1, 1, 1 and 0 respectively. Fig.3. NAND gate layout & simulation. QCA layout design of NAND gate. Simulation waveforms of QCA NAND gate qout p pout q Fig.4. QCA routing elements. Routing element which distribute signal in three directions. Routing element which cross a signal at a point Routing element to distribute the signal to three directions given in figure 4, its QCA layout and the simulation results are shown in figure 5, and figure 5 respectively i.e. always outputs pout1, pout2 and pout3 are is same as binary value of the input signal p. Similarly routing for signal crossing at particular point given figure 4, the QCA layout diagram and its simulation waveforms are shown in figure 5(c) and figure 5(d) respectively, here always pout binary value is same as input signal p and qout value is equal to input signal q. A regular structure of FPGA can constructed using two dimensional arrays of NAND gates and routing elements for the interconnection. Basic structure and interconnection of a 4x1 multiplexer is demonstrated with QCA layout and its simulation in the next section. Basically routing of NAND gates is possible with two types of routing elements as shown in figure 4, signal p is distributed horizontally and vertically so pout1, pout2 and pout3 are same as input signal p. In the figure 4, the signals p and q are just crossing and always pout, qout are same as p, q respectively. Routing elements are simulated with QCA layouts and their waveforms are verified. p Pout2 pout1 pout3

4 NAND gate levels in the design. The signal flow in the various levels will be controlled by four clock signals in the QCA layout [8]. (c) Fig.6. QCA based FPGA structure using NAND gates and routing elements for 4x1 multiplexer. (d) Fig.5.Layout and simulation of QCA routing elements.qca layout of three side signal distribution. QCA simulation waveforms of three side signal distribution. (c) QCA layout for signal crossing. (d) QCA simulation waveforms of signal crossing. In the layout design of QCA based FPGA quantum dot cells are arranged in a regular structure for the implementation of NAND gates and interconnects as shown in figure 7. The signal flow in the QCA layout design is controlled with four QCA clock zones namely switch (unpolarized QCA cells driven by input and change its state), hold (cells held in a definite polarization), release (cells lose their polarization) and relax (cells become unpolarized) [8]. III. QCA based FPGA for 4x1 Multiplexer NAND gates are arranged in the form a two dimensional array, which a regular structure to FPGA, it is also known as sea of gates. To express the QCA based FPGA structure the NAND gates are taken as circles and routing elements as lines with arcs as shown in figure 6. Here each NAND gate is a majority gate, given a fixed polarization P=-1 to form AND gate which is not shown in the figure 6. The circle without connection is an unused NAND gate in the implementation of multiplexer. Here the 4x1 multiplexer consists of four inputs I0, I1, I2, and I3, two select lines s0, s1 and one output y. Here the implementation of 4x1 multiplexer with QCA based FPGA is using twelve NAND gates and there five Fig.7. QCA based FPGA layout design for 4x1 multiplexer When the signals in the circuit from input to output length of the wire is different for various paths, but to get correct results from the NAND gates at a level it should receive synchronized signals as their inputs,

5 this synchronization can done with four QCA clock zones. In the QCA layout shown in figure7, I0, I1, I2 and I3 are inputs, S0, S1 are select lines and y is the output. A QCA based FPGA for 4x1 multiplexer follows the truth table given in table II. TABLE II TRUTH TABLE OF 4X1 MULTIPLEXER Select lines Output S1 S0 Y 0 0 I0 0 1 I1 1 0 I2 1 1 I3 IV. CONCLUSIONS To conclude the work carried out, we have succeeded in QCA layout design for the QCA based FPGA. The important concept in the circuit is regularity and simplicity. We have developed schemes to potentially implement routing elements and NAND gates in QCA, which are broadly useful in the implementation of QCA based FPGAs. We have also illustrated the FPGA primitive logic block as NAND gate and two routing elements for the interconnections. [4]. C.Lent, P.Tougaw and W. Porod. Bistable saturation in coupled quantum dots for quantum cellular automata, Appl. Phys. Lett., 62:714, [5]. C.Lent, P.Tougaw, W. Porod and G.Bernstein. Quantum cellular automata, Nanotechnolgy, 4:49-57, [6]. R.Zhang, K.Walus, W.Wang and G.A.Jullien. A method of majority logic reduction for Quantum cellular automata., IEEE Transactions on Nanotechnology, Vol.3, No.4, , Dec [7]. Vamsi Venkamamidi, Marco Ottavi and Fabrizio Lombardi. A line based parallel memory for QCA implementation, IEEE Transactions on Nanotechnology, Vol.4, No.6, , Nov [8]. A.Orlov, I.Amlani, R.Kummamuru, R.Rajagopal, G.Toth,C.Lent, G.Bernstein and G.Snider. Experimental Demonstration of clocked Single electron switching in quantum dot cellular automata., Applied Physics Letters, 85: , [9]. A.Orlov, I.Amlani, G.Bernstein, C.Lent, and G.Snider. Realization of a functional cell for quantum-dot cellular automata., Science, 277: , [10]. P.Tougaw and C.Lent. Logical Devices Implemented using quantum cellular automata., Journal of applied physics, 75: , [11]. K.Demadis, C.Hartshorn and T.Meyer. The localized to delocalized transition in mixed-valence chemistry., Chem. Rev. 101: ,2001. We have designed the QCA layout of QCA based FPGA for 4x1 Multiplexer, which is a regular arrangement of NAND gates with routing elements. The simulation results were obtained with four clock signals of quantum dot cellular automata. This regular structure of QCA based FPGA design can be extended to implement any digital system like microprocessors, DSPs, ASICs etc. REFERENCES [1]. I.Amlani, A.Orlov, G.Toth, G.Bernstein, C.Lent, and G.Snider. Digital logic gates using quantum dot cellular automata., Science 284: , [2]. A.Aviram. Molecules for memory, logic and amplification., Journal of the American chemical society, 110(17): ,1988. [3]. J.Hays, Designing with FPGAs CPLDs., PTR Prentice Hall, New Jersey, 1994.