FHP3130, FHP3230, FHP3430 Single, Dual, and Quad, High Speed, 2.7V to 12V, Rail-to-Rail Amplifiers

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1 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Features at ±5V 2.5mA supply current per amplifier.8% /. differential gain/phase 6MHz.dB bandwidth at V o = 2V pp Output voltage range at R L = 5Ω : -4.8V to 4.8V Input includes negative rail V/µs slew rate ±ma output current 7nV/ Hz input voltage noise >db PSRR, CMRR, and Open Loop Gain FHP33 improved replacement for KM4 FHP323 improved replacement for KM42 FHP33 lead(pb)-free package options (SOT23-5, SOIC-8) FHP323 lead(pb)-free package options (MSOP-8, SOIC-8) FHP343 lead(pb)-free package options (TSSOP-4, SOIC-4) RoHS compliant Fully specified at +3V, +5V, and ±5V supplies Applications A/D driver Active filters CCD imaging systems CD/DVD ROM Coaxial cable drivers Portable/battery-powered applications Twisted pair driver Video driver Typical Application - YC Video Line Driver Y IN /2 FHP323 kω 75Ω 75Ω Y OUT Description December 25 The FHP33 (single), FHP323 (dual), and FHP343 (quad) are low cost, high performance, voltage feedback amplifiers that consume only 2.5mA of supply current per channel while providing ±ma of output current. These amplifiers are designed to operate from 2.7V to 2V (±6V) supplies. The common mode voltage range extends below the negative rail and the output provides rail-to-rail performance. The FHP33, FHP323, and FHP343 are designed on a complimentary bipolar process and provide 7MHz of bandwidth and V/µs of slew rate at a supply voltage of ±5V. The combination of low power, rail-to-rail performance, low voltage operation, and tiny package options make these amplifiers well suited for use in many general purpose high speed applications. These amplifiers also provide excellent video specifications. They offer extremely low differential gain and phase (.8%/. ) and.db gain flatness to 6MHz for superb standard definition video performance. Their output drive capability effortlessly supports 4 video loads. C IN Differential Gain (%)..8 V s = ±5V R L = 5Ω.6 Gain.4.2 Phase Input Voltage (V) /2 FHP323 kω 75Ω 75Ω Differential Phase (deg) C OUT FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers kω kω FHP33, FHP323, FHP343 Rev. A

2 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Pin Configurations OUT -IN +IN -Vs OUT NC -IN +IN -Vs OUT -IN +IN +Vs +IN2 -IN2 OUT2 -Vs +IN FHP323 SOIC/MSOP 7 FHP33 SOT23 + FHP33 SOIC 4 5 FHP343 SOIC/TSSOP Vs +Vs -IN OUT2 -IN2 +IN2 NC +Vs OUT NC OUT4 -IN +IN4 -Vs +IN3 -IN OUT3 Pin Assignments FHP323 Pin# Pin Type Description OUT Output Output, channel 2 -IN Input Negative Input, channel 3 +IN Input Positive Input, channel 4 -Vs Input Negative supply 5 +IN2 Input Positive Input, channel 2 6 -IN2 Input Negative Input, channel 2 7 OUT2 Output Output, channel 2 8 +Vs Input Positive supply FHP33 Pin# SOT/SOIC Pin Type Description / 6 OUT Input Output 2 / 4 -Vs Input Negative supply 3 / 3 +IN Input Positive Input 4 / 4 -IN Input Negative Input 5 / 7 +Vs Input Positive supply na /, 5, 8 NC - No Connect FHP343 Pin# Pin Type Description OUT Output Output, channel 2 -IN Input Negative Input, channel 3 +IN Input Positive Input, channel 4 +Vs Input Positive supply 5 +IN2 Input Positive Input, channel 2 6 -IN2 Input Negative Input, channel 2 7 OUT2 Output Output, channel 2 8 OUT3 Output Output, channel 3 9 -IN3 Input Negative Input, channel 3 +IN3 Input Positive Input, channel 3 -Vs Input Negative supply 2 +IN4 Input Positive Input, channel 4 3 -IN4 Input Negative Input, channel 4 4 OUT4 Output Output, channel FHP33, FHP323, FHP343 Rev. A

3 Absolute Maximum Ratings Parameter Min Max Unit Supply Voltage 2.6 V Input Voltage Range -V s -.5V +V s +.5V V Reliability Information Parameter Min Typ Max Unit Junction Temperature 5 C Storage Temperature Range C Lead Temperature (Soldering, s) 3 C 8-Lead SOIC 55 C/W 8-Lead MSOP 246 C/W 5-Lead SOT C/W 4-Lead TSSOP 3 C/W 4-Lead SOIC 28 C/W Note:. Package thermal resistance (θ JA ), JDEC standard, multi-layer test boards, still air. ESD Protection Product FHP33 FHP323 FHP343 Package SOT23 SOIC SOIC MSOP SOIC TSSOP Human Body Model (HBM) TBD TBD 3.5kV 3.5kV TBD TBD Charged Device Model (CDM) TBD TBD 2kV.5kV TBD TBD Recommended Operating Conditions Parameter Min Typ Max Unit Operating Temperature Range C Supply Voltage Range V FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 3

4 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Electrical Characteristics at +3V T c = 25 C, V s = 3V, R L = 2kΩ to V s /2, G = 2, R f = R g =kω; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response UGBW -3dB Bandwidth G = +, V OUT =.2V pp 6 MHz BW ss -3dB Bandwidth G = +2, V OUT =.2V pp 5 MHz BW Ls Full Power Bandwidth G = +2, V OUT = V pp 45 MHz BW.dBss.dB Bandwidth G = +2, R L = 5Ω, R f = R g =.5kΩ, 25 MHz V OUT =.2V pp GBWP Gain Bandwitdth Product G = +6, V OUT =.2V pp 6 MHz Time Domain Response t R, t F Rise and Fall Time V OUT =.2V step 2 ns t S Settling Time to.% V OUT = 2V step 45 ns OS Overshoot V OUT =.2V step < % SR Slew Rate V OUT = 2V step, G = - 9 V/µs Distortion / Noise Response HD2 2nd Harmonic Distortion V OUT = V pp, 5MHz 5 dbc HD3 3rd Harmonic Distortion V OUT = V pp, 5MHz 5 dbc THD Total Harmonic Distortion V OUT = 2V pp, 5MHz, R L = Ω, G = - 5 db e n Input Voltage Noise > khz 7 nv/ Hz X TALK Crosstalk FHP323 at MHz 62 db DC Performance V IO Input Offset Voltage mv dv IO Average Drift -5 µv/ C I b Input Bias Current -.8 µa di b Average Drift -3.5 na/ C I IO Input Offset Current. µa PSRR Power Supply Rejection Ratio DC db A OL Open Loop Gain DC, R L = 5Ω db I S Supply Current per Amplifier 2.5 ma Input Characteristics R IN Input Resistance 5 kω C IN Input Capacitance.25 pf CMIR Input Common Mode V Range -.3 to 2 V CMRR Common Mode Rejection Ratio DC, V CM = V to V s db Output Characteristics R L = 2kΩ to V s /2, G = -.5 to V O Output Voltage Swing 2.95 V R L = 5Ω to V s /2, G = -. to 2.9 V I OUT Linear Output Current ± ma I SC Short Circuit Output Current V O = V s /2 ±2 ma 4 FHP33, FHP323, FHP343 Rev. A

5 Electrical Characteristics at +5V T c = 25 C, V s = 5V, R L = 2kΩ to V s /2, G = 2, R f = R g =kω; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response UGBW -3dB Bandwidth G = +, V OUT =.2V pp 65 MHz BW ss -3dB Bandwidth G = +2, V OUT =.2V pp 5 MHz BW Ls Full Power Bandwidth G = +2, V OUT = 2V pp 3 MHz BW.dBss.dB Bandwidth G = +2, R L = 5Ω, R f = R g =.5kΩ, 8 MHz V OUT =.2V pp GBWP Gain Bandwitdth Product G = +6, V OUT =.2V pp 6 MHz Time Domain Response t R, t F Rise and Fall Time V OUT =.2V step 2 ns t S Settling Time to.% V OUT = 2V step 55 ns OS Overshoot V OUT =.2V step < % SR Slew Rate V OUT = 2V step, G = - 5 V/µs Distortion / Noise Response HD2 2nd Harmonic Distortion V OUT = 2V pp, 5MHz 56 dbc HD3 3rd Harmonic Distortion V OUT = 2V pp, 5MHz 75 dbc THD Total Harmonic Distortion V OUT = 2V pp, 5MHz 56 db e n Input Voltage Noise > khz 7 nv/ Hz X TALK Crosstalk FHP323 at MHz 62 db DG Differential Gain NTSC (3.58MHz), R L = 5Ω,.2 % AC coupled into 22µF, V s = ±2.5V DP Differential Phase NTSC (3.58MHz), R L = 5Ω,.4 AC coupled into 22µF, V s = ±2.5V DC Performance V IO Input Offset Voltage mv dv IO Average Drift -5 µv/ C I b Input Bias Current -.8 µa di b Average Drift -3.5 na/ C I IO Input Offset Current. µa PSRR Power Supply Rejection Ratio DC db A OL Open Loop Gain DC, R L = 5Ω db I S Supply Current per Amplifier 2.5 ma Input Characteristics R IN Input Resistance 5 kω C IN Input Capacitance.2 pf CMIR Input Common Mode V Range -.3 to 4 V CMRR Common Mode Rejection Ratio DC, V CM = V to V s db Output Characteristics R L = 2kΩ to V s /2.5 to V O Output Voltage Swing 4.95 V R L = 5Ω to V s /2. to 4.9 V I OUT Linear Output Current ± ma I SC Short Circuit Output Current V O = V s /2 ±2 ma FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 5

6 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Electrical Characteristics at ±5V T c = 25 C, V s = ±5V, R L = 2kΩ to GND, G = 2, R f = R g =kω; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response UGBW -3dB Bandwidth G = +, V OUT =.2V pp 7 MHz BW ss -3dB Bandwidth G = +2, V OUT =.2V pp 5 MHz BW Ls Full Power Bandwidth G = +2, V OUT = 2V pp 3 MHz BW.dBss.dB Bandwidth G = +2, R L = 5Ω, R f = R g =.5kΩ, 6 MHz V OUT =.2V pp GBWP Gain Bandwitdth Product G = +6, V OUT =.2V pp 6 MHz Time Domain Response t R, t F Rise and Fall Time V OUT =.2V step 2 ns t S Settling Time to.% V OUT = 2V step 52 ns OS Overshoot V OUT =.2V step < % SR Slew Rate V OUT = 2V step, G = - V/µs Distortion / Noise Response HD2 2nd Harmonic Distortion V OUT = 2V pp, 5MHz 55 dbc HD3 3rd Harmonic Distortion V OUT = 2V pp, 5MHz 75 dbc THD Total Harmonic Distortion V OUT = 2V pp, 5MHz 55 db e n Input Voltage Noise > khz 7 nv/ Hz X TALK Crosstalk FHP323 at MHz 62 db DG Differential Gain NTSC (3.58MHz), R L = 5Ω,.8 % AC coupled into 22µF DP Differential Phase NTSC (3.58MHz), R L = 5Ω,. AC coupled into 22µF DC Performance V IO Input Offset Voltage -6 6 mv dv IO Average Drift -5 µv/ C I b Input Bias Current µa di b Average Drift -3.5 na/ C I IO Input Offset Current µa PSRR Power Supply Rejection Ratio 2 DC 8 db A OL Open Loop Gain 2 DC, R L = 5Ω 8 db I S Supply Current per Amplifier ma Input Characteristics R IN Input Resistance 5 kω C IN Input Capacitance. pf CMIR Input Common Mode V Range -5 to 4 V CMRR Common Mode Rejection Ratio 2 DC, V CM = -5V to 3.5V 75 db Output Characteristics R L = 2kΩ to V O Output Voltage Swing 4.95 V R L = 5Ω to V I OUT Linear Output Current ± ma I SC Short Circuit Output Current V O = V ±2 ma Notes:. % tested at 25 C 2. Min/max guaranteed by design/characterization. 6 FHP33, FHP323, FHP343 Rev. A

7 Typical Performance Characteristics T c = 25 C, V s = 5V, R L = 2kΩ to V s /2 for V s = 5V and 3V, R L = 2kΩ to ground for V s = ±5V, G = 2, R f = R g = kω; unless otherwise noted. Figure. Non-Inverting Freq. Response (±5V) Normalized Gain (db) Normalized PSRR (db) Gain (db) Normalized Gain (db) G = G = 5 G = 2 V s = ±5V V o =.2V pp G = R f = Figure 3. Non-Inverting Freq. Response (+5V) -2 G = -3 - R f = -2-4 G = G = G = V s = +5V V o =.2V pp Frequency (MHz) 3 Figure 5. Non-Inverting Freq. Response (+3V) G = G = 5 G = 2-6 V s = +3V V o =.2V pp -7. G = R f = Figure 2. Inverting Freq. Response (±5V) Normalized Gain (db) Normalized Gain (db) PSRR (db) Normalized Gain (db) G = - G = -5 G = -2-6 V s = ±5V V o =.2V pp -7. G = - Figure 4. Inverting Freq. Response (+5V) -3 Using.µF and.µf --4 Bypass Capacitors as suggested G = - G = G = G = V s = +5V V o =.2V pp Frequency (MHz) 3 Figure 6. Inverting Freq. Response (+3V) G = - G = -5 G = -2-6 V s = +3V V o =.2V pp -7. G = - FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 7

8 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Typical Performance Characteristics T c = 25 C, V s = 5V, R L = 2kΩ to V s /2 for V s = 5V and 3V, R L = 2kΩ to ground for V s = ±5V, G = 2, R f = R g = kω; unless otherwise noted. Figure 7. Frequency Response vs. C L (+3V) Normalized Gain (db) Normalized Gain (db) C L = 2pF RS = 5Ω + - kω kω C L = pf RS = 6.5Ω C L = 5pF RS = Ω Rs V O = V pp V O = 2V pp V O = 4V pp CL RL V s = +3V V o =.2V pp C L = pf RS = 2Ω C L = 5pF RS = 5Ω Figure 9. Large Signal Freq. Response (+5V) Distortion (dbc) G = 2 V s = +5V Figure. HD2 vs. R L (+3V) RL = KΩ V O = V pp R L = 5KΩ R L = 2KΩ R L = 5Ω Figure 8. Frequency Response vs. R L (+3V) Normalized Gain (db) Normalized Gain (db) Distortion (dbc) RL = 5KΩ RL = 5Ω R L = KΩ -6 V s = +3V V o =.2V pp G = 2 R f = R g =.5kΩ V s = +5V R L = 5Ω R L = KΩ V s = 3V V s = 5V V s = V R L = 5Ω Figure. Gain vs. Flattness RL = 2KΩ R L = 5KΩ R L = 5Ω Figure 2. HD3 vs. R L (+3V) V O = V pp 8 FHP33, FHP323, FHP343 Rev. A

9 Typical Performance Characteristics T c = 25 C, V s = 5V, R L = 2kΩ to V s /2 for V s = 5V and 3V, R L = 2kΩ to ground for V s = ±5V, G = 2, R f = R g = kω; unless otherwise noted. Distortion (dbc) CMRR (db) V s = ±5V -2 k k M M M Frequency (Hz) Gain (db) Figure 3. HD2 vs. V O (+5V) MHz MHz MHz -85 KHz Output Amplitude (V pp ) Figure 5. CMRR vs. Frequency Figure 7. Open Loop Gain and Phase 8 7 Gain Phase V s = ±5V -2 k k M M M Frequency (Hz) G G Phase (deg) Output Voltage (V) Distortion (dbc) PSRR (db) k Figure 4. HD3 vs. V O (+5V) Output Amplitude (V pp ) k M M M Frequency (Hz) V s = ±5V R L = 5Ω R L = 75Ω G = - R L = KΩ Input Voltage (V) MHz 5MHz MHz MHz Figure 8. Output Swing vs. Load (+3V) 2.5 Figure 6. PSRR vs. Frequency G FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 9

10 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Typical Performance Characteristics T c = 25 C, V s = 5V, R L = 2kΩ to V s /2 for V s = 5V and 3V, R L = 2kΩ to ground for V s = ±5V, G = 2, R f = R g = kω; unless otherwise noted. Input Voltage Noise (nv/ Hz) Figure 9. Input Voltage Noise (+3V) Figure 2. Pulse Resp. vs. Common Mode Voltage Output Voltage (.5V/div) G = -.2V Offset.6V Offset No Offset -.6V Offset -.2V Offset Time (.2µs/div) Figure 23. Large Signal Pulse Response (+5V) Voltage (V) G = Time (µs) Figure 2. Crosstalk vs. Frequency (+3V) Crosstalk (db) Voltage (V) G = 2 Figure 22. Large Signal Pulse Response (+3V) Time (µs) Figure 24. Large Signal Pulse Response (±5V) Voltage (V) G = Time (µs) FHP33, FHP323, FHP343 Rev. A

11 Typical Performance Characteristics T c = 25 C, V s = 5V, R L = 2kΩ to V s /2 for V s = 5V and 3V, R L = 2kΩ to ground for V s = ±5V, G = 2, R f = R g = kω; unless otherwise noted. Figure 25. Differential Gain and Phase (±2.5V) Differential Gain (%) R L = 5Ω AC coupled into 22µF Gain Phase Input Voltage (V) Differential Phase (deg) Differential Gain (%) Figure 26. Differential Gain and Phase (±5V).. V s = ±5V.8 R L = 5Ω.8.6 AC coupled into 22µF.6.4 Gain Phase Input Voltage (V) Differential Phase (deg) FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A

12 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Applications Information General Description The FHP33 (single), FHP323 (dual), and FHP343 (quad) are low cost, high performance, voltage feedback amplifiers that consume only 2.5mA of supply current per channel while providing ±ma of output current. These amplifiers are designed to operate from 2.7V to 2V (±6V) supplies. The common mode voltage range extends below the negative rail and the output provides rail-to-rail performance. The FHP33, FHP323, and FHP343 are designed on a complimentary bipolar process and provide 7MHz of bandwidth and V/µs of slew rate at a supply voltage of ±5V. The combination of low power, rail-to-rail performance, low voltage operation, and tiny package options make these amplifiers well suited for use in many general purpose high speed applications. These amplifiers also provide excellent video specifications. They offer extremely low differential gain and phase (.8%/. ) and.db gain flatness to 6MHz for superb standard definition video performance. Their output drive capability effortlessly supports 4 video loads. Driving Capacitive Loads The Frequency Response vs. C L plot on page 8, illustrates the response of the FHP323 Family. A small series resistance (R s ) at the output of the amplifier, illustrated in Figure 27, will improve stability and settling performance. R s values in the Frequency Response vs. C L plot were chosen to achieve maximum bandwidth with less than db of peaking. For maximum flatness, use a larger R s. R g + Figure 27. Typical Topology for Driving Capactive Loads Power Dissipation - R f The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 5 C for an extended time, device failure may occur. The FHP33, FHP323 and FHP343 are short circuit protected. However, this may not guarantee that the maximum junction temperature (+5 C) is not exceeded under all conditions. RMS Power Dissipation can be calculated using the following equation: Power Dissipation = I s * (V s + - V s -) + (V s + - V o(rms) ) * I OUT(RMS) R s C L R L Where I s is the supply current, V s + is the positive supply pin voltage, V s - is the negative supply pin voltage, V o(rms) is the RMS output voltage and I OUT(RMS) is the RMS output current delivered to the load. Follow the maximum power derating curves shown in Figure 28 below to ensure proper operation. Maximum Power Dissipation (W) Ambient Temperature ( C) Figure 28. Maximum Power Derating Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The FHP33/323/343 will typically recover in less than 5ns from an overdrive condition. Figure 29 shows the FHP323 in an overdriven condition. Voltage (V) TSSOP-4 SOIC-8 SOT23-5 Output Input SOIC-4 MSOP-8 Time (µs) V s = 3V G = 5 R L = 2kΩ R f = kω Figure 29. Overdrive Recovery Composite Video Summer The bandwidth and differential gain/phase performance of the FHP33/323/343 amplifiers make them well suited for video applications. Figure 3 shows a typical Composite Video Summer. The high output current capability allows for driving multiple video loads. Figure 3 shows the resulting differential gain/ phase of this 3-amp configuration driving 4 video loads, 37.5Ω. 2 FHP33, FHP323, FHP343 Rev. A

13 Y IN 75Ω C IN 75Ω + /4 FHP343 - kω kω + /4 FHP343 - kω kω kω kω kω Figure 3. Typical Composite Video Summer Differential Gain (%) V s = ±5V R L = 37.5Ω Figure 3. DG/DP of CV Summer Driving 4 Video Loads Layout Considerations + /4 FHP343 - kω 5Ω Phase Gain CY OUT General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8µF and.µf ceramic capacitors Place the 6.8µF capacitor within.75 inches of the power pin Place the.µf capacitor within. inches of the power pin Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts shown below for more information. 75Ω Input Voltage (V) 75Ω Differential Phase (deg) Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of thes devices: KEB2 KEB3 KEB KEB6 KEB2 KEB8 Evaluation Board # Evalutaion Board Schematics Products FHP33IS5X FHP33IM8X FHP323IMU8X FHP323IM8X FHP343IMTC4X FHP343IM4X Evaluation board schematics and layouts are shown in Figures 32 thru 46. These evaluation boards are built for dual supply operation. Follow these steps to use the board in a single supply application:. Short -V s to ground 2. Use C3 and C4, if the -V s pin of the amplifier is not directly connected to the ground plane. Figure 32. FHP33 KEB2/KEB3 Schematic FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 3

14 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Figure 33. FHP33 KEB2 (top side) Figure 34. FHP33 KEB2 (bottom side) Figure 35. FHP33 KEB3 (top side) Figure 36. FHP33 KEB3 (bottom side) 4 FHP33, FHP323, FHP343 Rev. A

15 Figure 37. FHP323 KEB6/KEB Schematic Figure 39. FHP323 KEB6 (bottom side) FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Figure 38. FHP323 KEB6 (top side) Figure 4. FHP323 KEB (top side) FHP33, FHP323, FHP343 Rev. A 5

16 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Figure 4. FHP323 KEB (bottom side) Figure 43. FHP343 KEB2 (top side) Figure 42. FHP343 KEB2/KEB8 Schematic Figure 44. FHP343 KEB2 (bottom side) 6 FHP33, FHP323, FHP343 Rev. A

17 Figure 45. FHP343 KEB8 (top side) Figure 46. FHP343 KEB8 (bottom side) FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 7

18 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Mechanical Dimensions 8-Lead Outline Package (SOIC) Pin No. e D C L B 8-Lead Outline Package (MSOP) C L ZD A A A2 E3 E4 aaa A E/2 2X e S E H α 3 7 B 2 2 ccc ABC NOTE: 4 6 D2 b bbb M ABC D C E A2 A A A h x 45 c DETAIL-A H Gauge Plane.25mm b b Section A - A 5 A A c t2 t 7 L DETAIL-A C E2 E E 2 3 L L Detail A Scale 4: SOIC-8 SYMBOL MIN MAX A..25 B C.9.25 D E e.27 BSC H h.25.5 L.4.27 A ZD.53 ref A NOTE:. All dimensions are in millimeters. 2. Lead coplanarity should be to.mm (.4") max. 3. Package surface finishing: (2.) Top: matte (charmilles #8~3). (2.2) All sides: matte (charmilles #8~3). (2.3) Bottom: smooth or matte (charmilles #8~3). 4. All dimensions excluding mold flashes and end flash from the package body shall not exceed.52mm (.6) per side (D). R R Detail A All dimensions are in millimeters (angle in degrees), unless otherwise specified. 2 Datums B and C to be determined at datum plane H. 3 Dimensions "D" and "E" are to be determined at datum H. 4 Dimensions "D2" and "E2" are for top package and dimensions "D" and "E" are for bottom package. 5 Cross sections A A to be determined at.3 to.25mm from the leadtip. 6 Dimension "D" and "D2" does not include mold flash, protrusion or gate burrs. 7 Dimension "E" and "E2" does not include interlead flash or protrusion. MSOP-8 SYMBOL MIN MAX A. A..5 A D 3.. D E E 3.. E E3.5.3 E4.5.3 R.5 +.5/-.6 R.5 +.5/-.6 t.3.8 t2.4.8 b /-.8 b.3.5 c.8.5 c.5 +.3/ L.55.5 L.95 BSC aaa. bbb.8 ccc.25 e.65 BSC S.525 BSC 8 FHP33, FHP323, FHP343 Rev. A

19 Mechanical Dimensions 4-Lead Outline Package (SOIC) Pin No. A e D C L 4-Lead Outline Package (TSSOP) B C L ZD A A2 NOTES: 2X E/2. ddd C B A 2X N/2 TIPS 6 7 A aaa C C A A N e. DIA ccc e /2 D 8 3 b NX bbb M CBA E 9 H 8 A α B 7 E E A2 A H GAGE PLANE.25 h x 45 c (3) DETAIL-A 5 (b) b SECTION AA (2) (.2) (L) L R R c 7 L DETAIL-A C SOIC-4 SYMBOL MIN MAX A.4.98 B.4.8 C D E.5.57 e.5 BSC H h L.6.5 A ZD.2 ref A NOTE:. All dimensions are in inches. 2. Lead coplanarity should be to.mm (.4") m 3. Package surface finishing: (2.) Top: matte (charmilles #8~3). (2.2) All sides: matte (charmilles #8~3). (2.3) Bottom: smooth or matte (charmilles #8~3 4. All dimensions excluding mold flashes and end fla from the package body shall not exceed o.52mm per side (d). TSSOP-4 SYMBOL MIN NOM MAX A. A.5.5 A L R.9 R.9 b.9.3 b c.9.2 c L. REF aaa. bbb. ccc.5 ddd.2 e.65 BSC 2 2 REF 3 2 REF D E E 6.4 BSC e.65 BSC N 4 All dimensions are in millimeters (angle in degrees). 2 Dimensioning and tolerancing per ASME Y Dimensions "D" does not include mold flash, protusions or gate burrs. Mold flash protusions or gate burrs shall not exceed.5 per side. 4 Dimension "E" does not include interlead flash or protusion. Interlead flash or protusion shall not exceed.25 per side. 5 Dimension "b" does not include dambar protusion. Allowable dambar protusion shall be.8mm total in excess of the "b" dimension at maximum material condition. Dambar connot be located on the lower radius of the foot. Minimum space between protusion and adjacent lead is.7mm for.5mm pitch packages. FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 9

20 FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Mechanical Dimensions 5-Lead Outline Package (SOT23) C L b e C L e D C L A A2 A E C L α DATUM 'A' NOTE:. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM 'A' and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 3 REV A supercedes SOT-D-25 REV C. C 2 E SYMBOL MIN MAX A.9.45 A..5 A2.9.3 b.25.5 C.9.2 D E E.5.75 L e.95 ref e.9 ref α 2 FHP33, FHP323, FHP343 Rev. A

21 Ordering Information Model Part Number Lead Free Package Container Pack Qty FHP33 FHP33IS5X* Yes SOT23-5 Reel 3 FHP33 FHP33IM8X* Yes SOIC-8 Reel 25 FHP323 FHP323IMU8X* Yes MSOP-8 Reel 3 FHP323 FHP323IM8X Yes SOIC-8 Reel 25 FHP343 FHP343IMTC4X* Yes TSSOP-4 Reel 25 FHP343 FHP343IM4X* Yes SOIC-4 Reel 25 Temperature range for all parts: -4 C to +85 C. Moisture sensitivity level for all parts is MSL-. * Preliminary FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers FHP33, FHP323, FHP343 Rev. A 2

22 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FAST ActiveArray FASTr Bottomless FPS Build it Now FRFET CoolFET GlobalOptoisolator CROSSVOLT GTO DOME HiSeC EcoSPARK I 2 C E 2 CMOS i-lo EnSigna ImpliedDisconnect FACT IntelliMAX FACT Quiet Series Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production ISOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerEdge PowerSaver PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect µserdes SILENT SWITCHER SMART START SPM Stealth SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TINYOPTO TruTranslation UHC UltraFET UniFET VCX Wire This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. FHP33, FHP323, FHP343 Single, Dual, and Quad, High Speed, 2.7V to 2V, Rail-to-Rail Amplifiers Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I Fairchild Semiconductor Corporation