APW7251/A. Pin Configuration. Applications. Simplified Application Circuit. Boost and Dual LDOs with POK

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1 Boost and Dual LDOs with POK Features General Description Wide Input Voltage from V to 5.5V Built-in Soft-start Boost Converter Fixed Output Voltage: APW75:.5V APW75A:.V <ua Quiescent Current During Shutdown Boost Converter in PFM Mode Internal Switch Current Limit : 5 ma High Efficiency at.v to 8V/mA Dual LDOs With POK High PSRR: 7dB at KHz Low Dropout Voltage: - 45mV at 5mA (LDO_.8V) - mv at 5mA (LDO_.V) - mv at 5mA (LDO_.V_APW75A) xmm TQFN- Packages Lead Free and Green Devices Available (RoHS Compliant) The APW75 contains a PWM Boost converter, a.8v linear regulator and a.v linear regulator. The PWM boost converter is a high frequency step-up DC/DC converter. Its output voltage is set by an internal feedback divider at.5v and.v. The regulator is a P-channel low dropout linear regulator with POK which needs only one input voltage from to 5. 5V, and delivers current up to ma to set output voltage. Typical dropout voltage is 45mV at 5mA loading for. 8V output, and mv at 5mA loading for.v output. The APW75 has power-on-reset and soft start functions to prevent wrong operation and limit the surge current during power-on or start-up. It also has thermal shutdown function to protect the device against overtemperature. Pin Configuration Applications Touch Panel POK GND VOUT Simplified Application Circuit LDO 9 PGND VIN_L Bottom GNDView 8 LX VIN_P VIN_L EN_PWM LX VOUT LDO VIN_P EN_LDO LDO PGND POK LDO GND EN_LDO EN_PWM GND ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Rev. A.5 - Jan., 8

2 Ordering and Marking Information Assembly Material Handling Code Temperature Range Package Code Package Code QB : TQFN x- Operating Ambient Temperature Range I : -4 to 85 o C Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device APW75 QB: 75 X X- Date Code APW75A QB: W5A X X- Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and % matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-D for MSL classification at lead-free peak reflow temperature. ANPEC defines Green to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 9ppm by weight in homogeneous material and total of Br and Cl does not exceed 5ppm by weight). Absolute Maximum Ratings (Note ) Symbol Parameter Rating Unit V IN VIN to GND Voltage -. ~ 6 V V SW >ns -. ~ V IN+. V SW to GND Voltage <ns ~ 8 V EN, POK,Vout to GND Voltage -. ~ 7 V T J Maximum Junction Temperature -4 ~ 5 T STG Storage Temperature Range -65 ~ 5 T SDR Maximum Lead Soldering Temperature ( Seconds) 6 Note: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability o C o C o C Thermal Characteristics Symbol Parameter Typical Value Unit θ JA Junction-to-Ambient Resistance in free air o C/W TQFNx- 65 Note : θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. Rev. A.5 - Jan., 8

3 Recommended Operating Conditions (Note ) Symbol Parameter Range Unit V INP/L VINP/L to GND Voltage ~ 5.5 V C IN Input Capacitor. µf C OUT Output Capacitor. ~ 4.7 µf C LDO, C LDO LDO, LDO Output Capacitor µf L Inductor ~ µh T A Ambient Temperature -4 ~ 85 T J Junction Temperature -4 ~ 5 o C o C Note : Refer to the typical application circuit. Electrical Characteristics Unless otherwise specified, these specifications apply over V IN_P/L =5V. Typical values are at T A =5 o C. APW75A Symbol Parameter Test Conditions Unit Min Typ Max SUPPLY CURRENT V IN_P/L Input Voltage Range TA = -4 ~ 85 C, T J = -4 ~ 5 C V I PWMDC V EN_PWM = 5V - - ma I PWMSD Input DC Bias Current V EN_PWM=V - ua I LDODC V EN_LDO = 5V - 5 µa I LDOSD V EN_LDO=V -. µa UNDER-VOLTAGE LOCKOUT UVLO Threshold Voltage V IN_P/L Rising..5.9 V UVLO Hysteresis Voltage - - mv SOFT START AND SHUTDOWN T SS Soft Start Time V OUT rising from to 9%, R LOAD =5Ω µs V TEN_PWM EN_PWM Voltage Threshold V EN_PWM Rising.4.7 V EN_PWM Voltage Hysteresis -. - V V TEN_LDO EN_LDO Input Logic HIGH.4.7 V EN_LDO Voltage Hysteresis -. - V I LEN_PWM EN_PWM Leakage Current V IN = 5V, V EN_PWM = 5V - - µa I LEN_LDO EN_LDO Leakage Current V IN = 5V, V EN_LDO = 5V - - µa OVER TEMPERATURE PROTECTION Over Temperature Threshold C Over Temperature Hysteresis C POWER OK AND DELAY Rising POK Threshold Voltage V LDO rising V Rising POK Threshold Voltage Hysteresis V LDO falling - - mv POK Low to High Delay Time ms POK Output LOW Voltage POK sink 5mA V Rev. A.5 - Jan., 8

4 Electrical Characteristics Unless otherwise specified, these specifications apply over V IN_P/L =5V. Typical values are at T A =5 o C. Symbol Parameter Test Conditions PWM APW75A Min Typ Max Unit R ON Power Switch On Resistance Ω LX Minimum Off Time ns I LIM Power Switch Current Limit... A LX Leakage Current V EN_PWM = GND, V EN_LDO = GND - - µa Boost Converter Output Voltage Boost Converter Output Voltage Accucacy T A = 5 C, APW V T A = 5 C, APW75A -. - V T A = 5 C % F SW Switching Frequency khz LDO REGULATOR Output Voltage Accuracy I LDO/ =ma to 5mA, T A= -4 ~ 85 C % V LDO LDO Output Voltage V V LDO LDO Output Voltage -. - V LDO Output Voltage APW75A -. - V Line Regulation I LDO/ =ma, V IN_P/L=V LDO/+.V to 5.5V, or V IN_P/L=.5V to 5.5V - -. %/V Load Regulation I LDO/=mA to 5mA % V DROP V LDO Dropout Voltage I LDO=5mA mv V DROP V LDO Dropout Voltage I LDO=5mA - - mv PSRR Power Supply Rejection Ratio I LDO/=5mA, C LDO/ =µf f=khz f=khz f=khz db Output Noise I LDO/=mA, BW= to khz, C LDO/=µF - - µv RMS V LDO/ Discharge Resistance V EN_LDO=V - - KΩ I LIMIT LDO Current limit Threshold 5 - ma LDO Current limit Threshold ma I SHORT Short Circuit Output Current ma Rev. A.5 - Jan., 8 4

5 Pin Description TDFNx- NAME FUNCTION LDO Regulator output pin. Output Voltage is.v VIN_L Supply voltage pin. LDO Regulator output pin. Output Voltage is.8v 4 EN_LDO 5 EN_PWM Enable control pin. Pulling this pin to ground forces the device into shutdown mode reducing the supply current to less than µa. This pin should not be left floating. Enable control pin. Pulling this pin to ground forces the device into shutdown mode reducing the supply current to less than µa. This pin should not be left floating. 6, GND Signal Ground. Connecting this pin to PGND. 7 VIN_P Supply voltage pin. 8 LX Switch Pin. Connect this pin to inductor/diode here. 9 PGND VOUT POK Power Ground of the Low-Side Gate Driver. Use a separate track to connect this pin to Source of the low-side MOSFET. The Source of the low-side MOSFET must be connected to system ground with very low impedance. Connecting this pin to GND. Output Sense Pin. An internal divider sets the output voltage of boost converter at.5v. Connect the output of the boost converter to VOUT pin to form a feedback loop. Power Good Output. Connecting a resistor to supply voltage pin. This pin should not be left floating. Rev. A.5 - Jan., 8 5

6 Typical Operating Characteristics PWM Quiescent Current (ma) PWM Quiescent Current vs. VINP PWM Quiescent Current (ma) PWM Quiescent Current vs. Temperature V INP =5V VINP (V) Temperature ( o C) 5 LDO Quiescent Current vs. VINL LDO Quiescent Current vs. Temperature V INL=5V LDO Quiescent Current (µa) 4 LDO Quiescent Current (µa) VINL (V) Temperature ( o C) 4 PWM Output Voltage vs. VINP 6 PWM Output Voltage vs. Temperature PWM Output Voltage (V) PWM Output Voltage (V) 8 4 V INP =5V VINP (V) Temperature ( o C) Rev. A.5 - Jan., 8 6

7 Typical Operating Characteristics LDO Output Voltage vs. VINL V INL=5V LDO Output Voltage vs. Temperature LDO Output Voltage (V) LDO Output Voltage (V) VINL (V) Temperature ( o C).5 LDO Output Voltage vs. VINL 4 LDO Output Voltage vs. Temperature LDO Output Voltage (V) LDO Output Voltage (V) V INL=5V VINL (V) Temperature ( o C) 6 LDO Dropout Voltage vs. Output Current Dropout Voltage (mv) Output Current (ma) Rev. A.5 - Jan., 8 7

8 Operating Waveforms PWM Power On PWM Power Off V IN V IN V OUT V OUT C IN =4.7µF,C OUT =.µf CH:V IN,V/Div, DC CH:V OUT,5V/Div, DC TIME:4ms/Div C IN=4.7µF,C OUT=.µF CH:V IN,V/Div, DC CH:V OUT,5V/Div, DC TIME:4ms/Div PWM Enable Response PWM Disable Response V EN V EN V OUT V OUT C IN =4.7µF,C OUT =.µf CH:V EN,V/Div, DC CH:V OUT,5V/Div, DC TIME:ms/Div C IN =4.7µF,C OUT =.µf CH:V EN,V/Div, DC CH:V OUT,5V/Div, DC TIME:ms/Div Rev. A.5 - Jan., 8 8

9 Operating Waveforms LDO Power On LDO Power Off V IN V IN V LDO V LDO V LDO V LDO C IN =µf,c LDO =.µf,c LDO =.µf CH:V IN,V/Div, DC CH:V LDO,V/Div, DC CH:V LDO,V/Div, DC TIME:4ms/Div C IN =µf,c LDO =.µf,c LDO =.µf CH:V IN,V/Div, DC CH:V LDO,V/Div, DC CH:V LDO,V/Div, DC TIME:ms/Div LDO Enable Response LDO Disable Response V EN V EN V LDO V LDO V LDO V LDO C IN =µf,c LDO =.µf,c LDO =.µf CH:V EN,V/Div, DC CH:V LDO,V/Div, DC CH:V LDO,V/Div, DC TIME:ms/Div C IN =µf,c LDO =.µf,c LDO =.µf CH:V EN,V/Div, DC CH:V LDO,V/Div, DC CH:V LDO,V/Div, DC TIME:ms/Div Rev. A.5 - Jan., 8 9

10 Operating Waveforms LDO Load Transient Response LDO Load Transient Response V LDO V LDO I LDO I LDO C IN =µf,c LDO =.µf I LDO =ma to ma to ma CH:V LDO,5mV/Div, DC,Offset=.8V CH:I LDO,5mA/Div, DC TIME:µs/Div C IN =µf,c LDO =.µf I LDO =ma to ma to ma CH:V LDO,5mV/Div, DC,Offset=.V CH:I LDO,5mA/Div, DC TIME:µs/Div Rev. A.5 - Jan., 8

11 Block Diagram 7 VIN_L VIN_P EN_LDO EN_PWM 4 5 UVLO & Shutdown Logic Thermal Shutdown Current Limit Foldback Current Limit Current Limit Foldback Current Limit LDO LDO V REF VOUT Min Off time 8 LX V REF Max On time Control Logic Gate Driver Current Limit 9 PGND POK Soft Start GND,6 Rev. A.5 - Jan., 8

12 Typical Application Circuit V IN_P L µh D V PWM.5V(APW5).V(APW75A) V IN_L C IN µf 6.V C IN 4.7µF 6.V VIN_P LX VIN_L VOUT ON OFF OFF EN_PWM ON EN_LDO POK V LDO.8V.V LDO LDO C LDO.µF 6.V PGND GND V LDO C LDO.µF 6.V V IN.kΩ C OUT.µF 5V Rev. A.5 - Jan., 8

13 Function Description Under Voltage Lockout Transients cause system damage or failure when powering on or undergoing instantaneous glitches in the supply voltage. Then, the under voltage lockout circuit turns the main switch off to prevent malfunction at low input voltage. Soft-Start The APW75 limits this inrush current by increasing the current limit at start-up. The soft-start time is programmed by the internal circuit. The soft star time is ms for PWM, 6us for LDO. Shutdown Driving EN_PWM and EN_LDO to ground places the APW75 in shutdown. When in shutdown, the internal power MOSFET turns off, all internal circuitry shuts down and the quiescent supply current of VIN reduces to <µa PWM Main Control Loop The APW75 operates in a PFM scheme. The operation can be understood by referring to the Block Diagram. The converter keeps monitoring the output voltage through the internal resistor-divider connected with VOUT. The switch turns off if the inductor current reaches the internal peak current limit. The second criterion that turns off the switch is the maximum on-time control. As the switch is off, the external Schottky diode forwards bias, so that the current is delivered to the output. The switch remains off for a minimum off time, and it wouldn t be turned on again until the feedback voltage drops below the reference voltage. This regulation scheme allows a wider selection range for the inductor and output capacitor. Current-Limit with Current Foldback Thermal Shutdown A thermal shutdown circuit limits the junction temperature of APW75. When the junction temperature exceeds +5 o C, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 4 o C. The thermal shutdown is designed with a 4 o C hysteresis to lower the average junction temperature during continuous thermal overload conditions, extending lifetime of the device. For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 5 o C. POK Indicator The POK is used to indicate the status of the V LDO. When V LDO >.6V, POK rise after 8ms delay time, If V LDO <.6V, POK pulls low after 8ms delay time. This pin should not be floating. Power Sequence The power sequence of APW75 is shown as below diagram. EN_PWM VPWM_.5V EN_LDO VLDO_.8V 4ms.6V VLDO_.V 8ms 8ms POK The regulator monitors the current via the output PMOS and limits the maximum current. When the output current reaches the current-limit threshold, current-limit with current foldback circuit starts to work to prevent load and regulator from damages during overload or short-circuit conditions. Typical foldback current is about 5mA. Rev. A.5 - Jan., 8

14 Package Information TQFNx- D A PIN b D Pin Corner e E L K A A NX aaa c SEATING PLANE S Y M MILLIMETERS B O L MIN. MAX. A A A b D D E E e L REF..5.5 TQFNx- MIN..8. INCHES.8 REF MAX BSC.6 BSC K aaa.8. Rev. A.5 - Jan., 8 4

15 Carrier Tape & Reel Dimensions OD P P P A E OD B A T B W F K B A SECTION A-A SECTION B-B d H A T Application A H T C d D W E F TQFNx 78.±. 5 MIN MIN.. MIN. 8.±..75±..5±.5 P P P D D T A B K 4.±. 4.±..± MIN ±..5±..±. (mm) Devices Per Unit Package Type Unit Quantity TQFNx Tape & Reel Rev. A.5 - Jan., 8 5

16 Taping Direction Information TQFNx USER DIRECTION OF FEED Classification Profile Rev. A.5 - Jan., 8 6

17 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Preheat & Soak Temperature min (T smin) Temperature max (T smax) Time (T smin to T smax) (t s) C 5 C 6- seconds 5 C C 6- seconds Average ramp-up rate (T smax to T P) C/second max. C/second max. Liquidous temperature (T L) Time at liquidous (t L) Peak package body Temperature (T p)* Time (t P)** within 5 C of the specified classification temperature (T c) 8 C 6-5 seconds 7 C 6-5 seconds See Classification Temp in table See Classification Temp in table ** seconds ** seconds Average ramp-down rate (T p to T smax) 6 C/second max. 6 C/second max. Time 5 C to peak temperature 6 minutes max. 8 minutes max. * Tolerance for peak profile Temperature (T p) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (t p) is defined as a supplier minimum and a user maximum. Table. SnPb Eutectic Process Classification Temperatures (Tc) Package Thickness Volume mm <5 Volume mm 5 <.5 mm 5 C C.5 mm C C Table. Pb-free Process Classification Temperatures (Tc) Package Thickness Volume mm <5 Volume mm 5- Volume mm > <.6 mm 6 C 6 C 6 C.6 mm.5 mm 6 C 5 C 45 C.5 mm 5 C 45 C 45 C Reliability Test Program Test item Method Description SOLDERABILITY JESD-, B 5 Sec, 45 C HOLT JESD-, A8 Hrs, Tj=5 C PCT JESD-, A 68 Hrs, %RH, atm, C TCT JESD-, A4 5 Cycles, -65 C~5 C HBM MIL-STD VHBM KV MM JESD-, A5 VMM V Latch-Up JESD 78 ms, tr ma Rev. A.5 - Jan., 8 7

18 Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : Fax : Taipei Branch : F, No., Lane 8, Sec Jhongsing Rd., Sindian City, Taipei County 46, Taiwan Tel : Fax : Rev. A.5 - Jan., 8 8