Package Code. Temperature Range. I : -40 to 85 C. Handling Code. TR : Tape & Reel. Assembly Material

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1 Single Step-up DC/DC Controller Features General Description 2.5 to 5.5V Input Voltage Range Adjustable Frequency: Maximum 1MHZ Incorporates Soft-Start Function Built-in Short-Circuit Detection Circuit (SCP) Low Operating Current: Maximum to 1mA Low Shutdown Current: Maximum to 1mA Package: SOP-8, MSOP-8, and TSSOP-8 Under-Voltage Lockout Lead Free and Green Devices Available (RoHS Compliant) Applications LCD Display Power Source Camcorders VCRs, MP3, and Digital Still Camera Hand-held and Communication Instruments PDAs Ordering and Marking Information APW7078 APW7078 K : APW7078 XXXXX Assembly Material Handling Code Temperature Range Package Code The APW7078 is a single PWM, step-up DC-DC controller with low operating voltage application integrating softstart and short circuit detection function. The oscillator switching frequency on chip can be operated by terminating OSC pin to connect capacitor and resistor for adjustable operating frequency. Soft-start is adjusted with the external capacitor, which sets the input current ramp. Besides, the external compensation FB pin will apply the flexibility in the dynamic loop status, which allows using small and low equivalent series resistance (ESR) ceramic output capacitors. Pin Configuration INV SCP VDD CTL APW FB OSC GND OUT Package Code K : SOP - 8 X : MSOP - 8 O : TSSOP-8 Temperature Range I : -40 to 85 C Handling Code TR : Tape & Reel Assembly Material L : Lead Free Device G : Halogen and Lead Free Device XXXXX - Date Code APW7078 X : W7078 XXX XX XXXXX - Date Code APW7078 O : APW7078 XXXXX XXXXX - Date Code Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines Green to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. 1

2 Absolute Maximum Ratings Symbol Parameter Rating Unit V DD Supply Voltage -0.3 to 7 V V IO Input / Output Pins -0.3 to 7 V T A Operating Ambient Temperature Range -40 to 85 C T J Junction Temperature Range -40 to 150 C T STG Storage Temperature Range -65 to +150 C T SDR Maximum Lead Soldering Temperature, 10 Seconds 260 C Recommended Operating Conditions Symbol Parameter Rating Min. Typ. Max. Unit V DD Supply Voltage V V INV Error Amplifier Invert Input Voltage V V CTL Control Pin Input Voltage V DD V C SCP SCP Pin Capacitor µf R T Timing Resistance kω C T Timing Capacitor pf F SW Oscillator Frequency khz Electrical Characteristics (T A = 25 C, V DD = 3.3V, unless otherwise specified) APW7078 Symbol Parameter Test Conditions ENTIRE DEVICE Min. Typ. Max. Unit V DD Supply Voltage V I DD Supply Current V DD=2.5V to 5.5V ma I SD Shutdown Current CTL pin open or VDD µa D MAX Maximum Duty Cycle R T =3.3K, C T =270pF % UNDER-VOLTAGE LOCKOUT PROTECTION V TH VDD Startup Threshold Voltage V - Hysteresis voltage mv V R SOFT-START V SS Voltage at Soft-Start Completion V I CS Soft-Start Charge Current V SCP =0V µa 2

3 Electrical Characteristics (Cont.) (T A = 25 C, V DD = 3.3V, unless otherwise specified) APW7078 Symbol Parameter Test Conditions SOFT-START Min. Typ. Max. Unit V SS Voltage at Soft-Start Completion V I CS Soft-Start Charge Current V SCP =0V µa SHORT CIRCUIT PROTECTION (SCP) V SCP Threshold Voltage V I SCP Charge Current V SCP =0V µa SAWTOOTH WAVEFORM OSCILLATOR (OSC) F OSC Oscillator Frequency R T =3.3kΩ, C T =270pF khz F DV Frequency Stability for Voltage V DD=2.5V to 5.5V % F DT ERROR AMPLIFIER Frequency Stability for Temperature T A=-40 C to 85 C % V REF Reference Voltage V FB=INV V V REF Stability V DD=2.5V to 5.5V mv V REF Variation with Temperature T A =-40 C to 85 C % gm Transconductance µa/v I B Input Bias Current INV=0V µa V OH V Output Voltage Range V V OL Output Source Current INV=0V,FB=0.5V µa Output Sink Current INV=1V,FB=0.5V µa PWM CONTROLLER DRIVER I SOURCE Output Source Current Duty<5%, OUT=0V ma I SINK Output Sink Current Duty>5%, OUT=5V ma CONTROL BLOCK V IL Active mode V DD Control Voltage Switch-off mode 0.8V DD - - V IH 3

4 Pin Description PIN NO. SYMBOL I/O FUNCTION 1 INV I Internal 0.5V reference voltage. Use a resistor divider to set the output voltage. 2 SCP - Soft-start and short-circuit detection, connects a capacitor from the pin to ground. 3 VDD - Power supply input pin for IC voltage. 4 CTL I Output control pin. Low = operating mode; High = shutdown mode. 5 OUT O External MOSFET driving pin. 6 GND - Ground pins of the IC. 7 OSC - Setting capacitor and resister to provide oscillation switching frequency adjustment. 8 FB O Error amplifier output pin. Setting circuit for IC compensation. Block Diagram VDD OSC UVLO 0.9 V 0.16 V 0.1 V Sawtooth wave oscillator V DD V DD INV Error Amp. - + V REF 0.5V PWM Comp. Output drive circuit OUT FB DTC 0.8V Soft start SCP GND SCP CTL 4

5 Application Schematic V IN 2.5V~4.2V L1 D1 V OUT C1 22µF C2 C7 1µF Q2 2N7002 R1 390K R2 91K 1 INV 2 SCP 3 VDD 4 CTL Cp 820K 33pF R3 FB OSC GND OUT C3 270pF R4 3.3K 10µH R5 1K C4 SS12 Q1 APM2300A Figure 1: APW7078 Step-up Application for Adjustable Voltage C5 47µF 5V 300mA C6 *R2 100kΩ is recommended V IN 2.5V~5.5V L1 D1 V OUT C1 22µF C2 C8 1µF R6 2R2 R1 390K 1 INV 2 SCP 3 VDD 4 CTL R3 FB 8 OSC 7 GND 6 OUT 5 C3 270pF R5 2K R4 4.3K 10µH C4 SS12 Q1 APM2300A C5 33µF 9V 100mA C6 Q2 2N7002 R2 9.1K 150K Cp 68pF Figure 2: APW7078 Step-up Application for Adjustable Voltage 5

6 Application Schematic 26V D2 C10-9V C8 1µF C9 1µF D3 0.1uF C11 C12 1µF D4 C13 3.3µF V IN 3V~3.6V L1 D1 9V C1 22µF C2 C7 1µF R6 2R2 R10 390K 1 INV 2 SCP 3 VDD 4 CTL R3 FB 8 OSC 7 GND 6 OUT 5 C3 270pF 22µH R5 1K R4 3.3K C4 SS12 Q1 APM2300A C5 100µF C6 R2 75K 1.2M Q2 2N7002 Figure 3. APW7078 Multiple-output for TFT LCD Panel Power 6

7 Timing Diagram FB input voltage Short cirucit detect comparator Sawtooth wave output Soft-start setting voltage Output pin waveform SCP detect voltage SCP pin waveform ON Power supply control SW OFF ts Soft start Output short circuit tscp Output short circuit Output short circuit detection 7

8 Typical Operating Characteristics (T A = 25 C, V DD = 3.3V, unless otherwise specified) Supply Current vs. Supply Voltage SHDN and Release Supply Current(µA) Maximum Duty(%) TA=25 C RT=3.3kΩ CT=270pF Supply Voltage(V) CH1=V OUT 2V/DIV TIME=20ms/DIV CH2=V CTL 2V/DIV CH3=V SS 0.5V/DIV CH4=I L 1A/DIV Reference Voltage vs. Supply Voltage Reference Voltage vs. Temperature Reference Voltage(mV) TA=25 C Reference Voltage(V) VDD=3.3V Supply Voltage(V) Temperature( C) 8

9 Typical Operating Characteristics (Cont.) (T A = 25 C, V DD = 3.3V, unless otherwise specified) Oscillator Frequency vs. Timing Resistor Maximum Duty vs. Oscillator Frequency Oscillator Frequency(kHz) CT=270pF CT=100pF Maximum Duty(%) CT=270pF CT=200pF CT=100pF Timing Resistor(kΩ) Oscillator Frequency(kHz) Power on and off under light load Power on and off under heavy load I OUT = 5mA, TIME=40ms/DIV CH1=V OUT 5VDIV CH2=V OUT =V DD 2V/DIV CH3=I L 0.5A/DIV CH4=V SS 1V/DIV I OUT = 400mA, TIME=40ms/DIV CH1=V OUT 5VDIV CH2=V OUT =V DD 2V/DIV CH3=I L 0.5A/DIV CH4=V SS 1V/DIV 9

10 Typical Operating Characteristics (Cont.) (T = 25 C, V A = 3.3V, unless otherwise specified) DD Efficiency Efficiency V DD =2.5V V DD =3.3V 80 V DD =3.3V 90 Efficiency(%) V DD =5V Efficiency(%) V DD =3.6V VOUT=9V L=10µH CT=270pF RT=4.3K VOUT=5V L=10µH 65 CT=270pF RT=3.3K Output Current(mA) Output Current(mA) Frequency Variation Ratio vs. Supply Voltage Frequency Variation Ratio vs. Temperature Frequency Variation Ration f/f(%) TA=25 C RT=3.3kΩ CT=270pF Frequency Variation Ration f/f(%) CT=270pF RT=3.3kΩ Supply Voltage(V) Temperature( C) 10

11 Function Description Setting Oscillating Frequency The oscillator circuit generates a triangular sawtooth wave with a peak of 0.9V and through 0.16V using the timing capacitor (C T ) and the timing resistor (R T ) that are connected to OSC pin. This oscillator can provide oscillating frequency up to 1MHz. Vosc VH V(t) VL 0.9V 0.16V t1 t2 t Time V i = c t 0.9V 0.16V t 2mA t 1 = CT = 370 CT V(t) = V e 2 = R C T = t + t 1 T H T 2 ln t RTCT ( V / V ) H = 1.72 R C = C ( R ) T L Setting Output Voltage The output voltage is set using the INV pin and a resistor divider connected to the output is shown in the Typical Operating Circuit. The internal reference voltage is 0.5V with 2% variation, so the ratio of the feedback resistors sets the output voltage according to the following equation: R3 V OUT = V R2 To avoid the thermal noise from feedback resistor, the resistance R2 is smaller than 100kΩ and 1% variation is recommended. Error Amplifier The error amplifier detects the output voltage of the switching regulator and outputs the PWM control signal. The T T T voltage gain is fixed, and connecting a phase compensation resistor and capacitor to the FB pin (pin 8) provides stable phase compensation for the system. PWM Comparator The voltage comparator has one inverting and three noninverting inputs. The comparator is a voltage/pulse width converter that controls the ON time of the output pulse depending on the input voltage. The output level is high (H) when the sawtooth wave is lower than the error amplifier output voltage, soft-start setting voltage, and idle period setting voltage. Output Circuit The output circuit is a typical push-pull configuration to drive an external NMOS transistor directly. It can provide a 200mA source/sink to/from OUT (pin 5). Soft-Start and Short Circuit Detection Soft-start operation is set by connecting capacitor C SCP to the SCP pin (pin 2). Soft-start prevents a current spike on start-up. On completion of the soft-start operation, the SCP pin (pin 2) stays low and enters the short circuit detection wait state.when an output short circuit occurs, the error amplifier output is fixed at 1.8V and capacitor C SCP starts charging. After charging to approximately 0.8 V, the output pin (pin 5) is set low and the SCP pin stays low. Once the protection circuit operates, the circuit can be restored by resetting the power supply. Short circuit detection time can be calculate as below: t SCP = 0.8 CSCP( µ F) Under-Voltage Lock Out (UVLO) Transients during powering on or instantaneous glitches in the supply voltage can cause system damage or failure. The circuit prevents malfunction at low input voltage detects a low input voltage by comparing the supply voltage with the internal reference voltage. On detection, the circuit fixes the output pin to low. The system recovers when the supply voltage rises back above the threshold voltage of the malfunction prevention circuit. 11

12 Function Description (Cont.) Layout Consideration Top Layer Switching Noise Decoupling Capacitor A ceramic capacitor should be placed close to the VOUT pin and the GND pin of the chip to filter the switching spikes in the output voltage monitored by the VOUT pin. Feedback Network In APW7078 application, the feedback networks should be connected directly to a dedicated analog ground plane and this ground plane must connect to the GND pin. If no analog ground plane is available, and then this ground must tie directly to the GND pin. The feedback network, resistors R2 and R3, should be kept close to the FB pin, and away from the inductor. Input Capacitor The input capacitor CIN in VIN must be placed close to the IC. This will reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 1µF capacitor can be placed in parallel with C IN, close to the VDD pin, to shunt any high frequency noise to the ground. Bottom Layer Demo Board Circuit Layout Inductor To minimize copper trace connections that can inject noise into the system, the inductor, switch, and schottky diode should be placed as close as possible to minimize the noise coupling into other circuits. Output Capacitor The output capacitor, C OUT, should be placed close to the diode and output terminals to obtain better smoothing effect on the output ripple. Any copper trace connections for the C OUT capacitor can increase the series resistance, which directly effects output voltage ripple and efficiency. Ground Plane One point grounding should be used for the output power return ground, the input power return to the ground and the device switches the ground to reduce noise. The input ground and output ground traces must be thick enough for current to flow through and for reducing the ground bounce. 12

13 Package Information SOP-8 D SEE VIEW A E1 E h X 45 e b c A1 A2 A VIEW A L 0.25 GAUGE PLANE SEATING PLANE S Y M SOP-8 B O L MIN. MAX. MIN. A 1.75 A MAX A b c D E E e 1.27 BSC BSC h L MILLIMETERS INCHES Note: 1. Follow JEDEC MS-012 AA. 2. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension E does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 13

14 Package Information MSOP-8 D SEE VIEW A A1 A 0.25 E1 E e b c A2 L 0 GAUGE PLANE SEATING PLANE S Y M MILLIMETERS B O L MIN. MAX. A A A b c D E E1 e L BSC MSOP-8 VIEW A MIN INCHES BSC MAX Note: 1. Follow JEDEC MO-187 AA. 2. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension E1 does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 5 mil per side. 14

15 Package Information TSSOP-8 D SEE VIEW A E1 E e b C A2 A 0.25 A1 L S Y M TSSOP-8 MILLIMETERS A B O L MIN. MAX. INCHES 1.20 MIN. MAX A1 A b c D E E1 e L BSC Note : 1. Follow JEDEC MO-153 AA 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not BSC exceed 6 mil per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 15

16 Carrier Tape & Reel Dimensions OD0 P0 P2 P1 A E1 OD1 B A T B0 W F K0 B A0 SECTION A-A SECTION B-B d H A Application A H T1 C d D W E1 F SOP MIN MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN Application A H T1 C d D W E1 F MSOP MIN MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN Application A H T1 C d D W E1 F TSSOP MIN. T MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN (mm) 16

17 Devices Per Unit Package Type Unit Quantity SOP-8 Tape & Reel 2500 MSOP- 8 Tape & Reel 3000 TSSOP-8 Tape & Reel 2500 Taping Direction Information SOP-8 USER DIRECTION OF FEED MSOP-8 USER DIRECTION OF FEED 17

18 Taping Direction Information TSSOP-8 USER DIRECTION OF FEED Reflow Condition (IR/Convection or VPR Reflow) T P Ramp-up tp Critical Zone T L to T P T L Temperature Tsmax Tsmin t L Ramp-down ts Preheat 25 t 25 C to Peak Time Reliability Test Program Test item Method Description SOLDERABILITY MIL-STD-883D C, 5 sec HOLT MIL-STD-883D Hrs C PCT JESD-22-B, A Hrs, 100%RH, 121 C TST MIL-STD-883D C~150 C, 200 Cycles ESD MIL-STD-883D VHBM > 2KV, VMM > 200V Latch-Up JESD 78 10ms, 1 tr > 100mA 18

19 Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Average ramp-up rate (T L to T P) 3 C/second max. 3 C/second max. Preheat 100 C 150 C - Temperature Min (Tsmin) 150 C 200 C - Temperature Max (Tsmax) seconds seconds - Time (min to max) (ts) Time maintained above: - Temperature (T L) - Time (t L) 183 C seconds 217 C seconds Peak/Classification Temperature (Tp) See table 1 See table 2 Time within 5 C of actual Peak Temperature (tp) seconds seconds Ramp-down Rate 6 C/second max. 6 C/second max. Time 25 C to Peak Temperature 6 minutes max. 8 minutes max. Notes: All temperatures refer to topside of the package. Measured on the body surface. Table 1. SnPb Eutectic Process Package Peak Reflow Temperatures Package Thickness Volume mm 3 Volume mm <350 <2.5 mm /-5 C /-5 C 2.5 mm /-5 C /-5 C Table 2. Pb-free Process Package Classification Reflow Temperatures Package Thickness Volume mm 3 <350 Volume mm Volume mm 3 >2000 <1.6 mm C* C* C* 1.6 mm 2.5 mm C* C* C* 2.5 mm C* C* C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0 C. For example 260 C+0 C) at the rated MSL level. Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : Fax : Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : Fax :

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