Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator V IN. Enable VIN 1 GND 2 SHDN 3

Transcription

1 Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator Features General Description Wide Operating Voltage: 2.5~6V Low Dropout Voltage: Fixed Output Voltages: 1.2~3.6V with Step 100mV, and 2.85V Guaranteed 300mA Output Current High PSRR: 70dB Current-Limit Protection Controlled Short Circuit Current: 50mA Over-Temperature Protection Stable with 1mF Capacitor for Any Load Excellent Load/Line Transient SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages Lead Free and Green Devices Available (RoHS Compliant) The APL5320 is a P-channel low dropout linear regulator which needs only one input voltage from 2.5 to 6V, and delivers current up to 300mA to set output voltage. It also can work with low ESR ceramic capacitors and is ideal for using in the battery-powered applications such as notebook computers and cellular phones. Typical dropout voltage is only 290mV at 300mA loading. The APL5320 provides several versions of fixed output voltages ranging from 1.2 to 3.6V with step 100mV and 2.85V. Current limit with current foldback and thermal shutdown functions protects the device against current overloads and over temperature. The APL5320 is available in SOT-23-5, SC-70-5, VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages. Simplified Application Circuit Applications Cellular Phones Portable and Battery-Powered Equipments Laptops, Palmtops, Notebook Computers Wireless LANs Portable Information Appliances GPSes Enable Pin Configuration VIN 1 GND 2 SHDN 3 VIN SHDN GND 5 VOUT 4 NC VOUT SHDN 1 6 GND NC 2 5 NC VIN 3 4 VOUT SOT23-5/SC-70-5 (Top View) TDFN1.6x1.6-6 (Top View) VOUT 1 4 VIN GND 2 VTDFN1.2x1.6-4 (Top View) 3 SHDN = Exposed Pad (connected to ground plane for better heat dissipation) ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. 1 This datasheet has been downloaded from at this page

2 Ordering and Marking Information APL5320 Assembly Material Handling Code Temperature Range Package Code Voltage Code Package Code B : SOT-23-5 S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4 Operating Ambient Temperature Range I : -40 to 85 o C Handling Code TR : Tape & Reel Voltage Code 12 : 1.2V 3.6 : 3.6V Assembly Material G : Halogen and Lead Free Device Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines Green to mean lead-free (RoHS compliant)and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight). SOT-23-5 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL B 205 APL B 207 APL B 208 APL B 209 APL B 20A APL B 20B APL B 20C APL B 20D APL B 20E APL B 20F APL B 20G APL B 20H APL B 20I APL B 20J APL B 20K APL B 20L APL B 20M APL B 20N APL B 20O APL B 20P APL B 20Q APL B 20R APL B 20S APL B 20T APL B 20g APL B 20d Note: - Code. SC-70-5 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL S5 205 AP S5 207 APL S5 208 APL S5 209 APL S5 20A APL S5 20B APL S5 20C APL S5 20D APL S5 20E APL S5 20F APL S5 20G APL S5 20H APL S5 20I APL S5 20J APL S5 20K APL S5 20L APL S5 20M APL S5 20N APL S5 20O APL S5 20P APL S5 20Q APL S5 20R APL S5 20S APL S5 20T APL S5 20g APL S5 20d TDFN1.6x1.6-6 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL QB APL QB APL QB APL QB A 20E 20I APL QB APL QB APL QB APL QB B 20F 20J APL QB APL QB APL QB APL QB C 20G 20K APL QB APL QB APL QB APL QB D 20H 20L 2

3 Ordering and Marking Information (Cont.) TDFN1.6x1.6-6 (Cont.) Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL QB 20M APL QB 20N APL QB 20O APL QB 20P APL QB 20Q APL QB 20R APL QB 20S APL QB 20T APL QB 20g APL QB 20d Note: - Code. VTDFN1.2x1.6-4 Product Name Marking Product Name Marking Product Name Marking Product Name Marking APL QF 05 APL QF 07 APL QF 08 APL QF 09 APL QF 0A APL QF 0B APL QF 0C APL QF 0D APL QF 0E APL QF 0F APL QF 0G APL QF 0H APL QF 0I APL QF 0J APL QF 0K APL QF 0L APL QF 0M APL QF 0N APL QF 0O APL QF 0P APL QF 0Q APL QF 0R APL QF 0S APL QF 0T APL QF 0g APL QF 0d Note : - Code. Absolute Maximum Ratings (Note 1) Symbol Parameter Rating Unit VIN to GND Voltage -0.3 ~ 6.5 V VOUT to GND Voltage -0.3 ~ 6.5 V V SHDN SHDN to GND Voltage -0.3 ~ 6.5 V T J Maximum Junction Temperature -40 ~ 150 T STG Storage Temperature -65 ~ 150 T SDR Maximum Lead Soldering Temperature, 10 Seconds 260 o C o C o C Note 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Characteristics Symbol Parameter Typical Value Unit (Note 2) Junction-to-Ambient Resistance in Free Air SOT θ JA SC o C/W TDFN1.6x VTDFN1.2x Note 2 : θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. 3

4 Recommended Operating Conditions (Note 3) Symbol Parameter Range Unit VIN Input Voltage 2.5 ~ 6 V V SHDN SHDN Input Voltage 2.5 ~ 6 V I OUT VOUT Output Current 0 ~300 ma Output Voltage Fixed Voltage C OUT Output Capacitor 1~22 µf T A Ambient Temperature -40 ~ 85 T J Junction Temperature -40 ~ 125 o C o C Note 3 : Refer to the typical application circuit Electrical Characteristics Unless otherwise specified, these specifications apply over = +1V, C IN =1µF and T A =-40~85 o C. Typical values are at T A =25 o C. Symbol Parameter Test Conditions UNDER-VOLTAGE LOCKAGE (UVLO) AND SUPPLY CURRENT APL5320 Min. Typ. Max. Unit VIN UVLO Threshold Voltage rising, T A=-40~85 o C V VIN UVLO Hysteresis V I Q Quiescent Current I OUT=0mA, V SHDN=5V µa I OUT=300mA V SHDN=5V µa I QSHDN Shut Down Supply Current V SHDN=0V, = +1V µa OUTPUT VOLTAGE Output Voltage Accuracy REG LINE Line Regulation REG LOAD Load Regulation V DROP Dropout Voltage I OUT=1mA, T A=25 o C -2-2 % I OUT=1mA to 300mA, T A=-40~85 o C -3-3 % VOUT%/ VIN, +0.3V<<6V, I OUT=1mA VOUT%, = +1V, 0mA<I OUT<300mA %/V % =1.5V, I OUT=300mA V =2V, I OUT=300mA V =3V, I OUT=300mA V PSRR Ripple Rejection C OUT=1µF, I OUT=50mA f=1khz db f=10khz db f=100khz db SHUT DOWN Output Noise f=10hz to 100kHz, C OUT=10µF, I OUT = 1mA µv RMS VOUT Discharge Resistance V SHDN=0V kω V SHDN High Threshold Voltage =2.5 to 6V V Low Threshold Voltage =2.5 to 6V V I SHDN SHDN Input Current V SHDN=5V µa 4

5 Electrical Characteristics (Cont.) Unless otherwise specified, these specifications apply over = +1V, C IN =1µF and T A =-40~85 o C. Typical values are at T A =25 o C. Symbol Parameter Test Conditions PROTECTIONS APL5320 Min. Typ. Max. Unit I LIMIT Current Limit Threshold ma I SHORT Short Circuit Current =0V ma t SS Soft-Start VOUT rising from 0 to 90%, R LOAD=50Ω µs TOTP Over-Temperature Threshold T J rising Over-Temperature Hysteresis o C o C 5

6 Typical Operating Characteristics Quiescent Current vs. Supply Voltage Quiescent Current vs. Temperature APL , =V EN =4.2V Quiescent Current (µa) Quiescent Current (µa) Supply Voltage (V) Temperature ( o C) PSRR vs. Frequency Dropout Voltage vs. Output Current PSRR (db) APL , =4V, C OUT =1µF, I OUT =50mA Dropout Voltage (mv) APL , C OUT =1µF T J =25 o C T J =125 o C T J =-40 o C k 10k 100k 1M Frequency (Hz) Output Noise Output Current (ma) Current Limit Threshold vs. Input Voltage Output Noise (µv) APL , I OUT =50mA, =V EN =4.2V(Battery) Current Limit (ma) Time (ms) Input Voltage (V) 6 6

7 Typical Operating Characteristics (Cont.) Current Limit Threshold vs. Temperature Quiescent Current vs. Output Current Current Limit (ma) Quiescent Current (µa) APL , C OUT =1µF, =V EN =4.2V Temperature ( o C) Output Current (ma) EN Pin Threshold (V) SHDN Pin Threshold Voltage vs. Supply Voltage SHDN Rising Threshold SHDN Falling Threshold Supply Voltage (V) 6 7

8 Operating Waveforms The test condition is =4.2V, T A = 25 o C unless otherwise specified. Load Transient Response Load Transient Response I OUT 2 I OUT =4.2V, =1.2V, C IN =1µF, =4.2V, =1.2V, C IN =1µF, I OUT =10mA to 300mA to 10mA ( µ I OUT =10mA to 150mA to 10mA ( µ CH1:, 50mV/Div, DC, Offset=1.2V CH1:, 50mV/Div, DC, Offset=1.2V CH2: I OUT, 200mA/Div, DC CH2: I OUT, 100mA/Div, DC TIME: 20µs/Div TIME: 20µs/Div Load Transient Response Line Transient Response I OUT =4.2V, =1.2V, C IN =1µF, I OUT =10mA to 50mA to 10mA ( µ CH1:, 20mV/Div, DC, Offset=1.2V CH2: I OUT, 50mA/Div, DC TIME: 20µs/Div =3.8V to 4.8V to 3.8V ( µ, =1.2V, C IN =1µF, I OUT =100mA CH1:, 500mV/Div, DC, Offset=3.8V CH2:, 20mV/Div, DC, Offset=1.2V TIME: 20µs/Div 8

9 Operating Waveforms (Cont.) The test condition is =4.2V, T A = 25 o C unless otherwise specified. Line Transient Response Line Transient Response =3.8V to 4.8V to 3.8V ( µ, =1.2V, C IN =1µF, I OUT =50mA CH1:, 500mV/Div, DC, Offset=3.8V CH2:, 20mV/Div, DC, Offset=1.2V TIME: 20µs/Div =3.8V to 4.8V to 3.8V ( µ, =1.2V, C IN =1µF, I OUT =10mA CH1:, 500mV/Div, DC, Offset=3.8V CH2:, 20mV/Div, DC, Offset=1.2V TIME: 20µs/Div Exiting Shutdown Entering Shutdown 1 V SHDN 1 V SHDN 2 2 =4.2V, =1.2V, C IN =1µF, I OUT =10mA CH1: V SHDN, 2V/Div, DC CH2:, 500mV/Div, DC TIME: 20µs/Div =4.2V, =1.2V, C IN =1µF, I OUT =10mA CH1: V SHDN, 2V/Div, DC CH2:, 500mV/Div, DC TIME: 10µs/Div 9

10 Pin Description PIN SOT-23-5/ SC-70-5 NO. TDFN 1.6x1.6-6 VTDFN 1.2x1.6-4 NAME VIN Voltage Supply Input Pin. FUNCTION GND Ground SHDN 4 2, 5 - NC NC Pin VOUT Regulator Output Pin. Shut Down Control Pin. Logic high: enable; logic low: shutdown. This pin can not be left floating. Block Diagram SHDN Thermal Shutdown Current Limit VIN VOUT V REF GND Typical Application Circuit VIN APL5320 VOUT C IN 1µF SHDN GND C OUT 1µF Enable Shutdown 10

11 Function Description Internal Soft-Start An internal soft-start function controls rising rate of the output voltage to limit the surge current at start-up. The typical soft-start interval is about 60µs. Thermal Shutdown A thermal shutdown circuit limits the junction temperature of APL5320. When the junction temperature exceeds +160 o C, a thermal sensor turns off the output PMOS, allowing the device to cool down. The regulator regulates the output again through initiation of a new soft-start cycle after the junction temperature cools by 40 o C.The thermal shutdown is designed with a 40 o C hysteresis to lower the average junction temperature during continuous thermal overload conditions, extending lifetime of the device. For normal operation, device power dissipation should be externally limited so that junction temperature will not exceed 125 o C. Current-Limit with Current Foldback The APL5320 monitors the current via the output PMOS and limits the maximum current. When the output current reaches the current limit threshold, current limit with current foldback circuit starts to work to prevent load and APL5320 from damages during overload or short-circuit conditions. Typical foldback current is about 50mA. Shutdown Control The APL5320 has an active-low shutdown function. Forcing SHDN high (>1.5V) enables the ; forcing SHDN low (<0.4V) disables the. The SHDN can not be left floating. If it is not used, connect it to VIN for normal operation. Under-Voltage Lock Out (UVLO) The APL5320 monitors the input voltage to prevent wrong logic control. The UVLO function initiates a soft-start process after input voltage exceeds its rising UVLO threshold during power on. The UVLO function also shuts off the output when the input voltage falls below it s falling threshold. 11

12 Application Information Input capacitor The APL5320 requires proper input capacitors to supply surge current during stepping load transients to prevent the input rail from dropping. Because the parasitic inductor from the voltage sources or other bulk capacitors to the VIN limit the slew rate of the surge current, place the Input capacitors near VIN as close as possible. Input capacitors should be larger than 1µF and a minimum ceramic capacitor of 1µF is necessary. Output Capacitor The APL5320 needs a proper output capacitor to maintain circuit stability and improve transient response over temperature and current. In order to insure the circuit stability, the proper output capacitor value should be larger than 1µF. With 5R and 7R dielectrics, 1µF is sufficient at all operating temperatures. Large output capacitor value can reduce noise and improve load-transient response and PSRR, Figure 1 shows the curves of allowable ESR range as the function of load current for various output capacitor values. Region of Stable C OUT ESR (Ω) Region of Stable C OUT ESR vs. Output Current Unstable Range Stable Range Simulation Verify Output Current (ma) APL =V EN =4.2V C IN =1µF/7R Figure1. Stable C OUT ESR Range Operation Region and Power Dissipation The APL5320 maximum power dissipation depends on the thermal resistance and temperature difference between the die junction and ambient air. The TDFN1.6x1.6-6 package power dissipation P D across the device is: P D = (T J - T A ) / θ JA where (T J - T A ) is the temperature difference between the junction and ambient air. θ JA is the thermal resistance between Junction and ambient air. Assuming the T A =25 o C and maximum T J =160 o C (typical thermal limit threshold), the maximum power dissipation is calculated as: P D (max)=(160-25)/165=0.81(w) For normal operation, do not exceed the maximum junction temperature rating of T J =125 o C. The calculated power dissipation should be less than: P D =(125-25)/165=0.6(W) The GND provides an electrical connection to the ground and channels heat away. Connect the GND to the ground by using a large pad or a ground plane. Layout Consideration Figure 2 illustrates the layout. Below is a checklist for your layout: 1. Please place the input capacitors close to the VIN. 2. Ceramic capacitors for load must be placed near the load as close as possible. 3. To place APL5320 and output capacitors near the load is good for performance. 4. Large current paths, the bold lines in figure 2, must have wide tracks. OFF ON VIN SHDN GND VOUT Figure2. Large Current Paths Shown as Bold Lines 12

13 Package Information SOT-23-5 D e SEE VIEW A e1 b c A2 A 0.25 A1 E1 E L 0 GAUGE PLANE SEATING PLANE VIEW A S Y M B O L A A1 A2 b c D E E1 e e1 L MIN MILLIMETERS 0.95 BSC 1.90 BSC MA SOT-23-5 MIN INCHES BSC BSC MA Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side. 13

14 Package Information SC-70-5 D e SEE VIEW A A2 A1 A VIEW A L 0.15 E1 E b c e1 GAUGE PLANE SEATING PLANE S Y M SC-70-5 B O L MIN. MA. MIN. MA. MILLIMETERS INCHES A A A b c D E E1 e e1 L BSC BSC 1.30 BSC BSC o 8 o 0 o 8 o Note : 1. Followed from JEDEC MO-223 AB. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 14

15 Package Information TDFN1.6x1.6-6 D A D2 L K b E Pin 1 A1 E2 A3 Pin 1 Corner e S TDFN1.6x1.6-6 Y M B MILLIMETERS INCHES O L MIN. MA. MIN. MA. A 0.70 A A REF REF b D D E E e 0.50 BSC BSC K L

16 Package Information VTDFN1.2x1.6-4 D A e E E2 b D2 L S Y M VTDFN1.2x1.6-4 B O L MIN. MA. MIN. MA. MILLIMETERS INCHES A b D D E E e 0.60 BSC BSC L

17 Carrier Tape & Reel Dimensions OD0 P0 P2 P1 A W F E1 B A0 OD1 B A T B0 K0 SECTION A-A SECTION B-B d H A T1 Application A H T1 C d D W E1 F SOT MIN MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN Application A H T1 C d D W E1 F SC MIN MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN Application A H T1 C d D W E1 F TDFN1.6x MIN MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN (mm) 17

18 Carrier Tape & Reel Dimensions (Cont.) Application A H T1 C d D W E1 F VTDFN1.2x MIN. Devices Per Unit MIN MIN P0 P1 P2 D0 D1 T A0 B0 K MIN Package Type Unit Quantity SOT-23-5 Tape & Reel 3000 SC-70-5 Tape & Reel 3000 TDFN1.6x1.6-6 Tape & Reel 3000 VTDFN1.2x1.6-4 Tape & Reel MIN 1.8 MIN (mm) Taping Direction Information SOT-23-5 USER DIRECTION OF FEED SC-70-5 USER DIRECTION OF FEED 18

19 Taping Direction Information (Cont.) TDFN1.6x1.6-6 USER DIRECTION OF FEED VTDFN1.2x1.6-4 USER DIRECTION OF FEED 19

20 Classification Profile Classification Reflow Profiles Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Preheat & Soak Temperature min (T smin) Temperature max (T smax) Time (T smin to T smax) (t s) 100 C 150 C seconds 150 C 200 C seconds Average ramp-up rate (T smax to T P) Liquidous temperature (T L) Time at liquidous (t L) Peak package body Temperature (T p)* Time (t P)** within 5 C of the specified classification temperature (T c) 3 C/second max. 3 C/second max. 183 C seconds 217 C seconds See Classification Temp in table 1 See Classification Temp in table 2 20** seconds 30** seconds Average ramp-down rate (T p to T smax) 6 C/second max. 6 C/second max. Time 25 C to peak temperature 6 minutes max. 8 minutes max. * Tolerance for peak profile Temperature (T p) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (t p) is defined as a supplier minimum and a user maximum. 20

21 Classification Reflow Profiles (Cont.) Table 1. SnPb Eutectic Process Classification Temperatures (Tc) Package Thickness Volume mm 3 <350 Volume mm <2.5 mm 235 C 220 C 2.5 mm 220 C 220 C Table 2. Pb-free Process Classification Temperatures (Tc) Package Thickness Volume mm 3 <350 Volume mm Volume mm 3 >2000 <1.6 mm 260 C 260 C 260 C 1.6 mm 2.5 mm 260 C 250 C 245 C 2.5 mm 250 C 245 C 245 C Reliability Test Program Test item Method Description SOLDERABILITY JESD-22, B102 5 Sec, 245 C HOLT JESD-22, A Hrs, T j=125 C PCT JESD-22, A Hrs, 100%RH, 2atm, 121 C TCT JESD-22, A Cycles, -65 C~150 C HBM MIL-STD VHBM 2KV MM JESD-22, A115 VMM 200V Latch-Up JESD 78 10ms, 1 tr 100mA Customer Service Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : Fax : Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : Fax :