AME. General Description. Functional Block Diagram. Features. Typical Application. Applications

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1 8850 General Description Functional Block Diagram The 8850 family of positive, linear regulators feature low quiescent current (30µA Typ.) with low dropout voltage, making them ideal for battery applications. The space-saving SOT-25/TSOT-25, SOP-8 & DFN-8C packages are attractive for " Pocket " and " Hand Held " applications. IN Overcurrent Shutdown OUT These rugged devices have both Thermal Shutdown, and Current Fold-back to prevent device failure under the " Worst " operating conditions. EN Thermal Shutdown The 8850 is stable with an output capacitance of 2.2µF or greater. AMP ADJ Features Very Low Dropout Voltage V REF =1.2V GND Guaranteed 600mA Output Typical 30µA Quiescent Current Output Voltage Accurate to within 2.5% Over-Temperature Shutdown Current Limiting Short Circuit Current Fold-back Power-Saving Shutdown Mode Space-Saving SOT-25/TSOT-25, SOP-8 & DFN-8C Packages User Adjustable Output Voltages Low Temperature Coefficient All 's Lead Free Products Meet RoHS Standards Typical Application IN C1 1mF EN OUT IN 8850 ADJ GND R1 R2 C2 100p OUT C3 2.2mF Applications Instrumentation Portable Electronics Wireless Devices Cordless Phones PC Peripherals Battery Powered Widgets V OUT = 1.2 ( R1/R2 +1 ) C2 is unnecessary if R1 or R2 < 20 K Ohms R R 1 and R 2 use resistance value within 1% accuracy for and correct V OUT 1

2 8850 Pin Configuration SOP-8 SOP-8 Top View Top View AEHA 1. IN BEHA 1. EN 2. GND 3. GND EN EPS ADJ 6. GND GND 8. OUT IN 3. OUT 4. ADJ 5. GND 6. GND 7. GND 8. GND * Die Attach: Conductive Epoxy * Die Attach: Conductive Epoxy DFN-8C (3mmx3mmx0.75mm) Top View AEVA 1. EN 2. GND 3. GND 4. IN 5. OUT 6. GND 7. GND 8. ADJ SOT-25 / TSOT-25 Top View AEEV 1. IN 2. GND 3. EN 4. ADJ 5. OUT * Die Attach: Conductive Epoxy * Die Attach: Conductive Epoxy Note: The area enclosed by dashed line represents Exposed Pad and connect to GND. 2

3 8850 Ordering Information 8850 x x x x xxx x - x Special Feature2 Special Feature1 Output Voltage Number of Pins Package Type Operating Ambient Temperature Range Pin Configuration Pin Configuration Operating Ambient Temperature Range Package Type Number of Pins Output Voltage Special Feature1 Special Feature 2 (For DFN package only) A: 1. IN E: -40 O C to +85 O C H: SOP A: 8 ADJ: Adjustable Z: Lead Free 3: 3x3x0.75(mm)(LxWxH) (SOP-8) 2. GND V: DFN V: 5 Lead Free & Y: 3. GND E: SOT-2X Low Profile 4. EN (For TSOT-25 only) 5. ADJ 6. GND 7. GND 8. OUT B: 1. EN (SOP-8) 2. IN 3. OUT 4. ADJ 5. GND 6. GND 7. GND 8. GND A: 1. EN (DFN-8C) 2. GND 3. GND 4. IN 5. OUT 6. GND 7. GND 8. ADJ A: 1. IN (SOT-25) 2. GND (TSOT-25) 3. EN 4. ADJ 5. OUT 3

4 8850 Ordering Information Part Number 8850AEHAADJZ Marking* 8850 AEHA yyww BEHAADJZ EPS BEHA 11 yyww Output Voltage Package Operating Ambient Temperature Range Adjustable SOP-8-40 o C to +85 o C Adjustable SOP-8-40 o C to +85 o C 8850AEEVADJZ BIRww Adjustable SOT o C to +85 o C 8850AEEVADJY BIRww Adjustable TSOT o C to +85 o C 8850AEVAADJZ-3 BIQ yyww Adjustable DFN-8C - 40 o C to +85 o C Note: yyww & ww represents the date code and pls refer to Date Code Rule. * A line on top of the first letter represents lead free plating such as Please consult sales office or authorized Rep./Distributor for package type availability. 4

5 8850 Absolute Maximum Ratings Parameter Maximum Unit Input Voltage -0.3 to 8 V EN Voltage -0.3 to 8 V Output Voltage -0.3 to V IN V Output Current P D / (V IN - V OUT ) ma ESD Classification B* Caution: Stress above the listed absolute maximum rating may cause permanent damage to the device. *HBM B:2000V~3999V Recommended Operating Conditions Parameter Symbol Rating Unit Ambient Temperature Range T A - 40 to +85 o C Junction Temperature Range T J - 40 to +125 o C Storage Temperature Range T STG - 65 to +150 o C 5

6 8850 Thermal Information Parameter Package Die Attach Symbol Maximum Unit SOP-8 60 Thermal Resistance* (Junction to Case) θ JC SOT-25 / TSOT DFN-8C 17 EPS 11 SOP o C / W Thermal Resistance (Junction to Ambient) Conductive SOT-25 / TSOT-25 θ 260 Epoxy JA DFN-8C 125 SOP Internal Power Dissipation SOT-25 / TSOT P D mw DFN-8C 800 Solder Iron (10 Sec)** 350 o C * Measure θ JC on center of molding compound if IC has no tab. O ** MIL-STD-202G 210F F 6

7 8850 Electrical Specifications T A = 25 O C unless otherwise noted Parameter Symbol Test Condition Min Typ Max Units Input Voltage V IN Note 1 7 V Output Voltage Accuracy V OUT I OUT = 1mA % 1.2V < V OUT(nom) <= 2.0V 1400 Dropout Voltage V DROP I OUT = 600mA See 2.0V < V OUT(nom) <= 2.8V V OUT = V OUT(nom) -2.0% chart 800 mv 2.8V < V OUT(nom) 600 Output Current I OUT V OUT > 1.2V 600 ma Current Limit I LIM V OUT >= 1.2V ma Short Circuit Current I SC V OUT < 0.8V ma Quiescent Current I Q I OUT = 0mA µa Ground Pin Current I GND I OUT = 1mA to 600mA 30 µa Line Regulation V OUT < 2.0V 0.15 % V OUT >= 2.0V % Load Regulation REG LOAD I OUT = 1mA to 600mA % Over Temperature Shutdown OTS 150 o C Over Temperature Hysterisis OTH 30 o C V O Temperature Coefficient TC 30 ppm/ o C Power Supply Ripple Rejection f = 1kHz 50 f = 10kHz 20 f = 100kHz 15 ADJ Reference Voltage V REF V EN Input Threshold EN Input Bias Current REG LINE PSRR I OUT =1mA V IN =V OUT +1 to V OUT +2 I OUT = 100mA C O = 2.2µF Output Voltage Noise e N f = 10Hz to 100kHz I OUT = 10mA Co = 2.2µF 30 V EH V IN = 2.7V to 7V 2.0 Vin V V EL V IN = 2.7V to 7V V I EH V EN = V IN, V IN = 2.7V to 7V 0.1 µa I EL V EN = 0V, V IN = 2.7V to 7V 0.5 µa Shutdown Current I SHDN V IN = 5V, V OUT = 0V, V EN < V EL µa db µvrms Note1:V IN(min) =V OUT +V DROPOUT 7

8 8850 Detailed Description The 8850 family of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection, and thermal shutdown. The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown EPS circuits 11 become active when the junction temperature exceeds 150 o C, or the current exceeds 600mA. During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops below 120 o C. The 8850 switches from voltage mode to current mode when the load exceeds the rated output current. This prevents over-stress. The 8850 also incorporates current fold-back to reduce power dissipation when the output is short circuited. This feature becomes active when the output drops below 0.8 volts, and reduces the current flow by 65%. Full current is restored when the voltage exceeds 0.8 volts. Enable The Enable pin normally floats high. When actively, pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent current is less than 1µA. This pin behaves much like an electronic switch. ADJ The ADJ pin is the positive input to the error amplifier which, due to the PMOS pass element inversion, means it is actually the negative input of the LDO feedback loop. The feedback works to keep the voltage at the ADJ pin 1.2V with respect to ground. Since the internal circuitry at the ADJ pin is essentially an ESD protected CMOS gate the input current at the ADJ pin is virtually zero. External Capacitors The 8850 is stable with an output capacitor to ground of 2.2µF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1µF ceramic capacitor with a 10µF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the input and ground to stabilize Vin. The input capacitor should be at least 0.1µF to have a beneficial effect. All capacitors should be placed in close proximity to the pins. A "Quiet" ground termination is desirable. This can be achieved with a "Star" connection. 8

9 8850 External Resistor Divider Table (contd.) R1 (K Ohm) Vout R2(K Ohm)=(1.2*R1(K Ohm))/(Vout-1.2) N/A N/A

10 8850 External Resistor Divider Table (contd.) Note: If V OUT =1.2V then R1=0 W and max value of R2 is 300KW. R1 (K Ohm) Vout EPS 11 R2(K Ohm)=(1.2*R1(K Ohm))/(Vout-1.2)

11 8850 External Resistor Divider Table R1 (K Ohm) Vout R2(K Ohm)=(1.2*R1(K Ohm))/(Vout-1.2)

12 Ground Current vs. Input Voltage Load Step (1mA-600mA) Ground Current (m A) O C 25 O C EPS I L (200mA/DIV) Vo(10mV/DIV) µ µ 0 Input Voltage (V) TIME (20mS/DIV) 1400 Drop Out Voltage vs. Output Voltage 0 Power Supply Rejection Ratio Drop Out Voltage (mv) Top to Bottom I LOAD =600mA I LOAD =500mA I LOAD =400mA I LOAD =300mA I LOAD =200mA I LOAD =100mA Output Voltage (V) PSRR (db) C L =2.2µF Tantalum 100mA C BYP =0 100mA 100 µa 100 µ A 10mA 1mA 10 1K 100K 10M Frequency (Hz) Safe Operating Area Noise Measurement AEHA 8850AEVA Output Current (ma) AEEV Vo (1mV DIV) C L =2.2µF No Filter Input-Output Voltage Differential (V) TIME (20ms/DIV) 12

13 8850 Overtemperature Shutdown Current Limit Response V OUT (1V/DIV) I OUT (200mA/DIV) R LOAD =6.6 Ω 0 0 I OUT (200mA/DIV) V OUT (1V/DIV) C LOAD =2.2µF C IN =1.0µF R LOAD =3.3Ω V OUTNOM =3.3V TIME (0.5Sec/DIV) TIME (2mS/DIV) Short Circuit Response Chip Enable Transient Response V OUT (1V/DIV) I OUT (200mV/DIV) C LOAD =2.2µF C IN =1µF R LOAD <100mΩ Output (1V/DIV) Enable (2V/DIV) C L =2µF R L =10Ω 0 0 TIME (2mS/DIV) TIME (1mS/DIV) Line Transient Response V OUT (10mV/DIV) V IN (1V/DIV) C LOAD =2.2µF I LOAD =1mA V OUTDC =3.3V V INDC =4.5V TIME (200mS/DIV) 13

14 8850 Date Code Rule Marking Date Code Year A A A W W xxx0 A A A W W xxx1 A A A W W xxx2 A A A W W xxx3 EPS 11 A A A W W xxx4 A A A W W xxx5 A A A W W xxx6 A A A W W xxx7 A A A W W xxx8 A A A W W xxx9 Tape and Reel Dimension DFN-8C (3mmx3mmx0.75mm) P PIN 1 W Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size DFN-8C (3x3x0.75mm) 12.0±0.1 mm 4.0±0.1 mm 3000pcs 330±1 mm 14

15 8850 Tape and Reel Dimension SOT-25 P W PIN 1 Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size SOT ±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm TSOT-25 P W PIN 1 Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size TSOT ±0.1 mm 4.0±0.1 mm 3000pcs 180±1 mm 15

16 8850 Tape and Reel Dimension SOP-8 P PIN 1 EPS 11 W Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size SOP ±0.1 mm 4.0±0.1 mm 2500pcs 330±1 mm Package Dimension SOP-8 Top View Side View C SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX A H E A A REF REF PIN 1 D L B C D Front View 7 o (4X) E e 1.27 BSC BSC L A2 A H B e A1 y q 0 o 8 o 0 o 8 o 16

17 8850 Package Dimension SOT-25 Top View Side View D SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX A 1.20REF REF A H E b PIN 1 S1 L D E e 1.90 BSC BSC e H Front View A L 0.37BSC BSC q1 0 o 10 o 0 o 10 o S BSC BSC b TSOT-25 A1 Top View Side View D SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX A+A H E b D PIN 1 E S1 e L e 1.90 BSC BSC H L 0.35BSC BSC Front View q1 0 o 10 o 0 o 10 o S BSC BSC A b A1 17

18 8850 Package Dimension DFN-8C (3mmx3mmx0.75mm) D b e EPS 11 E E1 L PIN #1 TOP VIEW D1 BOTTOM VIEW A G1 G REAR VIEW SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX A D E e D E b L G G

19 Life Support Policy: These products of, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of, Inc., Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information., Inc., November 2008 Document: 2095-DS8850-B.03 Corporate Headquarter, Inc. 2F, 302 Rui-Guang Road, Nei-Hu District Taipei 114, Taiwan, R.O.C. Tel : Fax: