RT mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator. General Description. Features. Applications. Ordering Information. Marking Information

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1 3mA, Ultra-Low Noise, Ultra-Fast CMOS LDO Regulator General Description The is designed for portable RF and wireless applications with demanding performance and space requirements. The performance is optimized for battery-powered systems to deliver ultra low noise and low quiescent current. A noise bypass pin is available for further reduction of output noise. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The also works with low-esr ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices. The consumes less than.1ua in shutdown mode and has fast turn-on time less than us. The other features include ultra low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. Available in the SC-7-, SOT-23-, TSOT-23-, WDFN-6L 2x2 and MSOP-8 packages. Ordering Information - Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-2. Package Type U : SC-7- B : SOT-23- J : TSOT-23- QW : WDFN-6L 2x2 (W-Type) F : MSOP-8 Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Output Voltage 1 : 1.V 16 : 1.6V : 49 : 4.9V :.V 1H : 1.8V 2H : 2.8V 4G : 4.7V Suitable for use in SnPb or Pb-free soldering processes. Features Ultra-Low-Noise for RF Application Ultra-Fast Response in Line/Load Transient Quick Start-Up (Typically us) <.1uA Standby Current When Shutdown Low Dropout : 3mA Wide Operating Voltage Ranges : 2.V to.v TTL-Logic-Controlled Shutdown Input Low Temperature Coefficient Current Limiting Protection Thermal Shutdown Protection Only 1uF Output Capacitor Required for Stability High Power Supply Rejection Ratio Custom Voltage Available RoHS Compliant and 1% Lead (Pb)-Free Applications CDMA/GSM Cellular Handsets Battery-Powered Equipment Laptop, Palmtops, Notebook Computers Hand-Held Instruments PCMCIA Cards Portable Information Appliances Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area, otherwise visit our website for detail. Typical Application Circuit V IN C IN 1uF/X7R Chip Enable VIN GND EN VOUT BP VOUT C OUT 1uF/X7R C BP 22nF 1

2 Pin Configurations VOUT BP (TOP VIEW) EN GND VIN BP NC VOUT NC VIN NC VOUT NC EN BP GND VIN GND EN SC-7-/SOT-23-/TSOT-23- WDFN-6L 2x2 MSOP-8 Functional Pin Description Pin Name Pin Function EN Chip Enable (Active High). Note that this pin is high impedance. There should be a pull low 1kΩ resistor connected to GND when the control signal is floating. BP Reference Noise Bypass. GND Ground. VOUT Output Voltage. VIN Power Input Voltage. Function Block Diagram EN Quick Start Shutdown and Logic Control VIN BP V REF + - Error Amplifier MOS Driver Current-Limit and Thermal Protection VOUT GND 2

3 Absolute Maximum Ratings (Note 1) Supply Input Voltage V Power Dissipation, P T A = 2 C SC mW TSOT-23-/SOT mW WDFN-6L 2x mW MSOP mW Package Thermal Resistance (Note 4) SOT-7-, θ JA C/W TSOT-23-/SOT-23-, θ JA C/W TSOT-23-/SOT-23-, θ JC C/W WDFN-6L 2x2, θ JA C/W WDFN-6L 2x2, θ JC C/W MSOP-8 θ JA C/W MSOP-8 θ JC C/W Junction Temperature C Lead Temperature (Soldering, 1 sec.) C Storage Temperature Range C to 1 C ESD Susceptibility (Note 2) HBM (Human Body Mode) kV MM (Machine Mode) V Recommended Operating Conditions (Note 3) Supply Input Voltage V to.v EN Input Voltage V to.v Junction Temperature Range Ambient Temperature Range C to 12 C 4 C to 8 C Electrical Characteristics (V IN = V OUT + 1V, C IN = C OUT = 1uF, C BP = 22nF, T A = 2 C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units Output Voltage Accuracy VOUT IOUT = 1mA % Current Limit I LIM R LOAD = 1Ω ma Quiescent Current IQ VEN 1.2V, IOUT = ma µa Dropout Voltage (Note ) V DROP I OUT = 2mA, V OUT > 2.8V 17 2 IOUT = 3mA, VOUT > 2.8V mv Line Regulation VLINE V IN = (V OUT + 1V) to.v, I OUT = 1mA % Load Regulation V LOAD 1mA < I OUT < 3mA % Standby Current I STBY V EN = GND, Shutdown µa EN Input Bias Current I IBSD V EN = GND or VIN -- 1 na EN Threshold Logic-Low Voltage V IL V IN = 3V to.v, Shutdown V Logic-High Voltage VIH VIN = 3V to.v, Start-Up To be continued 3

4 Parameter Symbol Test Conditions Min Typ Max Units Output Noise Voltage e NO 1Hz to 1kHz, I OUT = 2mA C OUT = 1uF uv RMS Power Supply f = 1Hz PSRR C OUT = 1uF, I OUT = 1mA Rejection Rate f = 1kHz db Thermal Shutdown Temperature T SD C Thermal Shutdown Temperature TSD C Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution is recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θ JA is measured in the natural convection at T A = 2 C on a low effective thermal conductivity test board (Single Layer, 1S) of JEDEC 1-3 thermal measurement standard. Note. The dropout voltage is defined as V IN - V OUT, which is measured when V OUT is V OUT(NORMAL) 1mV. 4

5 Typical Operating Characteristics Output Voltage (V) Output Voltage vs. Temperature -1xU VIN = 3.3V CIN = COUT = 1uF X7R Quiescent Current (ua) Quiescent Current vs. Temperature -1xU VIN = 3.3V CIN = COUT = 1uF X7R Temperature ( C) Temperature ( C) Dropout Voltage (mv) Dropout Voltage vs. Load Current -33xB CIN = COUT = 1uF TJ = 2 C TJ = 12 C TJ = -4 C PSRR (db) VIN = 4V to V CIN = COUT = 1uF, X7R PSRR ILoad = 1mA ILoad = 1mA Load Current (A) K 1 1K 1K 1 1M Frequency (khz) (Hz) EN Pin Shoutdown Threshold (V) EN Pin Shoutdown Threshold vs. Temperature xU VIN = 3.3V CIN = COUT = 1uF X7R Temperature ( C) EN Pin Voltage (V) Output Voltage (V) EN Pin Shutdown Response VIN = V CIN = COUT = 1uF Time (µs/div) -28xU No Load

6 Load Transient Response Load Transient Response Load Current (ma) 1 VIN = V, VOUT = 2.8V CIN = COUT = 1uF ILoad = 1mA to 6mA Load Current (ma) 4 2 VIN = V, VOUT = 2.8V CIN = COUT = 1uF ILoad = 1mA to 2mA Output Voltage Deviation (mv) 2-2 Output Voltage Deviation (mv) - Time (µs/div) Time (µs/div) Line Transient Response Line Transient Response Input Voltage Deviation (V) 6 4 VIN = 4V to V COUT = 1uF -2xB ILoad = 1mA Input Voltage Deviation (V) 6 4 VIN = 4V to V COUT = 1uF -2xB ILoad = 1mA Output Voltage Deviation (mv) 1-1 Output Voltage Deviation (mv) 1-1 Time (µs/div) Time (1µs/Div) Noise Noise VIN = 4.V CIN = COUT = 1uF, X7R -3xB ILoad = ma VIN = 4.V CIN = COUT = 1uF, X7R -1xU ILoad = ma 2 2 Noise (µv) 1-1 Noise (µv) Time (1ms/Div) f = 1Hz to 1kHz Time (1ms/Div) f = 1Hz to 1kHz 6

7 Start Up EN Pin Voltage (V) 1 VIN = V CIN = COUT = 1uF -28xU No Load Output Voltage (V) 2 1 Time (1µs/Div) 7

8 Applications Information Like any low-dropout regulator, the external capacitors used with the must be carefully selected for regulator stability and performance. Using a capacitor whose value is > 1uF on the input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than. inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1uF with ESR is > 2mΩ on the output ensures stability. The still works well with output capacitor of other types due to the wide stable ESR range. Figure 1 shows the curves of allowable ESR range as a function of load current for various output capacitor values. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than. inch from the V OUT pin of the and returned to a clean analog ground. COUT ESR (Ω) Region of Stable C OUT ESR vs. Load Current Instable Stable Simulation Verify Load Current (ma) Figure 1-1xU CIN = COUT = 1uF, X7R Bypass Capacitor and Low Noise Connecting a 22nF between the BP pin and GND pin significantly reduces noise on the regulator output, it is critical that the capacitor connection between the BP pin and GND pin be direct and PCB traces should be as short as possible. There is a relationship between the bypass capacitor value and the LDO regulator turn on time. DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance. Enable Function The features an LDO regulator enable/disable function. To assure the LDO regulator will switch on, the EN turn on control level must be greater than 1.2 volts. The LDO regulator will go into the shutdown mode when the voltage on the EN pin falls below.4 volts. For to protecting the system, the have a quick-discharge function. If the enable function is not needed in a specific application, it may be tied to V IN to keep the LDO regulator in a continuously on state. Thermal Considerations Thermal protection limits power dissipation in. When the operation junction temperature exceeds 16 C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turn on again after the junction temperature cools by 3 C. For continue operation, do not exceed absolute maximum operation junction temperature 12 C. The power dissipation definition in device is : P D = (V IN V OUT ) x I OUT + V IN x I Q The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : P D(MAX) = ( T J(MAX) T A ) /θ JA Where T J(MAX) is the maximum operation junction temperature 12 C, T A is the ambient temperature and the θ JA is the junction to ambient thermal resistance. 8

9 For recommended operating conditions specification of, where T J(MAX) is the maximum junction temperature of the die (12 C) and T A is the maximum ambient temperature. The junction to ambient thermal resistance (θ JA is layout dependent) for TSOT-23-/ SOT-23- package is 2 C/W, SC-7- package is 333 C/W, WDFN-6L 2x2 package is 16 C/W and MSOP- 8 package is 16 C/W on standard JEDEC 1-3 thermal test board. The maximum power dissipation at T A = 2 C can be calculated by following formula : P D(MAX) = (12 C 2 C) / 333 = 3mW for SC-7- P D(MAX) = (12 C 2 C) / 2 = 4mW for TSOT-23-/ SOT-23- P D(MAX) = (12 C 2 C) / 16 = 66mW for WDFN-6L 2x2 P D(MAX) = (12 C 2 C) / 16 = 62mW for MSOP-8 The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θ JA. For packages, the Figure 2 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 7 6 MSOP-8 WDFN-6L 2x2 Power Dissipation (mw) TSOT-23-/ SOT-23- SC Ambient Temperature ( C) Figure 2. Derating Curve for Packages 9

10 Outline Dimension D H L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A B b C D e.6.26 H L SC-7- Surface Mount Package 1

11 D H L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A B b C D e H L TSOT-23- Surface Mount Package 11

12 D H L C B b A A1 e Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A B b C D e H L SOT-23- Surface Mount Package 12

13 D D2 L E E2 1 SEE DETAIL A A A1 A3 e b DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A A b D D E E e.6.26 L W-Type 6L DFN 2x2 Package 13

14 D L E E1 e A b A1 A2 Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A A A b D e.6.26 E E L Lead MSOP Plastic Package Richtek Technology Corporation Headquarter F, No. 2, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)26789 Fax: (8863) Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 23, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862) Fax: (8862) marketing@richtek.com