AME. High PSRR, Low Noise, 150mA CMOS Regulator AME8852. n General Description. n Typical Application. n Features. n Functional Block Diagram

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1 8852 n General Description High PSRR, Low Noise, 15mA n Typical Application The 8852 family of positive, CMOS linear regulators provide low dropout voltage(11mv@15ma), low quiescent current, and low noise CMOS LDO. These rugged devices have both Thermal Shutdown, and Current limit to prevent device failure under the "Worst" of operating conditions. IN C1 1µF IN EN 8852 GND OUT OUT C OUT 1µF n Features l Low Dropout Voltage: 11mV@15mA l Guaranteed Current: 15mA l Quiescent Current: 6µA (typ.) l Over-Temperature Shutdown l Current Limiting Protection l PSRR: 6dB@1KHz l Ultra-Low-Noise: 1µV RMS at 1Hz to 1KHz l Low Temperature Coefficient l Input Voltage Range: 2.5V~ l Output Voltage Range:.8V~4.3V l Green Products Meet RoHS Standards n Functional Block Diagram IN Overcurrent Shutdown Thermal Shutdown OUT EN R1 n Applications l Instrumentation - AMP + l Portable Electronics l Wireless Devices l Cordless Phones l PC Peripherals Vref R2 GND l Battery Powered Widgets Rev. B.1 1

2 8852 High PSRR, Low Noise, 15mA n Pin Configuration SOT-23 Top View SC-7-4 (SC-82) Top View AETxxx 1. GND 2. OUT 3. IN AIUxxx 1. EN 2. GND 3. OUT 4. IN * Die Attach: Non-Conductive Epoxy * Die Attach: Conductive Epoxy SOT-25/TSOT-25A Top View AEVxxx 1. IN 2. GND 3. EN 4. NC 5. OUT * Die Attach: Conductive Epoxy 2 Rev. B.1

3 8852 High PSRR, Low Noise, 15mA n Pin Description SOT-23 Pin Number SC-7-4 (SC-82) SOT-25 / TSOT-25A Pin Name Pin Description N/A 1 3 EN Enable pin, Active high". When pulled low, the PMOS pass transistor turns off, current consuming less than 1A. When EN pin floating outside, it is pulled High by internal small current source. N/A N/A 4 NC No connection GND Ground connection pin OUT IN LDO voltage regulator output pin; should be decoupled with a 1F or greater capacitor. Input voltage pin; should be decoupled with 1F or greater capacitor. Rev. B.1 3

4 8852 High PSRR, Low Noise, 15mA n Ordering Information x x x xxx x Special Feature Output Voltage Number of Pins Package Type Pin Configuration Pin Configuration Package Type Number of Pins Output Voltage Special Feature A 1. EN E: SOT-2X T: 3 8:.8V N/A: SOT-2X (SC-7-4) 2. GND I: SC-7 (SC-82) U: 4 9:.9V K:.9mm max height 3. OUT V: 5 1: 1.V (for TSOT-2XA Only) 4. IN 11: 1.1V 12: 1.2V A 1. IN 13: 1.3V (SOT-25) 2. GND 14: 1.4V (TSOT-25A) 3. EN 15: 1.5V 4. NC : : 5. OUT : : 42: 4.2V A 1. GND 43: 4.3V (SOT-23) 2. OUT 3. IN 4 Rev. B.1

5 8852 High PSRR, Low Noise, 15mA n Absolute Maximum Ratings Parameter Maximum Unit Input Voltage -.3 to 6 V Output Current Output Voltage P D /( - ) GND-.3 to +.3 ma V ESD Classification HBM 2 kv MM 2 V n Recommended Operating Conditions Parameter Symbol Rating Unit Ambient Temperature Range T A - 4 to +85 o C Junction Temperaturen Range T J - 4 to +125 o C Storage Temperaturen Range T STG - 65 to +15 o C Rev. B.1 5

6 8852 High PSRR, Low Noise, 15mA n Thermal Information Parameter Package Die Attach Symbol Maximum Unit Thermal Resistance* (Junction to Case) SC-7-4 (SC-82) 224 SOT-25 Conductive Epoxy 81 θ JC TSOT-25A 81 o C / W Thermal Resistance (Junction to Ambient) Internal Power Dissipation SOT-23 Non-Conductive Epoxy 14 SC-7-4 (SC-82) 331 SOT-25 Conductive Epoxy 26 TSOT-25A 23 SOT-23 Non-Conductive Epoxy 28 SC-7-4 (SC-82) θ JA 3 SOT-25 Conductive Epoxy 4 TSOT-25A 455 SOT-23 Non-Conductive Epoxy 4 P D o C / W mw Lead Temperature (Soldering, 1Sec.)** 26 o C * Measure θjc on backside center of molding compound if IC has no tab. ** MIL-STD-22G 21F 6 Rev. B.1

7 8852 High PSRR, Low Noise, 15mA n Electrical Specifications =(NOM) +1V, (for <2V, =2.5V), I OUT =1mA, and C OUT =1µF, C IN =1µF unless otherwise noted. Typical values are at T A =25 o C. Parameter Symbol Test Condition Min Typ Max Units Input Voltage V Output Accuracy,ACC I OUT =1mA % Output Voltage Range V I OUT =15mA,.8V (NOM) 1.9V Note2 Dropout Voltage (Note 1) V DROP I OUT =15mA 1.9V<(NOM) 2.4V I OUT =15mA 2.4V<(NOM) 2.8V 4 3 mv I OUT =15mA, 2.8V<(NOM) Output Current I OUT 15 ma Quiescent Current I Q I OUT =ma 6 9 µa Line Regulation V V OUT IN V 1% OUT REG LINE I OUT =1mA,.8V 1.2V, 2.5V 3.5V I OUT =1mA, 1.2V< 2.V, 2.5V 3.5V I OUT =1mA, 2.V< 4.2V, (MIN) (MIN) +1V %/V I OUT =1mA, 4.2V< 4.5V, (MIN).5.1 Load Regulation 1mA I OUT 15mA.8V (NOM) 1.2V V V OUT OUT I 1% OUT REG LOAD 1mA I OUT 15mA 1.2V (NOM) 2.V 1mA I OUT 15mA 2.V<(NOM) %/A Rev. B.1 7

8 8852 High PSRR, Low Noise, 15mA n Electrical Specifications Parameter Symbol Test Condition Min Typ Max Units Power Supply Rejection Ration PSRR C OUT =1uF, =1V I OUT =1mA =2.8V F=1Hz 6 F=1KHz 6 F=1KHz 6 db I OUT =1mA, =.8V, Output Voltage Noise en 1 µv f=1hz to 1KHz RMS Enable High (Enabled) V EN,HI (MIN) 1.4 Enable Low (Shutdown) V EN,LO (MIN).4 V Enable Input Bias Current I EN,HI V EN = 1 I EN,LO V EN =V 2 µa Shutdown Current I SHDN =5.V, V EN =V.1 1 µa Shutdown Output Voltage,SD I OUT =.4mA, V EN =.4 V Protection Output Current Limit I LIM =.9 x (NOM) 25 ma Shutdown, Thermal Shutdown Temperature T SHDN 15 temperature increasing o C Thermal Shutdown Hysteresis T SHDN(HYS) 2 Note1: Dropout Voltage is measured at =(NOM) x98% Note2: For below 2.V, Dropout Voltage is the input (MIN) to output differential. 8 Rev. B.1

9 8852 n Detailed Description The 8852 family of CMOS regulators contain a PMOS pass transistor, voltage reference, error amplifier, over-current protection, thermal shutdown, and Power Good detection circuitry. The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits become active when the junction temperature exceeds 15 o C, or the current exceeds 15mA. During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops more 2 o C. High PSRR, Low Noise, 15mA Capacitor Selection and Regulator Stability The maximum output power of the 8852 is limited by the maximum power dissipation of the package. By calculation the power dissipation of the package as a function of the input voltage, output voltage and output current, the maximum input voltage can be obtained. The maximum power dissipation should not exceed the package s maximum power rating. P MAX = ((MAX) - ) x I OUT Where: (MAX) = maximum input voltage P MAX = maximum power dissipation of the package Capacitor Selection and Regulator Stability The 8852 is stable with an output capacitor to ground of 1µF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a.1µf ceramic capacitor with a 1µF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the input and ground to stabilize. The input capacitor should be at least.1µf to have a beneficial effect. Enable Pin The Enable Pin is Active High. When activated pulled low, the MOS pass transistor shuts off, and all internal circuits are powered down. In this state, the stand by current is than 1µA. When EN pin float outside, It's pulled high. Rev. B.1 9

10 8852 High PSRR, Low Noise, 15mA n Characterization Curve Output Voltage Output Voltage = 2.5V, = 1.V, I OUT = 1mA 4.4 = 5.3V, = 4.3V, I OUT = 1mA Output Voltage (V) Output Voltage (V) Temperature ( o C) Temperature ( o C) Quiescent Current Quiescent Current 1 9 = 1.V 9 = 4.3V IQ (µa) Temperature ( o C) Temperature ( o C) IQ (µa) Stability vs. ESR vs. Load Current 1. Region of Stable C OUT ESR (Ω) VIN = 5V CIN = COUT= 1µF / X7R Unstable Range Stable Range Unstable Range Load Current (ma) Rev. B.1

11 Output Limit (ma) Output Limit (ma) 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) Current Limit vs. Input Voltage Current Limit vs. Input Voltage 6 = 1V 6 = 4.3V Input Voltage (V) Input Voltage (V) Dropout Voltage PSRR vs. Frequency 4 1 Dropout Voltage (mv) = 4.3V PSRR (db) = 1V IOUT = 1mA Temperature ( o C) 1 1K 1K 1K 1M Frequency (Hz) Rev. B.1 11

12 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) TA = -4 O C VOUT = 1V IOUT = 1mA TA = -4 O C = 1V IOUT = 15 ma 2.8V 2.8V 2mV 2mV (2V/DIV) (2V/DIV) - 2mV - 2mV 2µs/ DIV 2µs/ DIV TA = -4 O C VOUT = 4.3V I OUT = 1mA 4.8V TA = -4 O C VOUT = 4.3V IOUT = 15 ma 4.8V 2mV 2mV (2V/DIV) - 2mV (2V/DIV) - 2mV 2µs/ DIV 2µs/ DIV TA = 25 O C VOUT = 1V I OUT = 1mA TA = 25 O C VOUT = 1V I OUT = 15mA 2.8V 2.8V 2mV 2mV (2V/DIV) - 2mV (2V/DIV) - 2mV 2µs/ DIV 2µs/ DIV 12 Rev. B.1

13 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) TA = 25 O C VOUT =4.3V I OUT = 1mA 4.8V TA = 25 O C VOUT = 4.3V I OUT = 15mA 4.8V 2mV 2mV (2V/DIV) (2V/DIV) - 2mV - 2mV 2µs/ DIV 2µs/ DIV TA = 125 O C VOUT = 1V IOUT = 1mA TA = 125 O C VOUT = 1V IOUT = 15 ma 2.8V 2.8V 2mV 2mV (2V/DIV) - 2mV (2V/DIV) - 2mV 2µs/ DIV 2µs/ DIV TA = 125 O C VOUT = 4.3V IOUT = 1mA 4.8V TA = 125 O C VOUT = 4.3V I OUT = 15 ma 4.8V 2mV 2mV (2V/DIV) (2V/DIV) - 2mV -2mV 2µs/ DIV 2µs/ DIV Rev. B.1 13

14 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) Load Transient Response Load Transient Response TA = -4 O C VOUT = 1V I OUT = 1~15mA 2mV TA = -4 O C VOUT = 4.3V I OUT = 1~15 ma 2mV (2mV/DIV) (2mV/DIV) -2mV -2mV 15mA 15mA I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA Load Transient Response Load Transient Response TA = 25 O C = 1V I OUT = 1~15mA 2mV TA = 25 O C VOUT = 4.3V I OUT = 1~15mA 2mV (2mV/DIV) (2mV/DIV) -2mV -2mV 15mA 15 ma I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA Load Transient Response Load Transient Response T A = 125 O C VOUT = 1V I OUT = 1~15mA 2mV TA = 125 O C VOUT =4.3V I OUT = 1~15mA 2mV (2mV/DIV) (2mV/DIV) -2mV -2mV 15mA 15mA I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA I OUT (5mA/DIV) Time (2µSec/ DIV) 1mA 14 Rev. B.1

15 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) Chip Enable Transient Response Chip Enable Transient Response = 1V I OUT = 1mA = 1V I OUT = 1mA 3 5µs/ DIV 3 2µs/ DIV 1) EN= 1V/Div 2) = 5mV/Div 3) I OUT = 2mA/Div 1) EN= 1V/Div 2) = 5V/Div 3) I OUT = 2mA/Div Chip Enable Transient Response Chip Enable Transient Response ) EN= 2V/Div 2) = 2V/Div 3) I OUT = 2mA/Div 5µs/ DIV = 4.3V I OUT = 1mA 3 1) EN= 2V/Div 2) = 2V/Div 3) I OUT = 2mA/Div 2µs/ DIV = 4.3V I OUT = 1mA Rev. B.1 15

16 8852 High PSRR, Low Noise, 15mA n Characterization Curve (Contd.) Chip Enable Transient Response Chip Enable Transient Response = 1V I OUT = 15mA = 1V I OUT =15mA 3 5µs/ DIV 1) EN= 1V/Div 2) = 5mV/Div 3) I OUT = 5mA/Div 1µs/ DIV 1) EN= 1V/Div 2) = 5mV/div 3) I OUT = 5mA/Div Chip Enable Transient Response Chip Enable Transient Response = 4.3V I OUT = 15mA = 4.3V I OUT = 15mA 3 1) EN= 2V/Div 2) = 2V/Div 3) I OUT = 5mA/Div 5µs/ DIV 1) EN= 2V/Div 2) = 2V/Div 3) I OUT = 5mA/Div 1µs/ DIV 16 Rev. B.1

17 8852 High PSRR, Low Noise, 15mA n Tape and Reel Dimension SOT-23 P W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P) Part Per Full Reel Reel Size SOT-23 8.±.1 mm 4.±.1 mm 4.±.1 mm 3pcs 18±1 mm SC-7-4 (SC-82) P W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P) Part Per Full Reel Reel Size SC ±.1 mm 4.±.1 mm 4.±.1 mm 3pcs 18±1 mm Rev. B.1 17

18 8852 JCET_TDS_A855AEXXA23Z_1512_1 High PSRR, Low Noise, 15mA n Tape and Reel Dimension (Contd.) SOT-25 P W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P) Part Per Full Reel Reel Size SOT-25 8.±.1 mm 4.±.1 mm 4.±.1 mm 3pcs 18±1 mm TSOT-25A P W PIN 1 P Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Pitch (P) Part Per Full Reel Reel Size TSOT-25A 8.±.1 mm 4.±.1 mm 4.±.1 mm 3pcs 18±1 mm 18 Rev. B.1

19 8852 High PSRR, Low Noise, 15mA n Package Dimension SOT-23 Top View Side View D E H PIN 1 e L Front View A b A1 n Lead Pattern.8 BSC 1. BSC 1.9 BSC 2.4 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +.5mm unless otherwise specified. Rev. B.1 19

20 8852 High PSRR, Low Noise, 15mA n Package Dimension (Contd.) SC-7-4 D e1 e SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX L A A E1 E A b b PIN 1 b d b1 L1 c.2 c d.5 TYP.2 TYP TOP VIEW SIDE VIEW D E E e.65 TYP.26TYP A2 A e L.525 REF.21 REF L FRONT VIEW A1 θ o 8 o o 8 o SC-7-4(SC-82) 1.3 BSC.8 BSC.45 BSC.35 BSC 1.94 BSC.5REF Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +.5mm unless otherwise specified. 2 Rev. B.1

21 8852 High PSRR, Low Noise, 15mA n Package Dimension (Contd.) SOT-25 Top View D Side View H E PIN 1 S1 e L Front View A b A1 n Lead Pattern.7 BSC 2.4 BSC 1. BSC.95 BSC.95 BSC 1.9 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +.5mm unless otherwise specified. Rev. B.1 21

22 8852 High PSRR, Low Noise, 15mA n Package Dimension (Contd.) TSOT-25A D b L θ SYMBOLS MILLIMETERS INCHES MIN MAX MIN MAX E1 E.25 A A A b PIN 1 e e1 TOP VIEW c SIDE VIEW c D E A1 E e.95 BSC.37 BSC A2 A e1 1.9 BSC.75 BSC REAR VIEW L θ o 8 o o 8 o n Lead Pattern.7 BSC 1. BSC.95 BSC.95 BSC 1.9 BSC 2.4 BSC Note: 1. Lead pattern unit description: BSC: Basic. Represents theoretical exact dimension or dimension target. 2. Dimensions in Millimeters. 3. General tolerance +.5mm unless otherwise specified. 22 Rev. B.1

23 Life Support Policy: These products of, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of, Inc., Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information., Inc., April 216 Document: TM1-DS8852-B.1 Corporate Headquarter, Inc. 8F, 12, WenHu St., Nei Hu Taipei, Taiwan. 114 Tel: Fax:

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