ILX pixel CCD Linear Image Sensor (B/W)

Transcription

1 -pixel CCD Linear Image Seor (B/W) ILX6 Description The ILX6 is a reduction type CCD linear seor developed for high resolution facsimiles and copiers. This seor reads A-size documents at a deity of DPI (Dot Per Inch). A built-in timing generator and clock-drivers eure direct drive at V logic for easy use. In addition, reset pulse can be switched between internal generation and external input. pin DIP (Ceramic) Features Number of effective pixels: pixels Pixel size: 7µm 7µm (7µm pitch) Built-in timing generator and clock-drivers Ultra low lag/ultra high seitivity/low dark output Single output method Maximum clock frequency:.mhz Absolute Maximum Ratings Supply voltage V 6 V Operating temperature to +6 C Storage temperature to +8 C Pin Configuration (Top View) VGG RS/SH VOUT 9 8 φrog RSSW 9 T T T T Sony reserves the right to change products and specificatio without prior notice. This information does not convey any licee by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits. E99B78-PS

2 RS/SH ILX6 T T RSSW φrog D7 D8 D8 S S S999 S D9 D D D D D T T Block Diagram VOUT VGG Output amplifier Sample-and-hold circuit Feed through suppression circuit Clock pulse generator Sample-and-hold pulse generator Clock-drivers CCD analog shift register Read out gate Read out gate CCD analog shift register Clock-drivers Mode selector Read out gate pulse generator 6

3 ILX6 Pin Description Pin No Symbol VGG VOUT φrog RSSW T T T T RS/SH Description Output circuit gate bias 9V power supply Signal output Clock pulse V power supply V power supply Reset pulse switchover pin Test pin (V) Test pin () Test pin (V) Test pin () V power supply 9V power supply 9V power supply Clock pulse or with S/H; without S/H switch 9V power supply Clock pulse Output mode is changeable as follows. pin 9pin φrs Internal RS without S/H Internal RS with S/H External RS without S/H

4 ILX6 Recommended Voltage Item Min. Typ. Max. Unit V.7.. V Note) Rules for raising and lowering power supply voltage To raise power supply voltage, first raise (9V) and then (V). To lower voltage, first lower (V) and then (9V). Clock Characteristics Item Symbol Min. Typ. Max. Unit Input capacity of pin C pf Input capacity of φrog pin CφROG pf Input capacity of RS/SH pin CRS/SH pf Frequency of f. MHz Frequency of φrs fφrs. MHz

5 ILX6 Electro-optical Characteristics (Note ) (Ta = C, = 9V, = V, = MHz, Internal φrs mode without S/H, Light source = K, IR cut filter, CM-S (t =.mm)) Item Symbol Min. Typ. Max. Unit Remarks Seitivity R V/(lx s) Note Seitivity R.6 V/(lx s) Note Seitivity nonuniformity PRNU % Note Saturation output voltage VSAT.. V Note Saturation exposure SE.7.9 lx s Note 6 Even and odd black level DC difference V.. mv Note 7 Dark voltage average VDRK. mv Note 8 Dark signal nonuniformity DSNU.6 mv Note 9 Image lag IL. % Note 9V supply current I 6 ma V supply current I 7 ma Total trafer efficiency TTE 9 98 % Output impedance ZO 6 Ω Offset level VOS. V Note Dynamic range DR Note Notes) ) In accordance with the given electrooptical characteristics, the even black level is defined as the mean value of D8, D, D to D. The odd black level is defined as the mean value of D7, D9, D and D. ) For the seitivity test light is applied with a uniform inteity of illumination. ) W lamp (8K) ) PRNU is defined as indicated below. Ray incidence conditio are the same as for Note. (VMAX PRNU = VMIN)/ [%] VAVE Where the pixels are divided into blocks of, even and odd pixels, respectively. The maximum output of each block is set to VMAX, the minimum output to VMIN and the average output to VAVE. ) Use below the minimum value of the saturation output voltage. 6) Saturation exposure is defined as follows. SE = VSAT R 7) Indicates the DC difference in value between odd black level and even black level. 8) Optical signal accumulated time τ int stands at ms.

6 ILX6 9) The difference between the maximum and mean values of the dark output voltage is calculated for even and odd respectively. The larger value is defined as the dark signal nonuniformity. Optical signal accumulated time τ int stands at ms. ) VOUT = mv (Typ.) ) Vos is defined as indicated below. Vout VOS ) Dynamic range is defined as follows. DR = VSAT VDRK When optical accumulated time is shorter, the dynamic range gets wider because dark voltage is in proportion to optical accumulated time. 6

7 ILX6 Application Circuit 9V φrs V RS/SH T T T VGG VOUT φrog RSSW T.µ.µ µ/6v kω µ/v µ/6v Output signal φrog.µ SA7 This application circuit shows when φrs is used externally. When noise influence into output signal is large, connect pi indicated by to the analog power supply and ( pi indicated by to the digital power supply, and also use a decoupling capacitor of large capacitance. ) Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. 7

8 D D D D D D6 D D D6 D7 D8 D6 D7 D8 S S S S S997 S998 S999 S D9 D D D D D ILX6 Clock Timing Diagram φrog φrs VOUT Dummy signal (8 pixels) Optical black (8 pixels) Effective picture elements signal ( pixels) Dummy signal (6 pixels) -line output period ( pixels) This clock timing diagram shows when φrs is used externally. 8

9 ILX6 Clock Pulse Waveform Conditio, φrog pulse related t8 t9 φrog t t t Internal φrs mode t8 t9 t t Vout t t t External φrs mode t t t9 t8 φrs t7 t6 t t t 9

10 ILX6 Item Symbol Min. Typ. Max. Unit φrog, pulse timing t φrog, pulse timing t 8 φrog pulse high level period t 8 pulse high level period t pulse low level period t φrs pulse low level period t6, φrs pulse timing t7 6 + t + t Input clock pulse rise/fall time t8, t9 Input clock pulse voltage High level Low level V, VφROG VφRS.... V V Signal output delay time Internal φrs External φrs t t t t Recommended condition during = MHz.

11 Output voltage rate Output voltage rate MTF Relative seitivity ILX6 Example of Representative Characteristics ( = 9V, = V, Ta = C). Spectral seitivity characteristics (Standard characteristics) Wavelength [nm] MTF of main scanning direction (Standard characteristics) Spatial frequency [cycles/mm] Normalized spatial frequency Dark signal output temperature characteristics (Standard characteristics) Integration time output voltage characteristics (Standard characteristics)... 6 Ta Ambient temperature [ C]. τ int Integration time [ms]

12 Vos Offset level [V] Vos Offset level [V] Vos Offset level [V] ILX6 Operational frequency characteristics of the supply current (Standard characteristics) Operational frequency characteristics of the supply current (Standard characteristics) I supply current [ma] I supply current [ma] f clock frequency [MHz] Offset level vs. characteristics (Standard characteristics) Ta = C f clock frequency [MHz] Offset level vs. characteristics (Standard characteristics) Ta = C Vos. Vos [V] Offset level vs. Temperature characteristics (Standard characteristics) 6.7. [V] Vos Ta.8mV/ C 6 Ta Ambient temperature [ C]

13 ILX6 Notes on Handling ) Static charge prevention CCD image seors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Itall a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image seor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. ) Regulation for raising and lowering the power supply voltage When raising the supply voltage, first raise (9V) and then (V). Similarly, lower (V) first and then (9V). ) Soldering a) Make sure the package temperature does not exceed 8 C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded W soldering iron and solder each pin in less than seconds. For repairs and remount, cool sufficienty. c) To dismount an image seor, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. ) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condeation, preheat or precool when moving to a room with great temperature differences. ) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditio. 6) CCD image seors are precise optical equipment that should not be subject to mechanical shocks.

14 .. ±.. ±..97. ±. 8.. ±..6 (AT STAND OFF) to 9 ILX6. Package Outline Unit: mm pin DIP (mil) 9. ±. 8. ±.8. (7µm Pixels) V No. pixel H st. pin index.. M. PACKAGE STRUCTURE PACKAGE MATERIAL Ceramic LEAD TREATMENT TIN PLATING LEAD MATERIAL ALLOY PACKAGE WEIGHT.9g. The height from the bottom to the seor surface is. ±.mm.. The thickness of the cover glass is.8mm, and the refractive index is..