Diagonal 6mm (Type 1/3) CCD Image Sensor for CCIR B/W Video Cameras

Transcription

1 Diagonal 6mm (Type /3) CCD Image Sensor for CCIR B/W ideo Cameras Description The is an interline CCD solid-state image sensor suitable for CCIR B/W video cameras with a diagonal 6mm (Type /3) system. Compared with the conventional product ICX0BL, basic characteristics such as sensitivity, smear, dynamic range and S/N are improved drastically. This chip features a field period readout system and an electronic shutter with variable charge-storage time. This chip is suitable for applications such as surveillance cameras, automotive cameras, etc. 6 pin DIP (Plastic) Features High sensitivity (+4dB compared with the ICX0BL) Low smear ( 0dB compared with the ICX0BL) High D range (+3dB compared with the ICX0BL) High S/N Low dark current Excellent antiblooming characteristics Continuous variable-speed shutter No voltage adjustment (Reset gate and substrate bias are not adjusted.) Reset gate: drive Horizontal register: drive Pin Device Structure Interline CCD image sensor Image size: Diagonal 6mm (Type /3) Number of effective pixels: 00 (H) 8 () approx. 90K pixels Total number of pixels: 37 (H) 97 () approx. 30K pixels Chip size:.9mm (H) 4.68mm () Unit cell size: 9.8µm (H) 6.3µm () Optical black: Horizontal (H) direction : Front 7 pixels, rear 30 pixels ertical () direction : Front 4 pixels, rear pixel Number of dummy bits: Horizontal 6 ertical (even fields only) Substrate material: Silicon 7 Pin 9 H 30 Optical black position (Top iew) 4 Super HAD CCD is a trademark of Sony Corporation. The Super HAD CCD is a version of Sony's high performance CCD HAD (Hole- Accumulation Diode) sensor with sharply improved sensitivity by the incorporation of a new semiconductor technology developed by Sony Corporation. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. E00608-PS

2 DD GND φsub L φrg Hφ Hφ ertical Register OUT GND φ φ φ3 φ4 Block Diagram and Pin Configuration (Top iew) Note) Horizontal Register Note) : Photo sensor Pin Description Pin No. 3 Symbol Description Pin No. Symbol Description φ4 ertical register transfer clock 9 φ3 ertical register transfer clock 0 φ ertical register transfer clock DD GND φsub Supply voltage GND Substrate clock 4 φ ertical register transfer clock L Protective transistor bias GND GND 3 φrg Reset gate clock Hφ Horizontal register transfer clock 8 OUT Signal output 6 Hφ Horizontal register transfer clock Absolute Maximum Ratings Item Ratings Unit Remarks DD, OUT, φrg φsub 40 to +8 Against φsub φ, φ3 φsub φ, φ4, L φsub 0 to + 0 to +0.3 Hφ, Hφ, GND φsub 40 to +0.3 DD, OUT, φrg GND 0.3 to +0 Against GND φ, φ, φ3, φ4 GND 0 to +8 Hφ, Hφ GND 0 to +6 Against L φ, φ3 L φ, φ4, Hφ, Hφ, GND L 0.3 to to + Between input clock pins oltage difference between vertical clock input pins Hφ Hφ Hφ, Hφ φ4 to + 6 to +6 4 to +4 Storage temperature 30 to +80 C Operating temperature +4 (Max.) when clock width < 0µs, clock duty factor < 0.%. 0 to +60 C

3 Bias Conditions Supply voltage Item Symbol Min. Typ. Max. Unit Remarks DD Protective transistor bias Substrate clock L φsub L setting is the L voltage of the vertical transfer clock waveform, or the same power supply as the L power supply for the driver should be used. Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD. DC Characteristics Item Symbol Min. Typ. Max. Unit Remarks Supply current IDD 3 ma Clock oltage Conditions Item Symbol Min. Typ. Max. Unit Waveform diagram Remarks Readout clock voltage T H, H H = (H + H)/ H3, H L, L, L3, L L = (L3 + L4)/ φ φ = Hn Ln (n = to 4) ertical transfer clock voltage H3 H H4 H HH 0.3 High-level coupling HL 0.3 High-level coupling LH 0.3 Low-level coupling LL 0.3 Low-level coupling Horizontal transfer clock voltage φh HL Reset gate clock voltage φrg RGLH RGLL Input through 0.µF capacitance Low-level coupling RGL RGLm 0. 4 Low-level coupling Substrate clock voltage φsub

4 Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND ertical transfer clock series resistor ertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor Cφ, Cφ3 Cφ, Cφ4 Cφ, Cφ34 Cφ3, Cφ4 Cφ3 Cφ4 CφH, CφH CφHH CφRG CφSUB R, R3 R, R4 RGND RφH 0 Ω RφRG Symbol Min. Typ. Max. Unit Remarks Ω 0 Ω 68 Ω 0 Ω φ φ R Cφ R Hφ RφH RφH Hφ Cφ Cφ CφHH Cφ4 Cφ3 CφH CφH Cφ4 R4 Cφ4 RGND Cφ3 Cφ34 Cφ3 R3 φ4 φ3 ertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RGφ RφRG CφRG Reset gate clock equivalent circuit 4

5 Drive Clock Waveform Conditions () Readout clock waveform 00% 90% II II φm 0% 0% T tr twh tf φm 0 () ertical transfer clock waveform φ φ3 H HH H HH HH HH H HL HL HL H3 HL L LH L3 LH L LL L LL φ φ4 HH HH H H HH HH H HL HL HL H4 HL LH L LH L LL L4 LL L H = (H + H)/ L = (L3 + L4)/ φ = Hn Ln (n = to 4)

6 (3) Horizontal transfer clock waveform tr twh tf 90% φh twl 0% HL (4) Reset gate clock waveform tr twh tf RGH twl RG waveform Point A φrg RGLH RGLL RGL RGLm Hφ waveform 0% RGLH is the maximum value and RGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, RGL is the average value of RGLH and RGLL. RGL = (RGLH + RGLL)/ Assuming RGH is the minimum value during the interval twh, then: φrg = RGH RGL Negative overshoot level during the falling edge of RG is RGLm. () Substrate clock waveform 00% 90% φm 0% SUB 0% (A bias generated within the CCD) φsub tr twh tf 6 φm

7 Clock Switching Characteristics Item Symbol twh twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Remarks Readout clock T µs During readout ertical transfer clock φ, φ, φ3, φ4 0 ns Horizontal transfer clock During imaging During parallel-serial conversion Hφ Hφ Hφ ns µs Reset gate clock φrg ns Substrate clock φsub µs During drain charge When vertical transfer clock driver CXD67AN is used. tf tr ns. 7

8 Image Sensor Characteristics (Ta = C) Item Sensitivity Saturation signal Smear ideo signal shading Dark signal Dark signal shading Flicker Lag Symbol Min. Typ. Max. Unit Measurement method Remarks S sat Sm m m db 3 Ta = 60 C SH 0 % 4 Zone 0 and I % 4 Zone 0 to II' dt dt F Lag 0. m m % % Ta = 60 C Ta = 60 C Zone Definition of ideo Signal Shading 9 00 (H) 6 H 8 0 H () 0 Zone 0, I Zone II, II' 8 Ignored region Effective pixel region 8

9 Image Sensor Characteristics Measurement Method Measurement conditions ) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. ) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black (OB) level is used as the reference for the signal output, and the value measured at point [ A] in the drive circuit example is used. Definition of standard imaging conditions ) Standard imaging condition I: Use a pattern box (luminance: 706cd/m, color temperature of 300K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM00S (t =.0mm) as an IR cut filter and image at F8. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. ) Standard imaging condition II: Image a light source (color temperature of 300K) with a uniformity of brightness within % at all angles. Use a testing standard lens with CM00S (t =.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.. Sensitivity Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of /0s, measure the signal output (s) at the center of the screen and substitute the value into the following formula. S = s 0 0 [m]. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 0 times the intensity with the average value of the signal output, 00m, measure the minimum value of the signal output. 3. Smear Set to standard imaging condition II. With the lens diaphragm at F.6 to F8, adjust the luminous intensity to 00 times the intensity with the average value of the signal output, 00m. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (Sm [m]) of the signal output and substitute the value into the following formula. Sm = 0 log YSm [db] (/0 method conversion value) 9

10 4. ideo signal shading Set to standard imaging condition II. With the lens diaphragm at F.6 to F8, adjust the luminous intensity so that the average value of the signal output is 00m. Then measure the maximum (max [m]) and minimum (min [m]) values of the signal output and substitute the values into the following formula. SH = (max min)/00 00 [%]. Dark signal Measure the average value of the signal output (dt [m]) with the device ambient temperature 60 C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. Dark signal shading After measuring, measure the maximum (dmax [m]) and minimum (dmin [m]) values of the dark signal output and substitute the values into the following formula. dt = dmax dmin [m] 7. Flicker Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the signal output is 00m, and then measure the difference in the signal level between fields ( f [m]). Then substitute the value into the following formula. F = ( f/00) 00 [%] 8. Lag Adjust the signal output value generated by strobe light to 00m. After setting the strobe light so that it strobes with the following timing, measure the residual signal (lag). Substitute the value into the following formula. Lag = (lag/00) 00 [%] FLD Strobe light timing Light Y signal output 00m Ylag (lag) Output 0

11 Hφ Hφ φrg L φsub GND DD φ4 φ3 φ φ GND OUT Drive Circuit XSUB X X XSG X3 XSG X4 Hφ Hφ RG /0 CXD67AN /6 00k / ICX40 (BOTTOM IEW) k / /0 3.3/6 00 SK3 3.9k p M 7.0 [ A] CCD OUT

12 Relative Response Spectral Sensitivity Characteristics (excludes both lens characteristics and light source characteristics) Wave Length [nm] Sensor Readout Clock Timing Chart Odd Field Even Field 3 4 Unit : µs

13 HD Drive Timing Chart (ertical Sync) FLD D BLK 3 4 CCD OUT

14 HD BLK H H Drive Timing Chart (Horizontal Sync) RG 3 4 SUB 4

15 Notes on Handling ) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. ) Soldering a) Make sure the package temperature does not exceed 80 C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.) Cover glass Plastic package 0N 0N.Nm Compressive strength Torsional strength

16 b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the lead bend repeatedly and the metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) ) Others a) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) The brown stain may be seen on the bottom or side of the package. But this does not affect the CCD characteristics. 6

17 .7 3. ± ± 0. ~ ± to 9. ~ 6pin DIP (40mil) D 9 6 C -R A is the center of the effective image area. Package Outline Unit: mm A 6. B' B H 0.3. ± The two points B of the package are the horizontal reference. The point B' of the package is the vertical reference The bottom C of the package, and the top of the cover glass D are the height reference. 4. The center of the effective image area relative to B and B' is (H, ) = (6.,.7) ± 0.mm.. The rotation angle of the effective image area relative to H and is ±. 6. The height from the bottom C to the effective image area is.4 ± 0.0mm. The height from the top of the cover glass D to the effective image area is.94 ± 0.mm. 7. The tilt of the effective image area relative to the bottom C is less than 0µm. The tilt of the effective image area relative to the top D of the cover glass is less than 0µm. ~.7 8. The thickness of the cover glass is 0.7mm, and the refractive index is (For the first pin only) 9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. 7 M 0.3 PACKAGE STRUCTURE Plastic PACKAGE MATERIAL GOLD PLATING 4 ALLOY 0.90g AS-C.-0(E) LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER Sony Corporation