Block Diagram GND. amplifier 5 GND G R B

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1 68 pixel 3 line CCD Linear Seor (Color) Description The is a reduction type CCD linear seor developed for color image scanner. This seor reads A-size documents at a deity of DPI. pin DIP (Plastic) Features Number of effective pixels: 3 pixels (68 pixels 3) Pixel size: 3.µm 3.µm (3.µm pitch) Distance between line: 8µm (8 lines) Single-sided readout Ultra low lag Single power supply Maximum data rate: MHz/Color Input Clock Pulse: CMOS drive Number of output 3 (R, G, B) Package: pin Plastic DIP (mil) Absolute Maximum Ratings Supply voltage DD Operating temperature to + C Block Diagram Driver 8 φrog-r Driver φrog-g Driver 9 φrog-b Pin Configuration (Top iew) D7 D7 D7 D7 D7 D7 7 φrs OUT-G DD φrog-r φrog-b B 68 G 68 R OUT-B OUT-R φrog-g 9 S68 D7 Red Read out gate CCD register D69 S D8 D9 Output amplifier 7 OUT-R S68 D7 Green Read out gate CCD register D69 S D8 D9 Output amplifier OUT-G S68 D7 Blue Read out gate CCD register D69 S D8 D9 Output amplifier 8 OUT-B 6 3 DD φrs Sony reserves the right to change products and specificatio without prior notice. This information does not convey any licee by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits. EA8-PS

2 Pin Description Pin No. Symbol Description Clock pulse input φrs Clock pulse input OUT-G DD φrog-r φrog-b Signal output (green) power supply Clock pulse input Clock pulse input Clock pulse input Pin No. Symbol Description φrog-g Clock pulse input Clock pulse input OUT-R OUT-B Signal output (red) Signal output (blue) Clock pulse input Recommended Supply oltage DD...6 Clock Characteristics Symbol Input capacity of, C, C pf Input capacity of φrs CφRS pf Input capacity of φrog CφROG pf Clock Frequency Symbol,, φrs f, f, fφrs MHz Input Clock Pulse oltage Condition,, φrs, φrog pulse voltage High level Low level.7...

3 Electrooptical Characteristics (Note ) (Ta = C, DD =, fφrs = MHz, Input clock = p-p, Light source = 3K, IR cut filter CM-S (t =.mm)) Symbol Remarks Red RR.98.. Seitivity Green RG.98.. /(lx s) Note Blue RB Seitivity nonuniformity PRNU % Note 3 Saturation output voltage SAT..8 Note Red SER.7. Saturation exposure Green SEG.7. lx s Note Blue SEB Dark voltage average Dark signal nonuniformity DRK DSNU m m Note 6 Image lag IL. % Note 7 Supply current IDD 3 ma Total trafer efficiency TTE 9 98 % Output impedance ZO 36 Ω Offset level OS.7 Note 8 Notes). In accordance with the given electrooptical characteristics, the black level is defined as the average value of D8, D9 to D67.. For the seitivity test light is applied with a uniform inteity of illumination. 3. PRNU is defined as indicated below. Ray incidence conditio are the same as for Note. OUT = m () (MAX MIN)/ PRNU = [%] AE. Use below the minimum value of the saturation output voltage.. Saturation exposure is defined as follows. SAT SE = R Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB. 6. Optical signal accumulated time τ int stands at.ms. 7. OUT-G = m () 8. os is defined as indicated bellow. OUT indicates OUT-R, OUT-G and OUT-B. OUT OS 3

4 Clock Timing Chart φrog φrs D D D3 D7 3 7 D8 D9 D67 D68 D69 S S S678 S679 S68 D7 D7 D7 D7 OUT Optical black ( pixels) Dummy signal (69 pixels) -line output period (7 pixels) Note) The trafer pulses (, ) must have more than 7 cycles. OUT indicates OUT-R, OUT-G, OUT-B. φrog indicates φrog-r, φrog-g, φrog-b.

5 Clock Timing Chart t t φrog t6 t t7 t t3 Clock Timing Chart 3 t7 t6 t9 t φrs t8 t t OUT

6 Clock Pulse Recommended Timing Symbol φrog, pulse timing t φrog pulse high level period t 3 µs φrog, pulse timing t3 µs φrog pulse rise time t φrog pulse fall time t pulse rise time/ pulse fall time t6 pulse fall time/ pulse rise time t7 φrs pulse high level period t8 3 φrs pulse rise time t9 φrs pulse fall time t Signal output delay time t t These timing is the recommended condition under fφrs = MHz. 6

7 Application Circuit.kΩ.kΩ φrog-g IC OUT-B OUT-R Tr Tr IC Ω Ω Ω Ω Ω φrs OUT-G OUT-B DD OUT-R φrog-r φrog-b φrog-g µF 7µF/6 Ω Ω Ω Ω Ω Ω IC Tr IC φrs.kω OUT-G φrog-r φrog-b IC: 7AC Tr: SC78 Data rate fφrs = MHz Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.

8 Example of Representative Characteristics (DD =, Ta = C) Spectral seitivity characteristics (Standard characteristics)..8 Relative seitivity.6.. Dark voltage rate vs. Ambient temperature (Standard characteristics) Wavelength [nm] Output voltage rate vs. Integration time (Standard characteristics) Dark voltage rate Output voltage rate. 3 6 Ta Ambient temperature [ C] Offset level vs. Supply voltage (Standard characteristics) Ta = C. τ int Integration time [ms] Offset level vs. Ambient temperature (Standard characteristics) 8 8 os Offset level [] 6 os DD.7 os Offset level [] 6 os Ta 3m/ C. DD Supply voltage [] Ta Ambient temperature [ C] 8

9 Notes of Handling ) Static charge prevention CCD image seors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Itall a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image seor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. ) Notes on Handling CCD Packages The following points should be observed when handling and italling packages. a) Remain within the following limits when applying static load to the package: () Compressive strength: 39N/surface (Do not apply load more than.7mm iide the outer perimeter of the glass portion.) () Shearing strength: 9N/surface (3) Teile strength: 9N/surface () Torsional strength:.9nm Cover glass Plastic portion 39N 9N 9N.9Nm Ceramic portion () Adhesive () (3) () b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for itallation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the package to crack or dust to be generated. () Applying repetitive bending stress to the external leads. () Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. () Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. () Applying the metal a crash or a rub agait the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) Soldering a) Make sure the package temperature does not exceed 8 C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 3W soldering iron and solder each pin in less then seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. 9

10 ) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condeation, preheat or precool when moving to a room with great temperature differences. ) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditio. 6) CCD image seors are precise optical equipment that should not be subject to mechanical shocks.

11 Package Outline : mm pin DIP (mil). ±.3.7 ± (3.µm 68Pixels) to 9. ±.3 H No. Pixel (Green). ± ±.6. ±....3 M ±.. The height from the bottom to the seor surface is.38 ±.3mm.. The thickness of the cover glass is.7mm, and the refractive in.. PACKAGE MATERIAL Plastic, Ceramic LEAD TREATMENT GOLD PLATING LEAD MATERIAL ALLOY Sony Corporation PACKAGE MASS DRAWING NUMBER.3g LS-B3(E)