OEIL Manual. Interconnect Design. Sensitivity Analysis. Attenuation Analysis. Crosstalk Noise Analysis. Bandwidth Density

Size: px
Start display at page:

Download "OEIL Manual. Interconnect Design. Sensitivity Analysis. Attenuation Analysis. Crosstalk Noise Analysis. Bandwidth Density"

Transcription

1 OEIL Manual Version 3.0 December 2015 Optical/Photonic Technology for Interconnected Computing System Lab Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology eexu Interconnect Design OEIL Device Library Crosstalk Noise Analysis Attenuation Analysis Sensitivity Analysis Power Consumption Analysis Area Analysis Bandwidth Analysis Latency Analysis Crosstalk Noise Coefficienct Attenuation& Sensitivity Energy Efficiency Area Bandwidth Density Latency Figure 1: The flow chart of OEIL simulator. 1

2 CONTENTS 1 Introduction 3 2 How to Use OEIL Usage Instructions The Parameter File The Configuration File The Output File Models for Optical Interconnect Crosstalk Noise Attenuation Receiver Sensitivity Energy Consumption Bandwidth Density Latency Notation Table Models for Electrical Interconnect Crosstalk Noise Attenuation Receiver Sensitivity Energy Consumption Bandwidth Density Latency Notation Table Models for Serializers and Deserializers SerDes Modelling Energy Efficiency and area Latency Notation Table Reference 18 Version History 18 2

3 1 INTRODUCTION OEIL is an analysis tool for optical and electrical interfaces and links. Fig. 1 illustrates the internal structure of OEIL. The publicly released OEIL is implemented in C code, and it is available online with documentation at [1]. OEIL has a complete library of devices for inter-chip interconnects. It analyzes power consumptions, energy efficiencies, bandwidths, bandwidth densities and latencies of optical and electrical inter-chip interconnects. As can be seen from the figure, the main body of OEIL includes models for crosstalk noises, attenuations, receiver sensitivities, power consumptions, bandwidths and latencies. This tool is designed based on the proposed analytical models in previous sections. The input files of tool OEIL include interconnect configurations and device parameters, and the output results are written in output. The configurations of interconnects such as data rate, interconnect length and number of parallel interconnects are described in file interconnect configurations. The parameters of board, microresonator, trace, waveguide, transmitter and receiver can be found in file device parameters. Those files have two versions, which are differed by key words electrical and optical. In additional to the above results, OEIL also generates the intermediate results of analytical models such as crosstalk talk coefficients, attenuations, and receiver sensitivities. OEIL evaluates the performance of inter-chip interconnects from end to end, which consists of on-chip interconnect, off-chip interconnect and interfaces between them [2]. For electrical interconnects, the device library includes parameters of wires on chip, traces on board as well as electrical copper pins. For optical interconnects, the device library includes parameters of silicon waveguides on chip, polymer waveguides on board, and optical lens or couplers. Additionally, OEIL is also able to evaluate the performance of interconnects, which connect 2.5D or 3D chips. The device library includes parameters of through-silicon vias (TSVs) and bumps among stacked dies. Configurations of the 2.5D or 3D chip can be defined on the configuration file. This tool OEIL is able to not only analyze the performance of inter-chip interconnects but also provide necessary parameters for system simulators. The configuration file is able to describe all kinds of interconnects in a network. OEIL is verified by data from previous published technical reports. It shows good fitting between OEIL and the collected data. The verification will be discussed with more details in next subsection. By updating the device library, OEIL is able to follow the development of technologies. The optical transmission systems are promising candidates for high speed inter-chip interconnects, and have been implemented in various prototypes. In optical interconnect, signals at different wavelengths will not interfere with each other, the wavelength-division multiplexing (WDM) technology are used, which multiplexes a number of signals at different wavelengths in a single optical waveguide. This technology could effectively increase the total bandwidth of optical interconnects. We mathematically build models for their crosstalk noises, attenuations and receiver sensitivities, and use three parameters to compare the performance of inter-chip interconnects: energy consumption, bandwidth density and latency. In our input files, we make assumptions of various parameters based on the state-of-the-art technologies. They could also be modified according to the real systems configured by users. The output file of this simulator covers the most important information of optical interconnects. 3

4 2 HOW TO USE OEIL Before running this simulator, users could modify the parameter file and configuration file in the input folder. Please follow the instructions in this chapter, compile and run the software. The calculated results could be obtained from the result file in the output folder. Enter the directory Compile the software Run the software 2.1 USAGE INSTRUCTIONS cd./oeilv3.0/source g++ OEIL.c -o OEIL -lm./oeil 2.2 THE PARAMETER FILE The program would load the parameter file in order to build models for optical devices. The relationship between parameters and notations are listed in Table 1. The parameter file includes optical and electrical sections. File path:./source/parameter_optical.txt #transmitter# 0.2 laser_slope_efficiency n/a //slope efficiency of laser 1 laser_threshold_current ma //threshold current of laser 0.1 laser_extinction_ratio n/a //extinction ratio of laser 900 laser_area um 2 //area of laser 3 laser_voltage V //supply voltage of laser 1.5 driver_voltage V //supply voltage of driver #waveguide# 0.35 optical_pin_loss n/a //coupling efficiency of pin 250 optical_pin_height um //height size of pin 250 optical_pin_width um //width size of pin propagation_loss cm 1 //propagation loss of pin 1.55 wg_refractive_index n/a //refractive index of waveguide 62.5 wg_pitch um //The pitch of waveguide #receiver# 14.1 signal_to_noise_ratio n/a //signal to noise ratio 10 tia_noise_density pa Hz //noise density of TIA 1 tia_transimpendance kω //transimpendance of TIA 10 la_voltage_threshold mv //threshold voltage of LA 1 pd_responsity A/W //responsity of PD 60 pd_capacitance ff //input capacitance of PD 4

5 #microresonator# 10 mr_radius_range um //estimated radius of MR mr_attenuation n/a //round trip attenuation of ring 0.3 mr_power_split_k n/a //power split ratio into ring 2.65 mr_refractive_index n/a //refractive index of ring 0.05 mr_tuning_power mw //tuning power of MR 0.12 mr_static_power mw //static power of MR 0.12 mr_dynamic_power mw/gbps //dynamic power of MR 125 mr_area um 2 //area of MR #serdes# 0.1 serdes_cur_optical ma/gbps //unit current of SerDes circuit 40 serdes_area_optical um 2 /Gbps //unit area of SerDes circuit File path:./source/parameter_electrical.txt #board# 17.4 pcb_layer_height mil //height of pcb layer 4 pcb_trace_width mil //width of pcb trace 1.4 pcb_trace_height mil //height of pcb trace 24.0 pcb_trace_pair_pitch mil //pitch of pcb trace pair pcb_trace_loss_tangent n/a //loss tangent of pcb trace 3.6 pcb_dielectric n/a //dielectric of pcb material 1 package_pin_pitch n/a //pitch of package pin #trace# 13.8 trace_half_depth_f MHz //half depth frequency of trace 64.4 trace_characteristic_z Ohm //characteristic res. of trace trace_unit_length_c pf/cm //unit length cap. of trace trace_direct_current_r Ohm //direct current res. of trace 104 trace_input_impendance Ohm //input impendance of trace 1 electrical_pin_load_c pf //cap. of electrical pin load #transceiver# 10 la_threshold_voltage mv //threshold voltage of amplifier 0.05 la_offset_coefficent n/a //offset coefficient of amplifier 0.01 la_coefficent_margin n/a //coefficent margin of amplifier 1.5 circuit_voltage V //supply voltage of circuit #serdes# 0.1 serdes_cur_electrical ma/gbps //unit current of SerDes circuit 40 serdes_area_electrical um 2 /Gbps //unit area of SerDes circuit 5

6 2.3 THE CONFIGURATION FILE The program would load the configuration file in order to build models for optical devices. The relationship between configurations and notations are listed in Table 1. The configuration file includes optical and electrical sections. File path:./source/configuration_optical.txt 10 data_rate_optical GHz //bandwidth of one opti. signal 25 length_optical cm //length of opti. interconnect 8 serdes_ratio_optical n/a //serdes ratio of serdes 8 number_of_wavelengths n/a //number of wavelengths 1550 laser_wavelength nm //laser working wavelength 0 is_direct_modulation n/a //if it is directly modulated File path:./source/configuration_electrical.txt 10 data_rate_electrical Gbps //bandwidth of one elec. signal 40 length_electrical cm //length of elec. interconnect 8 serdes_ratio_electrical n/a //serdes ratio of serdes 8 number_of_pairs n/a //number of trace pairs 2.4 THE OUTPUT FILE The program would output the result file after calculation. The file includes both the intermediate results as well as the final results obtained from our models. The output file includes optical and electrical sections. File path:./source/output_optical.txt sensitivity_oma mw //receiver sensitivity crosstalk_coefficient n/a //crosstalk noise coefficient total_attenuation n/a db //total attenuation energy_consumption pj/bit //energy consumption area_density Gbps/mm 2 //area bandwidth density linear_density Gbps/mm //linear bandwidth density area mm 2 //area latency ns //latency File path:./source/output_electrical.txt sensitivity_la mw //receiver sensitivity crosstalk_coefficient n/a //crosstalk noise coefficient total_attenuation n/a db //total attenuation energy_consumption pj/bit //energy consumption area_density Gbps/mm 2 //area bandwidth density linear_density Gbps/mm //linear bandwidth density area mm 2 //area latency ns //latency 6

7 3 MODELS FOR OPTICAL INTERCONNECT We build models for the crosstalk noise, attenuation and receiver sensitivity of optical interconnect, and analyze its performance from the aspects of energy consumption, bandwidth density and latency. All the formulations are general to different technologies. 3.1 CROSSTALK NOISE The micro-resonator (MR) is an important device in optical interconnect. r 2 and k 2 are the power splitting ratios of the coupler between the ring and waveguide. We assume r 2 + k 2 = 1. Besides, a is the round trip attenuation of the ring. The ratio of the drop port power to the input port power is the function of light wavelength, and is expressed in Equation 1. T d (λ) = (1 r 2 ) 2 a 1 2r 2 a cosθ(λ) + r 4 a 2 (1) Here phase shift θ(λ) is the function of working frequency λ, which is expressed in Equation 2. Besides, n e is the effective refractive index of the ring, and R is the radius of the ring. θ(λ) = 4π 2 n e R/λ (2) At resonance wavelength λ n, the value of T d is maximized, and we use this property to filter signal λ n out of multiple signals in one waveguide. However, there will be small fraction of other signals appearing on drop port. The crosstalk noise coefficient in optical interconnect is the summation of these signals, and is expressed in Equation 3. ε o =... + T d (λ n 1 ) + T d (λ n+1 ) + T d (λ n+2 ) +... (3) Suppose there are m different wavelengths in the WDM optical system. The spacing between two neighboring wavelengths is λ. In worst case, n equals to m/2, and the maximum crosstalk coefficient is expressed in Equation 4. m o /2 ε o = 2 T d (λ n + i λ) (4) i=1 3.2 ATTENUATION The attenuation A is the ratio of the received optical power to the transmitted power. It mainly includes the coupling loss of optical pins, the passing by and insertion loss of micro-resonators, and the attenuation of waveguides or fibers. It is expressed in Equation (5). A o = η 2 o e α ol L 2 p (m o 1)T 2 d (λ n) (5) Here η is the coupling efficiency of each optical pin. α is the attenuation coefficient of waveguide, and L is the interconnect length. Besides, L p (n) is the passing by loss, and T d (λ) is the insertion loss of one micro-resonator. There is one micro-resonator inserted after the laser and another one before the photodetector. Optical signals will be attenuated if they pass by 7

8 micro-resonators. Signal λ n will be attenuated by a sequence of micro-resonators, whose resonance wavelength ranges from λ 0 to λ n 1. The ratio of the pass port power to the input port power is the function of light wavelength, and is expressed in Equation (6). T p (λ) = r 2 a 2 2r 2 acosθ + r 2 1 2r 2 a cosθ(λ) + r 4 a 2 (6) At their resonance wavelength, the value of T p is minimized. At other wavelength, the attenuation factor is close to one. T p (λ) is the frequency spectrum of micro-resonator with resonance wavelength λ n, and λ is the spacing between two neighboring wavelengths. The total passing by loss is expressed in Equation (7). In worst case, n equals to m 1. L p (n) = n T p (λ n + i λ) (7) i=1 3.3 RECEIVER SENSITIVITY The sensitivity of optical receiver is the minimum optical modulation amplitude (OMA) required in the receiver end. Suppose the noise is Gaussian distributed with standard deviations σ. If the signal to noise ratio equals to SNR, the logic 1 and logic 0 voltage levels are ± 1 2 SNR σ away from the theoretical decision point in the middle. We open the theoretical decision point by at least double the threshold voltage V th of the limiting amplifier (LA). The OMA is expressed in Equation (8). Here i n is the input referred RMS noise density of the transimpedance amplifier (TIA), f is the frequency of optical modulated signal, Z ti a is the transimpedance, and ρ is the responsivity of photodetector (PD). OMA = i n f 0.5 SNR + 2V th Z 1 ti a ρ (8) 3.4 ENERGY CONSUMPTION The total power consumption can be expressed in Equation (9). Here I mod and I bi as are the supply current and bias current of laser driver, I ti a and I l a are the supply current of the transimpedance amplifier and the limiting amplifier. We use two different supply voltages. V l and V c are the supply voltage of lasers and electrical circuits. P o = (I mod + I bi as )V l + (I ti a + I l a )V c (9) Parameter ε is the crosstalk noise coefficient. Extinction ratio r e is defined as the power ratio between logic level 0 and logic level 1. The minimum required eye amplitude in optical interconnect is 1 - ε - r e, which corresponds to OMA, the sensitivity of optical receiver. The maximum driving current required from the laser is the summation of supply current and bias current, and it is expressed in Equation (10). Here A is the attenuation of the entire optical interconnect. η s and I th are the slope efficiency and threshold current of laser diode. I mod + I bi as = OMA A o (1 ε o r e )η s + I th (10) 8

9 The supply current of transimpedance amplifier is proportional to the input pole of the transimpedance amplifier, and it is expressed in Equation (11). Here f is the working frequency of the transimpedance amplifier, C pd is the capacitance of photodetector, and V is the saturation voltage of the transistor in transimpedance amplifier. I ti a πf C pd V (11) We evaluate the energy consumption, which is defined as the energy consumed by the interconnects when they transmit unit bits of information. It is expressed in Equation (12). Here P is the power consumption of optical signal. The signal bandwidth is 2f. Each signal does not interfere with other signals in the same waveguide. Power P Energy Consumption = 2 Frequency f (12) 3.5 BANDWIDTH DENSITY The number of signals in one interconnect equals the free spectral range (FSR) divided by the spacing between two neighboring wavelengths. FSR is defined as the spacing between two successive resonance peaks in drop port spectrum, and its value is expressed in Equation (13). Here λ is the optical signal wavelength. R is the radius of micro-resonator, and n e is the effective refractive index of the waveguide in the micro-resonator. λ2 FSR = 2πn e R (13) The bandwidth of each optical interconnect equals the transmission bandwidth of one optical signal multiplied by the number of signals in one interconnect, and it is expressed in Equation (14). Here λ is the wavelength spacing between two neighboring signals. f is the modulation frequency of the optical signal so that the bandwidth is 2f. B o = 2 FSR f (14) λ At the bottom of the package, there are a grid of pins. The area bandwidth density is defined as the maximum bandwidth in unit area, and is expressed in Equation (15). Here B is the bandwidth of a single interconnect, and S = l h l w is the area of the optical pin. Area Density = Bandwidth B Area S (15) At each layer of the board, there are parallel interconnects. The linear bandwidth density is defined as the maximum bandwidth in unit width, and is expressed in Equation (16). Here B is the bandwidth of each interconnect, and p is the interconnect pitch. Linear Density = Bandwidth B Pitch p (16) 9

10 3.6 LATENCY We assume that the signal has a long pulse with narrow bandwidth, and ignore its nonlinear effects. The speed of optical signal is hence determined by its group velocity, with which the envelope of a pulse propagates in the optical medium. The latency is expressed in Equation (17). Here c is the light speed in vacuum. n g is the group reflection index. v o = c n g (17) In addition to the propagation delay, the parasitic capacitances of these electrical modules will also generate RC delays, whose values could not exceed one bit period 1/2f. The interconnect latency is expressed in Equation (18). Here L is the interconnect length, v is the signal propagation speed, and τ RC is the RC delay of electrical modules. Latency = Length L Speed v + Delay τ RC (18) 3.7 NOTATION TABLE The relationship between the notations in this section and the parameter/configuration name in OEIL are listed in Table 1. laser_slope_efficiency η s laser_threshold_current I th laser_extinction_ratio r e laser_voltage V l driver_voltage V c optical_pin_loss η o optical_pin_height l h optical_pin_width l w propagation_loss α wg_refractive_index n g wg_pitch p o signal_to_noise_ratio SNR tia_noise_density i n tia_transimpendance Z ti a la_voltage_threshold V th pd_responsity ρ pd_capacitance C pd mr_radius_range R mr_attenuation a mr_power_split_k k mr_refractive_index n e data_rate_optical 2 f length_optical L number_of_wavelengths m o laser_wavelength λ Table 1: The mapping between notations and optical parameter/configuration 10

11 4 MODELS FOR ELECTRICAL INTERCONNECT We build models for the crosstalk noise, attenuation and receiver sensitivity of electrical interconnect, and analyze its performance from the aspects of energy consumption, bandwidth density and latency. All the formulations are general to different technologies. 4.1 CROSSTALK NOISE In electrical interconnects, the crosstalk coefficient is defined as the ratio of noise amplitude to signal amplitude. Compared with single-ended traces, the crosstalk noise in differential traces is relatively small. The near-end crosstalk noise (NEXT) among parallel traces on board is the main source of crosstalk noise. This is because for properly terminated low-loss striplines, the far-end crosstalk noise (FEXT) is relatively very low. We define c(d) to be the crosstalk coefficient between two parallel traces with distance d, and it is expressed in Equation 19. c(d) = H 2 /(4d 2 + H 2 ) (19) In Equation 19, H is the distance between two metal layers. Parallel differential traces on the PCB board are analyzed. The crosstalk coefficient between the differential pair n and n + i is expressed in Equation 20. N d (i ) = c( i p e 2w) 2c( i p e ) + c( i p e + 2w) (20) The victim trace pair n has two traces in opposite directions and the aggressor trace pair n 1 also has two traces in opposite directions. Therefore, the crosstalk coefficient between two trace pairs is the summation of four terms. Apart from trace pair n 1, there are other aggressor trace pairs, such as n+1 and n+2. The total coefficient ε e is expressed in Equation 21. ε e =... + N d ( 1) + N d (1) + N d (2) +... (21) It is assumed that there are m e parallel trace pairs on the PCB board. The trace pair located in the middle of those trace pairs has the the largest crosstalk noises, and its crosstalk coefficient is expressed in Equation 22. m e /2 ε e = 2 N d (i ) (22) i=1 4.2 ATTENUATION In electrical interconnects, trace attenuation A e is the ratio of output signal amplitude to input signal amplitude, and is expressed in Equation (23). α e is the attenuation coefficient of trace, L is the interconnect length. Additionally, η e is the attenuation of each electrical pin, and there are two pins in a single electrical interconnect. A e = η 2 e e α e L (23) The attenuation coefficient α e is expressed in Equation (24), where the first and second terms are called skin effect loss and dielectric loss, respectively. In striplines, w and h are width and 11

12 height of trace. R dc is the direct current resistance, Z 0 is the characteristic impedance, and C 0 is the capacitance per unit length. t anδ D is the loss tangent in dielectric material. Their values will be discussed in Section VI. Additionally, f s is the frequency when skin depth equals half of trace height h. f is the working frequency of the signal. The attenuation coefficient is increased if f is increased. α e = R dc(w + h) 2Z 0 w ( f f s ) πf C 0 t anδ D Z 0 (24) The current in electrical interconnects will drive the electrical pins on both side of the trace. After infinite time, the voltage on the pin will be driven to the full swing voltage. However, for each bit signal, the time to drive the pin is half of the period 1/f. The ratio of the voltage after that given time to the full swing voltage is defined as the attenuation of each pin η e, and it is expressed in Equation (25). To drive the pin, current will be attenuated by resistance Z 0 and capacitance C p of electrical pin. η e = 1 e 1 2Z 0 Cp f (25) 4.3 RECEIVER SENSITIVITY In electrical interconnects. The driver injects currents through the pair of differential traces, and induces a voltage difference between the two ports of limiting amplifier. Only when this voltage difference is less than V th or greater than V th, signals can be detected by the limiting amplifier. The sensitivity of electrical receiver is defined as double the threshold voltage V th of limiting amplifier. 4.4 ENERGY CONSUMPTION The total power consumption is expressed in Equation (26). Current I 0 is the supply current of the driver, I l a is the supply current of the limiting amplifier, and V c is the supply voltage of these two components. The supply voltage is V c. The value of I l a is approximately proportional to the working frequency of limiting amplifier. P e = (2I 0 + I l a )V c (26) The received electrical signal has two voltage levels named V 1 and V 0, which represent logic levels of 1 and 0. A e and ε e are the attenuation and crosstalk noise coefficient of electrical interconnect. Their values have been discussed in the previous section. ε c is called transmitter offset coefficient, which is defined as the ratio of offset amplitude to signal amplitude. The minimum required eye amplitude in electrical interconnects is A e - ε e - ε c, which corresponds to V th, the sensitivity of electrical receivers. The minimum supply current required from the driver is double the current I 0, which is expressed in Equation (27). Z d is the differential impendence between two inputs of the differential pair. I 0 = 2V th (A e ε e ε c )Z d (27) 12

13 We evaluate the energy consumption, which is defined as the energy consumed by the interconnects when they transmit unit bits of information. It is expressed in Equation (28). Here P is the power consumption of optical signal. The signal bandwidth is 2f. Each signal does not interfere with other signals in the same waveguide. Power P Energy Consumption = 2 Frequency f (28) 4.5 BANDWIDTH DENSITY In electrical interconnects, there is only one signal in each differential pair. Therefore, the bandwidth of each electrical interconnect equals double the frequency, 2 f. If the signal frequency is increased, trace attenuation is increased. The value of coefficient margin ε, expressed in Equation (29), will be decreased. It is possible that these signals will not be detected by receiver because of noises. Every receiver has a minimum required coefficient margin, and the signal frequency of electrical interconnects is limited. Parameters ε e and ε c have been discussed in the previous subsection. A ε e ε c = ε (29) In Equation (29), ε is the coefficient margin, which is assumed to be 0.01 in this model. As mentioned in the previous section, the attenuation coefficient α e is the function of working frequency f, and this relationship could be expressed as α e = A (f ). Function A is a monotonically increasing function, and its inverse function is A 1. The maximum bandwidth of a single electrical interconnect is the function of trace length, which is expressed in Equation (30). It can be seen that if the interconnect length is increased, the bandwidth of electrical interconnects will be decreased. B e = 2A 1 ( ln(ε e + ε c + ε) ) (30) L At the bottom of the package, there are a grid of pins. The area bandwidth density is defined as the maximum bandwidth in unit area, and is expressed in Equation (31). Here B is the bandwidth of a single interconnect, and S = l h l w is the area of the optical pin. Area Density = Bandwidth B Area S (31) At each layer of the board, there are parallel interconnects. The linear bandwidth density is defined as the maximum bandwidth in unit width, and is expressed in Equation (32). Here B is the bandwidth of each interconnect, and p is the interconnect pitch. Linear Density = Bandwidth B Pitch p (32) 13

14 4.6 LATENCY In stripline design, copper traces on the PCB board are surrounded by dielectric material. When an electrical signal propagates along the trace, its speed is determined by the speed of a changing electric and magnetic field, which is in fact the speed of light in the material. The propagation speed of electrical signals is related to the relative dielectric constant of that material, and is expressed in Equation (33). c is the light speed in vacuum, which is about 12 inches per nanosecond. ɛ r is the relative dielectric constant of the material in the PCB board, and the values of ɛ r are different in different PCB boards. The signal speed is inversely proportional to the square root of relative dielectric constant. v e = c ɛr (33) In addition to the propagation delay, the parasitic capacitances of these electrical modules will also generate RC delays, whose values could not exceed one bit period 1/2f. The interconnect latency is expressed in Equation (34). Here L is the interconnect length, v is the signal propagation speed, and τ RC is the RC delay of electrical modules. Latency = Length L Speed v + Delay τ RC (34) 4.7 NOTATION TABLE The relationship between the notations in this section and the parameter/configuration name in OEIL are listed in Table 2. pcb_layer_height H pcb_trace_width w pcb_trace_height h pcb_trace_pair_pitch p e pcb_loss_tangent t anδ D pcb_dielectric ɛ r package_pin_pitch Se trace_half_depth_f f s trace_characteristic_z Z 0 trace_unit_length_c C 0 trace_direct_current_r R dc trace_input_impendance Z d electrical_pin_load_c C p la_threshold_voltage V th la_offset_coefficent ɛ c la_coefficent_margin ɛ circuit_voltage V c data_rate_electrical 2 f length_electrical L number_of_pairs m e number_of_stack_dies m d Table 2: The mapping between notations and electrical parameter/configuration 14

15 5 MODELS FOR SERIALIZERS AND DESERIALIZERS We build models for the energy efficiency, area and latency of serializers and deserializers. The SerDes models are integrated in both optical interconnects and electrical interconnects. All the formulations are general to different technologies. 5.1 SERDES MODELLING In E-O interfaces(fig. 2) the multiplexer blocks are important components, which select one of several input signals and forward the data from selected input port to output port. The basic multiplexer block has two inputs and one output. To store the bits of information during each clock cycle, three flip-flops are implemented. Clock signals are used to select input signals. In this design, input 0 is selected when clock signal is low, and input 1 is selected when clock signal is high. Multiplexer blocks in different stages are connected to different frequencies. A 1/2 clock divider is implemented in each stage to provide clock signals with different speeds. An array of microresonators are implemented along the waveguide to modulate N different optical wavelengths. Each microresonator has a unique resonance wavelength, and belongs to one of the E-O interfaces. In a basic multiplexer block, the output signal is delayed. In O-E interfaces(fig. 2), the demultiplexer blocks select one of several output signals and forward the data from input port to selected output port. which has one input and two outputs. Similarly, three flip-flops are implemented in demultiplexer blocks to store the bits of information. Clock signals are used to select output signals. In this design, output 0 is selected at the rising clock edge, and output 1 is selected at the falling clock edge. A 1/2 clock divider is implemented in each stage to provide clock signals with different frequencies. In optical WDM systems, each microresonator has a unique resonance wavelength, and belongs to one of the O-E interfaces. In a basic demultiplexer block, one of two parallel output signals is delayed. In0 In1 In2 In3 Out0 Out1 Out2 Out tb 2tb 6tb :1 Mux 2:1 Mux 1/4tb 1:2 Demux 1:2 Demux 1/4tb 2tb 2tb /2 Divider 2tb /2 Divider 2:1 Mux 1/2tb 1:2 Demux 1/2tb 3tb Driver Clock Generator Amplifer Clock Source Wavegudie PD Wavegudie Laser MR Output Input MR Figure 2: Basic Structures of E-O interface and O-E interface. 15

16 5.2 ENERGY EFFICIENCY AND AREA It is assumed that I o is the supply current of a single gate running at full clock speed, and the supply currents of other gates are scaled by their working frequencies. Therefore, the supply current of each component in multiplex blocks can be expressed in the unit I o. Table 3 shows the current breakdown of basic multiplexer blocks. The supply currents of multiplexers, flip-flops, and clock dividers running at full speed are 1I o, 1I o and 2I o, respectively. In R:1 E-O interface, the total current consumed by multiplexer blocks are about 5log 2 R I o. Assuming supply voltages are fixed, the power consumption of each component is proportional to the supply current I o. All of them can be expressed in the unit P e, which is the power consumption of a single gate. Table 4 shows the current breakdown of basic demultiplexer blocks. In 1:R O-E interface, the total current consumed by demultiplexer blocks are about 4log 2 R I o. P e = I 0 (2f ) V dd S e = S 0 (2f ) (35) It is assumed that S e is the area of a single gate running at full clock speed, and the areas of other gates are scaled by their working frequencies. The area breakdown of multiplexer blocks is similar to current breakdown. In R:1 E-O interface and 1:R O-E interface, the areas are about 5log 2 R S e and 4log 2 R S e, respectively. Power consumptions and areas of multiplexer blocks in both interfaces are summarized in Table 5, where unit power consumption P e and unit area S e are expressed in Equation 35. Component 4:1 Serializer 8:1 Serializer 16:1 Serializer R:1 Serializer Multiplexer l og 2 R Flip-flop l og 2 R Clock Divider /R Total (I 0 ) l og 2 R Table 3: Current Breakdown of Serializer Component 1:4 Deserializer 1:8 Deserializer 1:16 Deserializer 1:R Deserializer Flip-flop log 2 R Clock Divider /R Total (I 0 ) log 2 R Table 4: Current Breakdown of Deserializer E-O (P e ) E-O (S e ) O-E (P e ) O-E (S e ) Interface 5log 2 R 5log 2 R 4log 2 R 4log 2 R Table 5: Comparison of Power Consumption P e and Area S e 16

17 Power consumption of driver is denoted as P d. Each time the voltage level of PN junction is reversed, it is charged or discharged by the driver, where energies are consumed. On the other hand, power consumption of microresonator is denoted as P m. When voltage level of PN junction is high, it is forward biased, energies are consumed because of the direct current flowing through the PN junction. Power consumptions P d and P m are expressed in Equation 36. The dynamic driver power consumption is 1/4. The static microresonator power is 1/2. P d = 2f C m V 2 m P m = I m V m (36) P d is function of data rate f. C m is the input capacitance of microresonator. V m is the supply voltage of microresonator. P m, on the other hand, is not function of data rate f. I m is the direct current of microresonator. The area of each transmitter module S m in E-O interface is related to the size of microresonator. Besides, S l is the area of each on-chip laser. 5.3 LATENCY The latency of inter-chip interconnects is the amount of time it takes for the head of signals to travel from end to end. It includes three parts: the multiplexer/demultiplexer delay, the RC delay and the propagation delay. It is assumed that the bit time of serial optical signals is t b and the propagation delay is t p. Latencies of E-O interface and O-E interface are denoted as T eo and T oe, and expressed in Equation 37. The multiplexer delay in E-O interfaces are (R-1) t b. The average demultiplexer delay in O-E interfaces are (R-1) t b. On the other hand, the RC delays in all interfaces are assumed to be t b. T eo =Rt b + t p T oe = Rt b + t p (37) The total latency is the summation of multiplexer/demultiplexer delay, RC delay and propagation delay. t b is expressed as 1/f, where f is the data rate of serial optical signals. t p is expressed as nl/c, where n is the refractive index of optical interconnect. c is the light speed in vacuum, and L is the length of optical waveguide. R is the parallel-to-serial ratio of interfaces. 5.4 NOTATION TABLE The relationship between the notations in this section and the parameter/configuration name in OEIL are listed in Table 6. serdes_ratio_optical R serdes_ratio_electrical R serdes_cur_optical I o serdes_cur_electrical I o serdes_area_optical S 0 serdes_area_electrical S 0 laser_area S l mr_area S m mr_tuning_power P t mr_static_power P m mr_dynamic_power P d /2f Table 6: The mapping between notations and SerDes circuit 17

18 REFERENCES [1] Optical and Electrical Interfaces and Links (OEIL). [Online]. Available: ust.hk/~eexu. [2] Z. Wang, J. Xu, P. Yang, X. Wang, Z. Wang, L. H. Duong, Z. Wang, H. Li, R. K. Maeda, X. Wu, Y. Ye, and Q. Hao, Alleviate chip I/O pin constraints for multicore processors through optical interconnects, in Design Automation Conference (ASP-DAC), th Asia and South Pacific, Jan VERSION HISTORY Revision Date Author(s) Description 1.0 DEC, 2014 Zhehui Wang, Jiang Xu, Peng Yang, Internal released Zhifei Wang, Luan Huu Kinh Duong, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda 2.0 AUG, 2015 Zhehui Wang, Jiang Xu, Peng Yang, Basic analytical model Zhifei Wang, Luan Huu Kinh Duong, Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda 3.0 DEC, 2015 Zhehui Wang, Jiang Xu, Peng Yang, Add SerDes analyses Zhifei Wang, Luan Huu Kinh Duong, Add area analyses Xuan Wang, Zhe Wang, Haoran Li, Rafael Kioji Vivas Maeda 18

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 Improve Chip Pin Performance Using Optical Interconnects Zhehui Wang, Student Member, IEEE, JiangXu,Member, IEEE, Peng Yang, Student Member,

More information

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 A Holistic Modeling and Analysis of Optical Electrical Interfaces for Inter/Intra-chip Interconnects Zhehui Wang, Student Member, IEEE,

More information

OTemp: Optical Thermal Effect Modeling Platform User Manual

OTemp: Optical Thermal Effect Modeling Platform User Manual OTemp: Optical Thermal Effect Modeling Platform User Manual Version 1., July 214 Mobile Computing System Lab Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology

More information

CHAPTER 4 RESULTS. 4.1 Introduction

CHAPTER 4 RESULTS. 4.1 Introduction CHAPTER 4 RESULTS 4.1 Introduction In this chapter focus are given more on WDM system. The results which are obtained mainly from the simulation work are presented. In simulation analysis, the study will

More information

UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency

UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency UMAINE ECE Morse Code ROM and Transmitter at ISM Band Frequency Jamie E. Reinhold December 15, 2011 Abstract The design, simulation and layout of a UMAINE ECE Morse code Read Only Memory and transmitter

More information

A Fully Integrated 20 Gb/s Optoelectronic Transceiver Implemented in a Standard

A Fully Integrated 20 Gb/s Optoelectronic Transceiver Implemented in a Standard A Fully Integrated 20 Gb/s Optoelectronic Transceiver Implemented in a Standard 0.13 µm CMOS SOI Technology School of Electrical and Electronic Engineering Yonsei University 이슬아 1. Introduction 2. Architecture

More information

DDR4 memory interface: Solving PCB design challenges

DDR4 memory interface: Solving PCB design challenges DDR4 memory interface: Solving PCB design challenges Chang Fei Yee - July 23, 2014 Introduction DDR SDRAM technology has reached its 4th generation. The DDR4 SDRAM interface achieves a maximum data rate

More information

1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs

1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise Transimpedance Preamplifiers for LANs 19-4796; Rev 1; 6/00 EVALUATION KIT AVAILABLE 1.25Gbps/2.5Gbps, +3V to +5.5V, Low-Noise General Description The is a transimpedance preamplifier for 1.25Gbps local area network (LAN) fiber optic receivers.

More information

Microcircuit Electrical Issues

Microcircuit Electrical Issues Microcircuit Electrical Issues Distortion The frequency at which transmitted power has dropped to 50 percent of the injected power is called the "3 db" point and is used to define the bandwidth of the

More information

** Dice/wafers are designed to operate from -40 C to +85 C, but +3.3V. V CC LIMITING AMPLIFIER C FILTER 470pF PHOTODIODE FILTER OUT+ IN TIA OUT-

** Dice/wafers are designed to operate from -40 C to +85 C, but +3.3V. V CC LIMITING AMPLIFIER C FILTER 470pF PHOTODIODE FILTER OUT+ IN TIA OUT- 19-2105; Rev 2; 7/06 +3.3V, 2.5Gbps Low-Power General Description The transimpedance amplifier provides a compact low-power solution for 2.5Gbps communications. It features 495nA input-referred noise,

More information

Impact of High-Speed Modulation on the Scalability of Silicon Photonic Interconnects

Impact of High-Speed Modulation on the Scalability of Silicon Photonic Interconnects Impact of High-Speed Modulation on the Scalability of Silicon Photonic Interconnects OPTICS 201, March 18 th, Dresden, Germany Meisam Bahadori, Sébastien Rumley,and Keren Bergman Lightwave Research Lab,

More information

A tunable Si CMOS photonic multiplexer/de-multiplexer

A tunable Si CMOS photonic multiplexer/de-multiplexer A tunable Si CMOS photonic multiplexer/de-multiplexer OPTICS EXPRESS Published : 25 Feb 2010 MinJae Jung M.I.C.S Content 1. Introduction 2. CMOS photonic 1x4 Si ring multiplexer Principle of add/drop filter

More information

Figure Responsivity (A/W) Figure E E-09.

Figure Responsivity (A/W) Figure E E-09. OSI Optoelectronics, is a leading manufacturer of fiber optic components for communication systems. The products offer range for Silicon, GaAs and InGaAs to full turnkey solutions. Photodiodes are semiconductor

More information

EXAMINATION FOR THE DEGREE OF B.E. and M.E. Semester

EXAMINATION FOR THE DEGREE OF B.E. and M.E. Semester EXAMINATION FOR THE DEGREE OF B.E. and M.E. Semester 2 2009 101908 OPTICAL COMMUNICATION ENGINEERING (Elec Eng 4041) 105302 SPECIAL STUDIES IN MARINE ENGINEERING (Elec Eng 7072) Official Reading Time:

More information

Signal Integrity Design of TSV-Based 3D IC

Signal Integrity Design of TSV-Based 3D IC Signal Integrity Design of TSV-Based 3D IC October 24, 21 Joungho Kim at KAIST joungho@ee.kaist.ac.kr http://tera.kaist.ac.kr 1 Contents 1) Driving Forces of TSV based 3D IC 2) Signal Integrity Issues

More information

MICRO RING MODULATOR. Dae-hyun Kwon. High-speed circuits and Systems Laboratory

MICRO RING MODULATOR. Dae-hyun Kwon. High-speed circuits and Systems Laboratory MICRO RING MODULATOR Dae-hyun Kwon High-speed circuits and Systems Laboratory Paper preview Title of the paper Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator Publication

More information

High-Performance Electrical Signaling

High-Performance Electrical Signaling High-Performance Electrical Signaling William J. Dally 1, Ming-Ju Edward Lee 1, Fu-Tai An 1, John Poulton 2, and Steve Tell 2 Abstract This paper reviews the technology of high-performance electrical signaling

More information

Lecture 4 INTEGRATED PHOTONICS

Lecture 4 INTEGRATED PHOTONICS Lecture 4 INTEGRATED PHOTONICS What is photonics? Photonic applications use the photon in the same way that electronic applications use the electron. Devices that run on light have a number of advantages

More information

Figure Figure E E-09. Dark Current (A) 1.

Figure Figure E E-09. Dark Current (A) 1. OSI Optoelectronics, is a leading manufacturer of fiber optic components for communication systems. The products offer range for Silicon, GaAs and InGaAs to full turnkey solutions. Photodiodes are semiconductor

More information

High-speed Serial Interface

High-speed Serial Interface High-speed Serial Interface Lect. 9 Noises 1 Block diagram Where are we today? Serializer Tx Driver Channel Rx Equalizer Sampler Deserializer PLL Clock Recovery Tx Rx 2 Sampling in Rx Interface applications

More information

A 5-Gb/s 156-mW Transceiver with FFE/Analog Equalizer in 90-nm CMOS Technology Wang Xinghua a, Wang Zhengchen b, Gui Xiaoyan c,

A 5-Gb/s 156-mW Transceiver with FFE/Analog Equalizer in 90-nm CMOS Technology Wang Xinghua a, Wang Zhengchen b, Gui Xiaoyan c, 4th International Conference on Computer, Mechatronics, Control and Electronic Engineering (ICCMCEE 2015) A 5-Gb/s 156-mW Transceiver with FFE/Analog Equalizer in 90-nm CMOS Technology Wang Xinghua a,

More information

A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver

A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver A 3.9 ns 8.9 mw 4 4 Silicon Photonic Switch Hybrid-Integrated with CMOS Driver A. Rylyakov, C. Schow, B. Lee, W. Green, J. Van Campenhout, M. Yang, F. Doany, S. Assefa, C. Jahnes, J. Kash, Y. Vlasov IBM

More information

Faster than a Speeding Bullet

Faster than a Speeding Bullet BEYOND DESIGN Faster than a Speeding Bullet by Barry Olney IN-CIRCUIT DESIGN PTY LTD AUSTRALIA In a previous Beyond Design column, Transmission Lines, I mentioned that a transmission line does not carry

More information

Analysis of Self Phase Modulation Fiber nonlinearity in Optical Transmission System with Dispersion

Analysis of Self Phase Modulation Fiber nonlinearity in Optical Transmission System with Dispersion 36 Analysis of Self Phase Modulation Fiber nonlinearity in Optical Transmission System with Dispersion Supreet Singh 1, Kulwinder Singh 2 1 Department of Electronics and Communication Engineering, Punjabi

More information

NEXT GENERATION SILICON PHOTONICS FOR COMPUTING AND COMMUNICATION PHILIPPE ABSIL

NEXT GENERATION SILICON PHOTONICS FOR COMPUTING AND COMMUNICATION PHILIPPE ABSIL NEXT GENERATION SILICON PHOTONICS FOR COMPUTING AND COMMUNICATION PHILIPPE ABSIL OUTLINE Introduction Platform Overview Device Library Overview What s Next? Conclusion OUTLINE Introduction Platform Overview

More information

Transmission-Line-Based, Shared-Media On-Chip. Interconnects for Multi-Core Processors

Transmission-Line-Based, Shared-Media On-Chip. Interconnects for Multi-Core Processors Design for MOSIS Educational Program (Research) Transmission-Line-Based, Shared-Media On-Chip Interconnects for Multi-Core Processors Prepared by: Professor Hui Wu, Jianyun Hu, Berkehan Ciftcioglu, Jie

More information

MICTOR. High-Speed Stacking Connector

MICTOR. High-Speed Stacking Connector MICTOR High-Speed Stacking Connector Electrical Performance Report for the 0.260" (6.6-mm) Stack Height Connector.......... Connector With Typical Footprint................... Connector in a System Report

More information

+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects

+3.3V, 2.5Gbps Quad Transimpedance Amplifier for System Interconnects 19-1855 Rev 0; 11/00 +3.3V, 2.5Gbps Quad Transimpedance Amplifier General Description The is a quad transimpedance amplifier (TIA) intended for 2.5Gbps system interconnect applications. Each of the four

More information

ECEN720: High-Speed Links Circuits and Systems Spring 2017

ECEN720: High-Speed Links Circuits and Systems Spring 2017 ECEN720: High-Speed Links Circuits and Systems Spring 2017 Lecture 9: Noise Sources Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements Lab 5 Report and Prelab 6 due Apr. 3 Stateye

More information

OPTICAL NETWORKS. Building Blocks. A. Gençata İTÜ, Dept. Computer Engineering 2005

OPTICAL NETWORKS. Building Blocks. A. Gençata İTÜ, Dept. Computer Engineering 2005 OPTICAL NETWORKS Building Blocks A. Gençata İTÜ, Dept. Computer Engineering 2005 Introduction An introduction to WDM devices. optical fiber optical couplers optical receivers optical filters optical amplifiers

More information

Module 12 : System Degradation and Power Penalty

Module 12 : System Degradation and Power Penalty Module 12 : System Degradation and Power Penalty Lecture : System Degradation and Power Penalty Objectives In this lecture you will learn the following Degradation during Propagation Modal Noise Dispersion

More information

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1 Coherent and Incoherent Crosstalk Noise Analyses in Interchip/Intrachip Optical Interconnection Networks Luan H. K. Duong, Student Member,

More information

Optoelectronic Oscillator Topologies based on Resonant Tunneling Diode Fiber Optic Links

Optoelectronic Oscillator Topologies based on Resonant Tunneling Diode Fiber Optic Links Optoelectronic Oscillator Topologies based on Resonant Tunneling Diode Fiber Optic Links Bruno Romeira* a, José M. L Figueiredo a, Kris Seunarine b, Charles N. Ironside b, a Department of Physics, CEOT,

More information

Comparison between Analog and Digital Current To PWM Converter for Optical Readout Systems

Comparison between Analog and Digital Current To PWM Converter for Optical Readout Systems Comparison between Analog and Digital Current To PWM Converter for Optical Readout Systems 1 Eun-Jung Yoon, 2 Kangyeob Park, 3* Won-Seok Oh 1, 2, 3 SoC Platform Research Center, Korea Electronics Technology

More information

VITESSE SEMICONDUCTOR CORPORATION. Bandwidth (MHz) VSC

VITESSE SEMICONDUCTOR CORPORATION. Bandwidth (MHz) VSC Features optimized for high speed optical communications applications Integrated AGC Fibre Channel and Gigabit Ethernet Low Input Noise Current Differential Output Single 5V Supply with On-chip biasing

More information

Module 19 : WDM Components

Module 19 : WDM Components Module 19 : WDM Components Lecture : WDM Components - I Part - I Objectives In this lecture you will learn the following WDM Components Optical Couplers Optical Amplifiers Multiplexers (MUX) Insertion

More information

622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET

622Mbps, Ultra-Low-Power, 3.3V Transimpedance Preamplifier for SDH/SONET 19-1601; Rev 2; 11/05 EVALUATION KIT AVAILABLE 622Mbps, Ultra-Low-Power, 3.3V General Description The low-power transimpedance preamplifier for 622Mbps SDH/SONET applications consumes only 70mW at = 3.3V.

More information

(i) Determine the admittance parameters of the network of Fig 1 (f) and draw its - equivalent circuit.

(i) Determine the admittance parameters of the network of Fig 1 (f) and draw its - equivalent circuit. I.E.S-(Conv.)-1995 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - I Some useful data: Electron charge: 1.6 10 19 Coulomb Free space permeability: 4 10 7 H/m Free space permittivity: 8.85 pf/m Velocity

More information

ECEN620: Network Theory Broadband Circuit Design Fall 2014

ECEN620: Network Theory Broadband Circuit Design Fall 2014 ECEN620: Network Theory Broadband Circuit Design Fall 2014 Lecture 19: High-Speed Transmitters Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements Exam 3 is on Friday Dec 5 Focus

More information

11.1 Gbit/s Pluggable Small Form Factor DWDM Optical Transceiver Module

11.1 Gbit/s Pluggable Small Form Factor DWDM Optical Transceiver Module INFORMATION & COMMUNICATIONS 11.1 Gbit/s Pluggable Small Form Factor DWDM Transceiver Module Yoji SHIMADA*, Shingo INOUE, Shimako ANZAI, Hiroshi KAWAMURA, Shogo AMARI and Kenji OTOBE We have developed

More information

ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012

ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012 ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012 Lecture 5: Termination, TX Driver, & Multiplexer Circuits Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements

More information

EE273 Lecture 3 More about Wires Lossy Wires, Multi-Drop Buses, and Balanced Lines. Today s Assignment

EE273 Lecture 3 More about Wires Lossy Wires, Multi-Drop Buses, and Balanced Lines. Today s Assignment EE73 Lecture 3 More about Wires Lossy Wires, Multi-Drop Buses, and Balanced Lines September 30, 998 William J. Dally Computer Systems Laboratory Stanford University billd@csl.stanford.edu Today s Assignment

More information

High-speed Integrated Circuits for Silicon Photonics

High-speed Integrated Circuits for Silicon Photonics High-speed Integrated Circuits for Silicon Photonics Institute of Semiconductor, CAS 2017.7 Outline Introduction High-Speed Signaling Fundamentals TX Design Techniques RX Design Techniques Design Examples

More information

A continuous-wave Raman silicon laser

A continuous-wave Raman silicon laser A continuous-wave Raman silicon laser Haisheng Rong, Richard Jones,.. - Intel Corporation Ultrafast Terahertz nanoelectronics Lab Jae-seok Kim 1 Contents 1. Abstract 2. Background I. Raman scattering II.

More information

CHAPTER 5 SPECTRAL EFFICIENCY IN DWDM

CHAPTER 5 SPECTRAL EFFICIENCY IN DWDM 61 CHAPTER 5 SPECTRAL EFFICIENCY IN DWDM 5.1 SPECTRAL EFFICIENCY IN DWDM Due to the ever-expanding Internet data traffic, telecommunication networks are witnessing a demand for high-speed data transfer.

More information

3D IC-Package-Board Co-analysis using 3D EM Simulation for Mobile Applications

3D IC-Package-Board Co-analysis using 3D EM Simulation for Mobile Applications 3D IC-Package-Board Co-analysis using 3D EM Simulation for Mobile Applications Darryl Kostka, CST of America Taigon Song and Sung Kyu Lim, Georgia Institute of Technology Outline Introduction TSV Array

More information

High Speed Mixed Signal IC Design notes set 9. ICs for Optical Transmission

High Speed Mixed Signal IC Design notes set 9. ICs for Optical Transmission High Speed Mixed Signal C Design notes set 9 Cs for Optical Transmission Mark Rodwell University of California, Santa Barbara rodwell@ece.ucsb.edu 805-893-3244, 805-893-3262 fax Cs for Optical Transmission:

More information

5Gbps Serial Link Transmitter with Pre-emphasis

5Gbps Serial Link Transmitter with Pre-emphasis Gbps Serial Link Transmitter with Pre-emphasis Chih-Hsien Lin, Chung-Hong Wang and Shyh-Jye Jou Department of Electrical Engineering,National Central University,Chung-Li, Taiwan R.O.C. Abstract- High-speed

More information

Optical Fibers p. 1 Basic Concepts p. 1 Step-Index Fibers p. 2 Graded-Index Fibers p. 4 Design and Fabrication p. 6 Silica Fibers p.

Optical Fibers p. 1 Basic Concepts p. 1 Step-Index Fibers p. 2 Graded-Index Fibers p. 4 Design and Fabrication p. 6 Silica Fibers p. Preface p. xiii Optical Fibers p. 1 Basic Concepts p. 1 Step-Index Fibers p. 2 Graded-Index Fibers p. 4 Design and Fabrication p. 6 Silica Fibers p. 6 Plastic Optical Fibers p. 9 Microstructure Optical

More information

A 10Gbps Analog Adaptive Equalizer and Pulse Shaping Circuit for Backplane Interface

A 10Gbps Analog Adaptive Equalizer and Pulse Shaping Circuit for Backplane Interface Proceedings of the 5th WSEAS Int. Conf. on CIRCUITS, SYSTEMS, ELECTRONICS, CONTROL & SIGNAL PROCESSING, Dallas, USA, November 1-3, 2006 225 A 10Gbps Analog Adaptive Equalizer and Pulse Shaping Circuit

More information

Electronic-Photonic ICs for Low Cost and Scalable Datacenter Solutions

Electronic-Photonic ICs for Low Cost and Scalable Datacenter Solutions Electronic-Photonic ICs for Low Cost and Scalable Datacenter Solutions Christoph Theiss, Director Packaging Christoph.Theiss@sicoya.com 1 SEMICON Europe 2016, October 27 2016 Sicoya Overview Spin-off from

More information

UNIVERSITY OF TORONTO FACULTY OF APPLIED SCIENCE AND ENGINEERING. FINAL EXAMINATION, April 2017 DURATION: 2.5 hours

UNIVERSITY OF TORONTO FACULTY OF APPLIED SCIENCE AND ENGINEERING. FINAL EXAMINATION, April 2017 DURATION: 2.5 hours UNIVERSITY OF TORONTO FACULTY OF APPLIED SCIENCE AND ENGINEERING ECE4691-111 S - FINAL EXAMINATION, April 2017 DURATION: 2.5 hours Optical Communication and Networks Calculator Type: 2 Exam Type: X Examiner:

More information

Lecture 8 Fiber Optical Communication Lecture 8, Slide 1

Lecture 8 Fiber Optical Communication Lecture 8, Slide 1 Lecture 8 Bit error rate The Q value Receiver sensitivity Sensitivity degradation Extinction ratio RIN Timing jitter Chirp Forward error correction Fiber Optical Communication Lecture 8, Slide Bit error

More information

Chapter 10 WDM concepts and components

Chapter 10 WDM concepts and components Chapter 10 WDM concepts and components - Outline 10.1 Operational principle of WDM 10. Passive Components - The x Fiber Coupler - Scattering Matrix Representation - The x Waveguide Coupler - Mach-Zehnder

More information

VLSI is scaling faster than number of interface pins

VLSI is scaling faster than number of interface pins High Speed Digital Signals Why Study High Speed Digital Signals Speeds of processors and signaling Doubled with last few years Already at 1-3 GHz microprocessors Early stages of terahertz Higher speeds

More information

Optical phase-coherent link between an optical atomic clock. and 1550 nm mode-locked lasers

Optical phase-coherent link between an optical atomic clock. and 1550 nm mode-locked lasers Optical phase-coherent link between an optical atomic clock and 1550 nm mode-locked lasers Kevin W. Holman, David J. Jones, Steven T. Cundiff, and Jun Ye* JILA, National Institute of Standards and Technology

More information

ECE 497 JS Lecture - 22 Timing & Signaling

ECE 497 JS Lecture - 22 Timing & Signaling ECE 497 JS Lecture - 22 Timing & Signaling Spring 2004 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jose@emlab.uiuc.edu 1 Announcements - Signaling Techniques (4/27) - Signaling

More information

Agilent 8703B Lightwave Component Analyzer Technical Specifications. 50 MHz to GHz modulation bandwidth

Agilent 8703B Lightwave Component Analyzer Technical Specifications. 50 MHz to GHz modulation bandwidth Agilent 8703B Lightwave Component Analyzer Technical Specifications 50 MHz to 20.05 GHz modulation bandwidth 2 The 8703B lightwave component analyzer is a unique, general-purpose instrument for testing

More information

HFD Fiber Optic LAN Components 1.25Gbps PIN Plus Preamplifier with RSSI

HFD Fiber Optic LAN Components 1.25Gbps PIN Plus Preamplifier with RSSI with RSSI FEATURES rates > 1 GHz PIN detector, preamplifier, and bypass filtering in a TO-46 hermetic package 5V or 3.3V operation GaAs PIN detector and Transimpedance amplifier Differential Output for

More information

Z-Dok High-Performance Docking Connector

Z-Dok High-Performance Docking Connector Z-Dok High-Performance Docking Connector Electrical Performance Report... Connector With Typical Footprint... Connector in a System Report #22GC007, Revision A May 2002 2002 Tyco Electronics, Inc., Harrisburg,

More information

CHAPTER 4. Practical Design

CHAPTER 4. Practical Design CHAPTER 4 Practical Design The results in Chapter 3 indicate that the 2-D CCS TL can be used to synthesize a wider range of characteristic impedance, flatten propagation characteristics, and place passive

More information

PROBE: Prediction-based Optical Bandwidth Scaling for Energy-efficient NoCs

PROBE: Prediction-based Optical Bandwidth Scaling for Energy-efficient NoCs PROBE: Prediction-based Optical Bandwidth Scaling for Energy-efficient NoCs Li Zhou and Avinash Kodi Technologies for Emerging Computer Architecture Laboratory (TEAL) School of Electrical Engineering and

More information

Taking the Mystery out of Signal Integrity

Taking the Mystery out of Signal Integrity Slide - 1 Jan 2002 Taking the Mystery out of Signal Integrity Dr. Eric Bogatin, CTO, GigaTest Labs Signal Integrity Engineering and Training 134 S. Wolfe Rd Sunnyvale, CA 94086 408-524-2700 www.gigatest.com

More information

ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.6

ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.6 ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.6 26.6 40Gb/s Amplifier and ESD Protection Circuit in 0.18µm CMOS Technology Sherif Galal, Behzad Razavi University of California, Los Angeles, CA Optical

More information

Digital Systems Power, Speed and Packages II CMPE 650

Digital Systems Power, Speed and Packages II CMPE 650 Speed VLSI focuses on propagation delay, in contrast to digital systems design which focuses on switching time: A B A B rise time propagation delay Faster switching times introduce problems independent

More information

ECEN689: Special Topics in Optical Interconnects Circuits and Systems Spring 2016

ECEN689: Special Topics in Optical Interconnects Circuits and Systems Spring 2016 ECEN689: Special Topics in Optical Interconnects Circuits and Systems Spring 016 Lecture 7: Transmitter Analysis Sam Palermo Analog & Mixed-Signal Center Texas A&M University Optical Modulation Techniques

More information

1/2/4/8 GBPS 850NM VCSEL LC TOSA PACKAGES

1/2/4/8 GBPS 850NM VCSEL LC TOSA PACKAGES DATA SHEET 1/2/4/8 GBPS 850NM VCSEL LC TOSA PACKAGES HFE7192-XXX FEATURES: LC TOSA HFE7192-x6x includes flex circuit LC TOSA HFE7192-x8x leaded package High performance VCSEL Low electrical parasitic TO

More information

MM5452/MM5453 Liquid Crystal Display Drivers

MM5452/MM5453 Liquid Crystal Display Drivers MM5452/MM5453 Liquid Crystal Display Drivers General Description The MM5452 is a monolithic integrated circuit utilizing CMOS metal gate, low threshold enhancement mode devices. It is available in a 40-pin

More information

Optical Communications and Networking 朱祖勍. Sept. 25, 2017

Optical Communications and Networking 朱祖勍. Sept. 25, 2017 Optical Communications and Networking Sept. 25, 2017 Lecture 4: Signal Propagation in Fiber 1 Nonlinear Effects The assumption of linearity may not always be valid. Nonlinear effects are all related to

More information

ECEN 720 High-Speed Links: Circuits and Systems

ECEN 720 High-Speed Links: Circuits and Systems 1 ECEN 720 High-Speed Links: Circuits and Systems Lab4 Receiver Circuits Objective To learn fundamentals of receiver circuits. Introduction Receivers are used to recover the data stream transmitted by

More information

Outline. Noise and Distortion. Noise basics Component and system noise Distortion INF4420. Jørgen Andreas Michaelsen Spring / 45 2 / 45

Outline. Noise and Distortion. Noise basics Component and system noise Distortion INF4420. Jørgen Andreas Michaelsen Spring / 45 2 / 45 INF440 Noise and Distortion Jørgen Andreas Michaelsen Spring 013 1 / 45 Outline Noise basics Component and system noise Distortion Spring 013 Noise and distortion / 45 Introduction We have already considered

More information

I.E.S-(Conv.)-2007 ELECTRONICS AND TELECOMMUNICATION ENGINEERING PAPER - II Time Allowed: 3 hours Maximum Marks : 200 Candidates should attempt Question No. 1 which is compulsory and FOUR more questions

More information

To learn fundamentals of high speed I/O link equalization techniques.

To learn fundamentals of high speed I/O link equalization techniques. 1 ECEN 720 High-Speed Links: Circuits and Systems Lab5 Equalization Circuits Objective To learn fundamentals of high speed I/O link equalization techniques. Introduction An ideal cable could propagate

More information

Putting PICs in Products A Practical Guideline. Katarzyna Ławniczuk

Putting PICs in Products A Practical Guideline. Katarzyna Ławniczuk Putting PICs in Products A Practical Guideline Katarzyna Ławniczuk k.lawniczuk@brightphotonics.eu Outline Product development considerations Selecting PIC technology Design flow and design tooling considerations

More information

Chapter 3 Metro Network Simulation

Chapter 3 Metro Network Simulation Chapter 3 Metro Network Simulation 3.1 Photonic Simulation Tools Simulation of photonic system has become a necessity due to the complex interactions within and between components. Tools have evolved from

More information

Difference between BJTs and FETs. Junction Field Effect Transistors (JFET)

Difference between BJTs and FETs. Junction Field Effect Transistors (JFET) Difference between BJTs and FETs Transistors can be categorized according to their structure, and two of the more commonly known transistor structures, are the BJT and FET. The comparison between BJTs

More information

EENG473 Mobile Communications Module 3 : Week # (12) Mobile Radio Propagation: Small-Scale Path Loss

EENG473 Mobile Communications Module 3 : Week # (12) Mobile Radio Propagation: Small-Scale Path Loss EENG473 Mobile Communications Module 3 : Week # (12) Mobile Radio Propagation: Small-Scale Path Loss Introduction Small-scale fading is used to describe the rapid fluctuation of the amplitude of a radio

More information

Lecture 6 Fiber Optical Communication Lecture 6, Slide 1

Lecture 6 Fiber Optical Communication Lecture 6, Slide 1 Lecture 6 Optical transmitters Photon processes in light matter interaction Lasers Lasing conditions The rate equations CW operation Modulation response Noise Light emitting diodes (LED) Power Modulation

More information

A10-Gb/slow-power adaptive continuous-time linear equalizer using asynchronous under-sampling histogram

A10-Gb/slow-power adaptive continuous-time linear equalizer using asynchronous under-sampling histogram LETTER IEICE Electronics Express, Vol.10, No.4, 1 8 A10-Gb/slow-power adaptive continuous-time linear equalizer using asynchronous under-sampling histogram Wang-Soo Kim and Woo-Young Choi a) Department

More information

Optical Bus for Intra and Inter-chip Optical Interconnects

Optical Bus for Intra and Inter-chip Optical Interconnects Optical Bus for Intra and Inter-chip Optical Interconnects Xiaolong Wang Omega Optics Inc., Austin, TX Ray T. Chen University of Texas at Austin, Austin, TX Outline Perspective of Optical Backplane Bus

More information

Signal Integrity Modeling and Measurement of TSV in 3D IC

Signal Integrity Modeling and Measurement of TSV in 3D IC Signal Integrity Modeling and Measurement of TSV in 3D IC Joungho Kim KAIST joungho@ee.kaist.ac.kr 1 Contents 1) Introduction 2) 2.5D/3D Architectures with TSV and Interposer 3) Signal integrity, Channel

More information

HFTA-08.0: Receivers and Transmitters in DWDM Systems

HFTA-08.0: Receivers and Transmitters in DWDM Systems HFTA-08.0: Receivers and Transmitters in DWDM Systems The rapidly growing internet traffic demands a near-continuous expansion of data-transmission capacity. To avoid traffic jams on the data highways,

More information

Bit error rate and cross talk performance in optical cross connect with wavelength converter

Bit error rate and cross talk performance in optical cross connect with wavelength converter Vol. 6, No. 3 / March 2007 / JOURNAL OF OPTICAL NETWORKING 295 Bit error rate and cross talk performance in optical cross connect with wavelength converter M. S. Islam and S. P. Majumder Department of

More information

Probing Techniques for Signal Performance Measurements in High Data Rate Testing

Probing Techniques for Signal Performance Measurements in High Data Rate Testing Probing Techniques for Signal Performance Measurements in High Data Rate Testing K. Helmreich, A. Lechner Advantest Test Engineering Solutions GmbH Contents: 1 Introduction: High Data Rate Testing 2 Signal

More information

Agilent 83440B/C/D High-Speed Lightwave Converters

Agilent 83440B/C/D High-Speed Lightwave Converters Agilent 8344B/C/D High-Speed Lightwave Converters DC-6/2/3 GHz, to 6 nm Technical Specifications Fast optical detector for characterizing lightwave signals Fast 5, 22, or 73 ps full-width half-max (FWHM)

More information

850NM SINGLE MODE VCSEL TO-46 PACKAGE

850NM SINGLE MODE VCSEL TO-46 PACKAGE DATA SHEET 850NM SINGLE MODE VCSEL TO-46 PACKAGE HFE4093-332 FEATURES: Designed for drive currents between 1 and 5 ma Optimized for low dependence of electrical properties over temperature High speed 1

More information

Figure 4.1 Vector representation of magnetic field.

Figure 4.1 Vector representation of magnetic field. Chapter 4 Design of Vector Magnetic Field Sensor System 4.1 3-Dimensional Vector Field Representation The vector magnetic field is represented as a combination of three components along the Cartesian coordinate

More information

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier Chapter 5 Operational Amplifiers and Source Followers 5.1 Operational Amplifier In single ended operation the output is measured with respect to a fixed potential, usually ground, whereas in double-ended

More information

Analysis of four channel CWDM Transceiver Modules based on Extinction Ratio and with the use of EDFA

Analysis of four channel CWDM Transceiver Modules based on Extinction Ratio and with the use of EDFA Analysis of four channel CWDM Transceiver Modules based on Extinction Ratio and with the use of EDFA P.P. Hema [1], Prof. A.Sangeetha [2] School of Electronics Engineering [SENSE], VIT University, Vellore

More information

ECEN 720 High-Speed Links Circuits and Systems

ECEN 720 High-Speed Links Circuits and Systems 1 ECEN 720 High-Speed Links Circuits and Systems Lab4 Receiver Circuits Objective To learn fundamentals of receiver circuits. Introduction Receivers are used to recover the data stream transmitted by transmitters.

More information

1310NM FP LASER FOR 10GBASE-LRM SC AND LC TOSA

1310NM FP LASER FOR 10GBASE-LRM SC AND LC TOSA DATA SHEET 1310NM FP LASER FOR 10GBASE-LRM SC AND LC TOSA FP-1310-10LRM-X FEATURES: 1310nm FP laser Very low power dissipation SC and LC optical receptacles 10Gbps direct modulation Impedance matching

More information

INVENTION DISCLOSURE- ELECTRONICS SUBJECT MATTER IMPEDANCE MATCHING ANTENNA-INTEGRATED HIGH-EFFICIENCY ENERGY HARVESTING CIRCUIT

INVENTION DISCLOSURE- ELECTRONICS SUBJECT MATTER IMPEDANCE MATCHING ANTENNA-INTEGRATED HIGH-EFFICIENCY ENERGY HARVESTING CIRCUIT INVENTION DISCLOSURE- ELECTRONICS SUBJECT MATTER IMPEDANCE MATCHING ANTENNA-INTEGRATED HIGH-EFFICIENCY ENERGY HARVESTING CIRCUIT ABSTRACT: This paper describes the design of a high-efficiency energy harvesting

More information

NOVEMBER 29, 2017 COURSE PROJECT: CMOS TRANSIMPEDANCE AMPLIFIER ECG 720 ADVANCED ANALOG IC DESIGN ERIC MONAHAN

NOVEMBER 29, 2017 COURSE PROJECT: CMOS TRANSIMPEDANCE AMPLIFIER ECG 720 ADVANCED ANALOG IC DESIGN ERIC MONAHAN NOVEMBER 29, 2017 COURSE PROJECT: CMOS TRANSIMPEDANCE AMPLIFIER ECG 720 ADVANCED ANALOG IC DESIGN ERIC MONAHAN 1.Introduction: CMOS Transimpedance Amplifier Avalanche photodiodes (APDs) are highly sensitive,

More information

Lecture 7 Fiber Optical Communication Lecture 7, Slide 1

Lecture 7 Fiber Optical Communication Lecture 7, Slide 1 Dispersion management Lecture 7 Dispersion compensating fibers (DCF) Fiber Bragg gratings (FBG) Dispersion-equalizing filters Optical phase conjugation (OPC) Electronic dispersion compensation (EDC) Fiber

More information

NON-AMPLIFIED PHOTODETECTOR USER S GUIDE

NON-AMPLIFIED PHOTODETECTOR USER S GUIDE NON-AMPLIFIED PHOTODETECTOR USER S GUIDE Thank you for purchasing your Non-amplified Photodetector. This user s guide will help answer any questions you may have regarding the safe use and optimal operation

More information

A comment on Table 88-7 and 88-8 in Draft 1.0

A comment on Table 88-7 and 88-8 in Draft 1.0 A comment on Table 88-7 and 88-8 in Draft 1.0 IEEE802.3 ba Task Force 9-13 November 2008 Hirotaka Oomori Chris Cole Kazuyuki Mori Masato Shishikura Sumitomo Electric Finisar Fujitsu Opnext 1 Introduction

More information

Absorption: in an OF, the loss of Optical power, resulting from conversion of that power into heat.

Absorption: in an OF, the loss of Optical power, resulting from conversion of that power into heat. Absorption: in an OF, the loss of Optical power, resulting from conversion of that power into heat. Scattering: The changes in direction of light confined within an OF, occurring due to imperfection in

More information

Conventional Paper-II-2011 Part-1A

Conventional Paper-II-2011 Part-1A Conventional Paper-II-2011 Part-1A 1(a) (b) (c) (d) (e) (f) (g) (h) The purpose of providing dummy coils in the armature of a DC machine is to: (A) Increase voltage induced (B) Decrease the armature resistance

More information

Photonics and Optical Communication Spring 2005

Photonics and Optical Communication Spring 2005 Photonics and Optical Communication Spring 2005 Final Exam Instructor: Dr. Dietmar Knipp, Assistant Professor of Electrical Engineering Name: Mat. -Nr.: Guidelines: Duration of the Final Exam: 2 hour You

More information

The Light at the End of the Wire. Dana Vantrease + HP Labs + Mikko Lipasti

The Light at the End of the Wire. Dana Vantrease + HP Labs + Mikko Lipasti The Light at the End of the Wire Dana Vantrease + HP Labs + Mikko Lipasti 1 Goals of This Talk Why should we (architects) be interested in optics? How does on-chip optics work? What can we build with optics?

More information