N-channel 650 V, Ω typ., 42 A, MDmesh V Power MOSFET in a TO247-4 package. Features. Higher V DS rating. Description.

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1 N-channel 650 V, Ω typ., 42 A, MDmesh V Power MOSFET in a TO247-4 package Features Datasheet production data Order code V T Jmax R DS(on) max I D STW57N65M V Ω 42 A Higher V DS rating TO Higher dv/dt capability Excellent switching performance thanks to the extra driving source pin Easy to drive 100% avalanche tested Figure 1. Internal schematic diagram Drain(1) Gate(4) Driver source(3) Power source(2) AM10177v1 Applications High efficiency switching applications: Servers PV inverters Telecom infrastructure Multi kw battery chargers Description This device is an N-channel MDmesh V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics well-known PowerMESH horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. Table 1. Device summary Order code Marking Package Packaging STW57N65M5-4 57N65M5 TO247-4 Tube June 2013 DocID Rev 2 1/14 This is information on a product in full production. 14

2 Contents STW57N65M5-4 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data Revision history /14 DocID Rev 2

3 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate- source voltage ±25 V I D Drain current (continuous) at T C = 25 C 42 A I D Drain current (continuous) at T C = 100 C 26.5 A I (1) DM Drain current (pulsed) 168 A P TOT Total dissipation at T C = 25 C 250 W I AR Max current during repetitive or single pulse avalanche (pulse width limited by T JMAX ) 11 A E AS dv/dt (2) dv/dt (3) Single pulse avalanche energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 1. Pulse width limited by safe operating area 2. I SD 42 A, di/dt = 400 A/µs, peak V DS < V (BR)DSS, V DD = 400 V 3. V DS 520 V 960 mj Peak diode recovery voltage slope 15 V/ns MOSFET dv/dt ruggedness 50 V/ns T stg Storage temperature - 55 to 150 C T j Max. operating junction temperature 150 C Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max 0.50 C/W R thj-amb Thermal resistance junction-ambient max 50 C/W DocID Rev 2 3/14

4 Electrical characteristics STW57N65M5-4 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS I GSS Drain-source breakdown voltage Zero gate voltage drain current (V GS = 0) Gate-body leakage current (V DS = 0) I D = 1 ma, V GS = V V DS = 650 V V DS = 650 V, T C =125 C µa µa V GS = ± 25 V ± 100 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa V R DS(on) Static drain-source onresistance V GS = 10 V, I D = 21 A Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 100 V, f = 1 MHz, pf C rss V GS = 0 Reverse transfer capacitance pf Equivalent C (1) o(tr) capacitance time V GS = 0, V DS = 0 to 520 V pf related Equivalent C (2) o(er) capacitance energy V GS = 0, V DS = 0 to 520 V pf related R G Intrinsic gate resistance f = 1 MHz open drain Ω Q g Total gate charge V DD = 520 V, I D = 21 A, nc Q gs Gate-source charge V GS = 10 V nc Q gd Gate-drain charge (see Figure 16) nc 1. C o(tr) is a constant capacitance value that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. 2. C o(er) is a constant capacitance value that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. 4/14 DocID Rev 2

5 Electrical characteristics Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(v) Voltage delay time V DD = 400 V, I D = 28 A, ns t r(v) Voltage rise time R G = 4.7 Ω, V GS = 10 V ns t f(i) Current fall time (see Figure 15) ns t c(off) Crossing time (see Figure 20) ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 42 A I (1) SDM Source-drain current (pulsed) A V (2) SD Forward on voltage I SD = 42 A, V GS = V t rr Reverse recovery time I SD = 42 A, ns Q rr Reverse recovery charge di/dt = 100 A/µs - 8 µc I RRM Reverse recovery current V DD = 100 V (see Figure 17) - 40 A t rr Reverse recovery time I SD = 42 A, ns Q rr Reverse recovery charge di/dt = 100 A/µs V DD = 100 V, T j = 150 C - 12 µc I RRM Reverse recovery current (see Figure 17) - 44 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID Rev 2 5/14

6 Electrical characteristics STW57N65M Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance ID (A) AM14705v Operation in this area is Limited by max RDS(on) Tj=150 C Tc=25 C Single pulse VDS(V) 10μs 100μs 1ms 10ms Figure 4. Output characteristics Figure 5. Transfer characteristics ID (A) 100 VGS= 9, 10 V VGS= 8 V AM14706v1 ID (A) 100 VDS= 25 V AM14707v VGS= 7 V VGS= 6 V VDS(V) Figure 6. Gate charge vs gate-source voltage VGS(V) Figure 7. Static drain-source on-resistance VGS (V) 10 VDS VDD=520V ID=21A AM14708v1 VDS (V) 500 RDS(on) (Ω) VGS=10V AM14709v Qg(nC) ID(A) 6/14 DocID Rev 2

7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Output capacitance stored energy C (pf) AM14710v1 Eoss (μj) 18 AM14711v Ciss Coss Crss VDS(V) Figure 10. Normalized gate threshold voltage vs temperature VDS(V) Figure 11. Normalized on-resistance vs temperature VGS(th) (norm) ID=250μA AM04972v1 RDS(on) (norm) ID= 21 A VGS= 10 V AM05501v TJ( C) Figure 12. Source-drain diode forward characteristics VSD (V) TJ=150 C TJ=-50 C TJ=25 C ISD(A) AM04974v TJ( C) Figure 13. Normalized V DS vs temperature AM10399v1 VDS (norm) 1.08 ID = 1mA TJ( C) DocID Rev 2 7/14

8 Electrical characteristics STW57N65M5-4 Figure 14. Switching losses vs gate resistance (1) E (µj) AM11171v Eon Eoff RG(Ω) 1. Eon including reverse recovery of a SiC diode. 8/14 DocID Rev 2

9 Test circuits 3 Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD VGS VD RG RL D.U.T mf 3.3 mf VDD Vi=20V=VGMAX 2200 mf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF 1kΩ D.U.T. VG PW 47kΩ GND1 (driver signal) GND2 (power) PW 1kΩ AM15855v1 GND1 GND2 AM15856v1 Figure 17. Test circuit for inductive load switching and diode recovery times Figure 18. Unclamped inductive load test circuit G 25 W D S A D.U.T. B A FAST DIODE B A B D L=100mH mf mf VDD VD L 2200 mf 3.3 mf VDD G ID RG S Vi D.U.T. GND1 GND2 AM15857v1 Pw GND1 GND2 AM15858v1 Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform V(BR)DSS VD IDM ID VDD VDD AM01472v1 DocID Rev 2 9/14

10 Package mechanical data STW57N65M5-4 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/14 DocID Rev 2

11 Package mechanical data Table 8. TO247-4 mechanical data Dim. mm. Min. Typ. Max. A A A b b b c c D D D D E E E E e e L P P P Q S 6.15 T U DocID Rev 2 11/14

12 Package mechanical data STW57N65M5-4 Figure 21. TO247-4 drawing 12/14 DocID Rev 2

13 Revision history 5 Revision history Table 9. Document revision history Date Revision Changes 17-Apr First release. 28-Jun Modified: Figure 1, 15, 16, 17, 18 Minor text changes DocID Rev 2 13/14

14 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT AUTHORIZED FOR USE IN WEAPONS. NOR ARE ST PRODUCTS DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 14/14 DocID Rev 2

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