STF24N60M2, STFI24N60M2, STFW24N60M2
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1 STF24N60M2, STFI24N60M2, STFW24N60M2 N-channel 600 V, Ω typ., 18 A MDmesh II Plus low Q g Power MOSFETs in TO-220FP, I 2 PAKFP and TO-3PF packages Features Datasheet production data Order codes V T Jmax R DS(on) max I D TO-220FP TO-3PF Figure 1. Internal schematic diagram D(2) G(1) I 2 PAKFP (TO-281) STF24N60M2 STFI24N60M2 STFW24N60M2 Extremely low gate charge Lower R DS(on) x area vs previous generation Low gate input resistance 100% avalanche tested Zener-protected Applications Switching applications LLC converters, resonant converters Description 650 V 0.19 Ω 18 A These devices are N-channel Power MOSFETs developed using a new generation of MDmesh technology: MDmesh II Plus low Q g. These revolutionary Power MOSFETs associate a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. They are therefore suitable for the most demanding high efficiency converters. S(3) AM01476v1 Table 1. Device summary Order codes Marking Package Packaging STF24N60M2 TO-220FP STFI24N60M2 24N60M2 I 2 PAKFP (TO-281) Tube STFW24N60M2 TO-3PF April 2014 DocID Rev 6 1/18 This is information on a product in full production. 18
2 Contents STF24N60M2, STFI24N60M2, STFW24N60M2 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data TO-220FP, STF24N60M I2PAKFP, STFI24N60M TO-3PF, STFW24N60M Revision history /18 DocID Rev 6
3 STF24N60M2, STFI24N60M2, STFW24N60M2 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter TO-220FP, I 2 PAKFP TO-3PF Unit V GS Gate-source voltage ± 25 V I D Drain current (continuous) at T C = 25 C 18 (1) A I D Drain current (continuous) at T C = 100 C 12 (1) A I (2) DM Drain current (pulsed) 72 (1) A P TOT Total dissipation at T C = 25 C W dv/dt (3) Peak diode recovery voltage slope 15 V/ns dv/dt (4) MOSFET dv/dt ruggedness 50 V/ns V ISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 C) V T stg Storage temperature T j Max. operating junction temperature 1. Limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. I SD 18 A, di/dt 400 A/μs; V DS peak < V (BR)DSS, V DD = 400 V. 4. V DS 480 V - 55 to 150 C Table 3. Thermal data Value Symbol Parameter TO-220FP, I 2 PAKFP TO-3PF Unit R thj-case Thermal resistance junction-case max C/W R thj-amb Thermal resistance junction-ambient max C/W Table 4. Avalanche characteristics Symbol Parameter Value Unit I AR Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) E AS Single pulse avalanche energy (starting T j =25 C, I D = I AR ; V DD =50) 3.5 A 180 mj DocID Rev 6 3/18
4 Electrical characteristics STF24N60M2, STFI24N60M2, STFW24N60M2 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage drain current V GS = 0, I D = 1 ma 600 V V GS = 0, V DS = 600 V 1 μa V GS = 0, V DS = 600 V, T C =125 C 100 μa I GSS Gate-body leakage current V DS = 0, V GS = ± 25 V ±10 μa V GS(th) Gate threshold voltage V DS = V GS, I D = 250 μa V R DS(on) Static drain-source onresistance V GS = 10 V, I D = 9 A Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 100 V, f = 1 MHz, pf C rss V GS = 0 Reverse transfer capacitance pf C (1) Equivalent output oss eq. capacitance V DS = 0 to 480 V, V GS = pf R G Intrinsic gate resistance f = 1 MHz, I D =0-7 - Ω Q g Total gate charge V DD = 480 V, I D = 18 A, nc Q gs Gate-source charge V GS = 10 V nc Q gd Gate-drain charge (see Figure 16) nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS 4/18 DocID Rev 6
5 STF24N60M2, STFI24N60M2, STFW24N60M2 Electrical characteristics Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns V DD = 300 V, I D = 9 A, t r Rise time ns R G = 4.7 Ω, V GS = 10 V t d(off) Turn-off delay time (see Figure 16 and 21) ns t f Fall time ns Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit (1) I SD Source-drain current - 18 A I (1),(2) SDM Source-drain current (pulsed) - 72 A V (3) SD Forward on voltage I SD = 18 A, V GS = V t rr Reverse recovery time ns Q rr Reverse recovery charge I SD = 18 A, di/dt = 100 A/μs V DD = 60 V (see Figure 18) - 4 μc I RRM Reverse recovery current - 24 A t rr Reverse recovery time I SD = 18 A, di/dt = 100 A/μs ns Q rr Reverse recovery charge V DD = 60 V, T j = 150 C μc I RRM Reverse recovery current (see Figure 18) - 25 A 1. The value is rated according to R thj-case and limited by package. 2. Pulse width limited by safe operating area 3. Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID Rev 6 5/18
6 Electrical characteristics STF24N60M2, STFI24N60M2, STFW24N60M2 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for TO-220FP and I 2 PAKFP Figure 3. Thermal impedance for TO-220FP and I 2 PAKFP ID (A) AM15462v Operation in this area is Limited by max RDS(on) 10µs 100µs 1ms 0.1 Tj=150 C Tc=25 C Single pulse VDS(V) 10ms Figure 4. Safe operating area for TO-3PF ID (A) Operation in this area is Limited by max RDS(on) Tj=150 C Tc=25 C Single pulse VDS(V) Figure 6. Output characteristics ID (A) V GS = 8, 9, 10 V GIPG SA V GS = 7 V V GS = 6 V V GS = 5 V V GS = 4 V 10µs 100µs 1ms 10ms VDS(V) AM15470v1 Figure 5. Thermal impedance for TO-3PF K δ= Single pulse tp(s) 10-4 Figure 7. Transfer characteristics ID (A) GIPG SA 40 VDS = 17 V VGS(V) c AM15469v1 6/18 DocID Rev 6
7 STF24N60M2, STFI24N60M2, STFW24N60M2 Electrical characteristics Figure 8. Gate charge vs gate-source voltage Figure 9. Static drain-source on-resistance VGS (V) VDS VDD=480 V ID=18 A AM15471v1 VDS (V) RDS(on) (Ω) VGS=10V AM15465v Qg(nC) Figure 10. Capacitance variations ID(A) Figure 11. Output capacitance stored energy C (pf) AM15665v1 Eoss (µj) 8 AM15472v Ciss Coss Crss VDS(V) Figure 12. Normalized gate threshold voltage vs temperature VGS(th) (norm) ID = 250 µa TJ( C) AM15473v VDS(V) Figure 13. Normalized on-resistance vs temperature RDS(on) (norm) ID = 9 A VGS = 10 V TJ( C) AM15464v1 DocID Rev 6 7/18
8 Electrical characteristics STF24N60M2, STFI24N60M2, STFW24N60M2 Figure 14. Source-drain diode forward characteristics VSD (V) TJ=-50 C TJ=150 C TJ=25 C ISD(A) AM15468v1 Figure 15. Normalized V (BR)DSS vs temperature AM15466v1 V(BR)DSS (norm) ID = 1mA TJ( C) 8/18 DocID Rev 6
9 STF24N60M2, STFI24N60M2, STFW24N60M2 Test circuits 3 Test circuits Figure 16. Switching times test circuit for resistive load Figure 17. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 18. Test circuit for inductive load switching and diode recovery times Figure 19. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 20. Unclamped inductive waveform Figure 21. Switching time waveform ton toff tdon tr tdoff tf 0 90% 10% VDS 10% 90% VGS 90% 0 10% AM01473v1 DocID Rev 6 9/18
10 Package mechanical data STF24N60M2, STFI24N60M2, STFW24N60M2 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/18 DocID Rev 6
11 STF24N60M2, STFI24N60M2, STFW24N60M2 Package mechanical data 4.1 TO-220FP, STF24N60M2 Figure 22. TO-220FP drawing _Rev_K_B DocID Rev 6 11/18
12 Package mechanical data STF24N60M2, STFI24N60M2, STFW24N60M2 Table 9. TO-220FP mechanical data Dim. mm Min. Typ. Max. A B D E F F F G G H L2 16 L L L L L Dia /18 DocID Rev 6
13 STF24N60M2, STFI24N60M2, STFW24N60M2 Package mechanical data 4.2 I 2 PAKFP, STFI24N60M2 Figure 23. I 2 PAKFP (TO-281) drawing DocID Rev 6 13/18
14 Package mechanical data STF24N60M2, STFI24N60M2, STFW24N60M2 Table 10. I 2 PAKFP (TO-281) mechanical data Dim. mm Min. Typ. Max. A B D D E F F G H L L L L L L /18 DocID Rev 6
15 STF24N60M2, STFI24N60M2, STFW24N60M2 Package mechanical data 4.3 TO-3PF, STFW24N60M2 Figure 24. TO-3PF drawing _D DocID Rev 6 15/18
16 Package mechanical data STF24N60M2, STFI24N60M2, STFW24N60M2 Table 11. TO-3PF mechanical data Dim. mm Min. Typ. Max. A C D D E F F G G H L L L L L L L N R Dia /18 DocID Rev 6
17 STF24N60M2, STFI24N60M2, STFW24N60M2 Revision history 5 Revision history Table 12. Document revision history Date Revision Changes 10-Dec First release. 20-Dec Jan Modified: Figure 16, May Feb Apr Added MOSFET dv/dt ruggedness in Table 2: Absolute maximum ratings. Modified: Figure 16, 17, 18 and 19 Minor text changes Modified: R thj-case value in Table 3 Modified: Figure 12 Minor text changes Added: TO-3PF package Added: Section 4.3: TO-3PF, STFW24N60M2 Minor text changes DocID Rev 6 17/18
18 STF24N60M2, STFI24N60M2, STFW24N60M2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 18/18 DocID Rev 6
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Dual P-channel 100 V, 0.136 Ω typ., 3.3 A STripFET VI DeepGATE Power MOSFET in a PowerFLAT 5x6 double island Features Datasheet - production data 1 Order code V DS R DS(on) max. I D 4 STL13DP10F6 100 V
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STL90N10F7 N-channel 100 V, 0.009 Ω typ., 16 A STripFET VII DeepGATE Power MOSFETs in a PowerFLAT 5x6 package Features Datasheet - preliminary data Order code V DS @ T Jmax R DS(on) max STL90N10F7 100
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STB80NF10 STP80NF10 N-channel 100 V, 0.012 Ω, 80 A, TO-220, D 2 PAK low gate charge STripFET II Power MOSFET Features Type V DSS R DS(on) max I D STP80NF10 100 V < 0.015 Ω 80 A STB80NF10 100 V < 0.015
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N-channel 500 V, 0.23 Ω, 17 A, D 2 PAK Zener-protected supermesh Power MOSFET Features Type V DSS R DS(on) max I D Pw STB21NK50Z 500 V < 0.27 Ω 17 A 190 W Extremely high dv/dt capability 100% avalanche
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