STB18N60M2, STP18N60M2, STP18N60M2. N-channel 600 V, Ω typ., 13 A MDmesh II Plus low Q g Power MOSFET in D 2 PAK, TO-220 and TO-247 packages

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1 STB18N60M2, STP18N60M2, STW18N60M2 N-channel 600 V, Ω typ., 13 A MDmesh II Plus low Q g Power MOSFET in D 2 PAK, TO-220 and TO-247 packages Datasheet - production data TAB Features D PAK Order codes STB18N60M2 V T Jmax R DS(on) max I D TAB STP18N60M2 STW18N60M2 650 V 0.28 Ω 13 A TO TO-247 Figure 1. Internal schematic diagram, TAB Extremely low gate charge Lower R DS(on) x area vs previous generation Low gate input resistance 100% avalanche tested Zener-protected Applications Switching applications LLC converters, resonant converters Description AM15572v1 These devices are N-channel Power MOSFETs developed using a new generation of MDmesh technology: MDmesh II Plus low Q g. These revolutionary Power MOSFETs associate a vertical structure to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. They are therefore suitable for the most demanding high efficiency converters. Table 1. Device summary Order codes Marking Package Packaging STB18N60M2 D 2 PAK Tape and reel STP18N60M2 STW18N60M2 18N60M2 TO-220 TO-247 Tube February 2014 DocID Rev 2 1/21 This is information on a product in full production.

2 Contents STB18N60M2, STP18N60M2, STW18N60M2 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data Packaging mechanical data Revision history /21 DocID Rev 2

3 STB18N60M2, STP18N60M2, STW18N60M2 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V GS Gate-source voltage ± 25 V I D Drain current (continuous) at T C = 25 C 13 A I D Drain current (continuous) at T C = 100 C 8 A I (1) DM Drain current (pulsed) 52 A P TOT Total dissipation at T C = 25 C 110 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns T stg Storage temperature T j Max. operating junction temperature - 55 to 150 C 1. Pulse width limited by safe operating area 2. I SD 13 A, di/dt 400 A/μs; V DS peak < V (BR)DSS, V DD =400 V. 3. V DS 480 V Table 3. Thermal data Symbol Parameter Value D 2 PAK TO-220 TO-247 Unit R thj-case Thermal resistance junction-case max 1.14 C/W R thj-amb Thermal resistance junction-ambient max 62.5 C/W (1) R thj-pcb Thermal resistance junction-pcb max 30 C/W 1. When mounted on 1 inch² FR-4, 2 Oz copper board Table 4. Avalanche characteristics Symbol Parameter Value Unit I AR E AS Avalanche current, repetitive or not repetitive (pulse width limited by T jmax ) Single pulse avalanche energy (starting T j =25 C, I D = I AR ; V DD =50) 3 A 135 mj DocID Rev 2 3/21 21

4 Electrical characteristics STB18N60M2, STP18N60M2, STW18N60M2 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 5. On /off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero gate voltage drain current (V GS = 0) I D = 1 ma, V GS = V V DS = 600 V 1 μa V DS = 600 V, T C =125 C 100 μa I GSS Gate-body leakage current (V DS = 0) V GS = ± 25 V ±10 μa V GS(th) Gate threshold voltage V DS = V GS, I D = 250 μa V R DS(on) Static drain-source on-resistance V GS = 10 V, I D = 6.5 A Ω Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 100 V, f = 1 MHz, pf C rss V GS = 0 Reverse transfer capacitance pf C (1) Equivalent output oss eq. capacitance V DS = 0 to 480 V, V GS = pf R G Intrinsic gate resistance f = 1 MHz, I D = Ω Q g Total gate charge V DD = 480 V, I D = 13 A, nc Q gs Gate-source charge V GS = 10 V nc Q gd Gate-drain charge (see Figure 16) nc 1. C oss eq. is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS Table 7. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d (on) Turn-on delay time ns t V DD = 300 V, I D = 6.5 A, r Rise time ns R G = 4.7 Ω, V GS = 10 V t d (off) Turn-off delay time ns (see Figure 15 and Figure 20) t f Fall time ns 4/21 DocID Rev 2

5 STB18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics Table 8. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 13 A I (1) SDM Source-drain current (pulsed) - 52 A V (2) SD Forward on voltage I SD = 13 A, V GS = V t rr Reverse recovery time ns Q rr Reverse recovery charge I SD = 13 A, di/dt = 100 A/μs V DD = 60 V (see Figure 17) μc I RRM Reverse recovery current - 22 A t rr Reverse recovery time I SD = 13 A, di/dt = 100 A/μs ns Q rr Reverse recovery charge V DD = 60 V, T j = 150 C μc I RRM Reverse recovery current (see Figure 17) - 22 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID Rev 2 5/21 21

6 Electrical characteristics STB18N60M2, STP18N60M2, STW18N60M2 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for D 2 PAK and TO-220 Figure 3. Thermal impedance for D 2 PAK, TO-220 and TO-247 ID (A) AM15835v Operation in this area is Limited by max RDS(on) Tj=150 C Tc=25 C Single pulse VDS(V) 10µs 100µs 1ms 10ms Figure 4. Safe operating area for TO-247 Figure 5. Output characteristics ID (A) AM15836v1 ID (A) VGS=7, 8, 9, 10V AM15837v Operation in this area is Limited by max RDS(on) Tj=150 C Tc=25 C Single pulse VDS(V) ID Figure 6. Transfer characteristics (A) 30 VDS=18V 10µs 100µs 1ms 10ms AM15838v V 5 4V VDS(V) Figure 7. Gate charge vs gate-source voltage VGS (V) 12 VDS VDD=480V ID=13A 6V AM15839v1 VDS (V) VGS(V) Qg(nC) 6/21 DocID Rev 2

7 STB18N60M2, STP18N60M2, STW18N60M2 Electrical characteristics Figure 8. Static drain-source on-resistance Figure 9. Capacitance variations RDS(on) (Ω) VGS=10V AM15840v1 C (pf) 1000 AM15841v1 Ciss Coss ID(A) Figure 10. Normalized gate threshold voltage vs. temperature 1 Crss VDS(V) Figure 11. Normalized on-resistance vs temperature VGS(th) (norm) ID=250 µa AM15828v1 RDS(on) (norm) ID=6.5 A VGS=10V AM15829v TJ( C) TJ( C) Figure 12. Source-drain diode forward characteristics Figure 13. Normalized V (BR)DSS vs temperature VSD (V) AM15842v TJ=-50 C TJ=150 C TJ=25 C ISD(A) V(BR)DSS (norm) AM15831v1 ID=1mA TJ( C) DocID Rev 2 7/21 21

8 Electrical characteristics STB18N60M2, STP18N60M2, STW18N60M2 Figure 14. Output capacitance stored energy Eoss(µJ) AM15843v VDS(V) 8/21 DocID Rev 2

9 STB18N60M2, STP18N60M2, STW18N60M2 Test circuits 3 Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 17. Test circuit for inductive load switching and diode recovery times Figure 18. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform ton toff tdon tr tdoff tf 0 90% 10% VDS 10% 90% VGS 90% 0 10% AM01473v1 DocID Rev 2 9/21 21

10 Package mechanical data STB18N60M2, STP18N60M2, STW18N60M2 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/21 DocID Rev 2

11 STB18N60M2, STP18N60M2, STW18N60M2 Package mechanical data Figure 21. D²PAK (TO-263) drawing _T DocID Rev 2 11/21 21

12 Package mechanical data STB18N60M2, STP18N60M2, STW18N60M2 Table 9. D²PAK (TO-263) mechanical data Dim. mm Min. Typ. Max. A A b b c c D D E E e 2.54 e H J L L L R 0.4 V /21 DocID Rev 2

13 STB18N60M2, STP18N60M2, STW18N60M2 Package mechanical data Figure 22. D²PAK footprint (a) Footprint a. All dimension are in millimeters DocID Rev 2 13/21 21

14 Package mechanical data STB18N60M2, STP18N60M2, STW18N60M2 Figure 23. TO-220 type A drawing 14/21 DocID Rev 2

15 STB18N60M2, STP18N60M2, STW18N60M2 Package mechanical data Table 10. TO-220 type A mechanical data Dim. mm Min. Typ. Max. A b b c D D E e e F H J L L L L P Q DocID Rev 2 15/21 21

16 Package mechanical data STB18N60M2, STP18N60M2, STW18N60M2 Figure 24. TO-247 drawing _G 16/21 DocID Rev 2

17 STB18N60M2, STP18N60M2, STW18N60M2 Package mechanical data Table 11. TO-247 mechanical data Dim. mm. Min. Typ. Max. A A b b b c D E e L L L P R S DocID Rev 2 17/21 21

18 Packaging mechanical data STB18N60M2, STP18N60M2, STW18N60M2 5 Packaging mechanical data Figure 25. Tape 10 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E B1 K0 B0 F W For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R User direction of feed Bending radius AM08852v1 18/21 DocID Rev 2

19 STB18N60M2, STP18N60M2, STW18N60M2 Packaging mechanical data REEL DIMENSIONS Figure 26. Reel 40mm min. T Access hole At slot location A D B C N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Table 12. D²PAK (TO-263) tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 D C D D 20.2 E G F N 100 K T 30.4 P P Base qty 1000 P Bulk qty 1000 R 50 T W DocID Rev 2 19/21 21

20 Revision history STB18N60M2, STP18N60M2, STW18N60M2 6 Revision history Table 13. Document revision history Date Revision Changes 05-Jun First release. 28-Feb Modified: note 1 in Table 2 R thj-case value in Table 3 Minor text changes 20/21 DocID Rev 2

21 STB18N60M2, STP18N60M2, STW18N60M2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America DocID Rev 2 21/21 21

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