Maximum Voltage Variation in the Power Distribution Network of VLSI Circuits with RLC Models Λ

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1 Due to the type 3 fots used, please icrease the magificatio to view Maximum Voltage Variatio i the Power Distributio Network of VLSI Circuits with RLC Models Λ Sudhakar Bobba Su Microsystems Ic. 91 Sa Atoio Road, M/S: USUN2-31 Palo Alto, CA 9433 sudhakar.bobba@su.com Ibrahim N. Hajj Departmet of ECE America Uiversity of Beirut Beirut, Lebao ihajj@aub.edu.lb ABSTRACT I this paper, we preset a frequecy-domai techique to estimate the worst-case time-domai voltage variatio usig RLC models for the power distributio etwork. The proposed method, ulike existig simulatio-based techiques, ca hadle frequecy-depedet RLC parameters ad geerate a upperboud o the maximum voltage drop over all possible iput excitatios. Patter idepedet maximum evelope currets are used to estimate the upperboud o the maximum magitude of the frequecy compoets for the curret waveform. These values are used to formulate a oliear optimizatio problem for the maximum voltage drop at odes i the power distributio etwork. We the preset a method to solve the oliear optimizatio problem usig Lagrage multipliers. Comparisos with SPICE simulatios are preseted to validate the techiques preseted i the paper. 1. INTRODUCTION Power supply variatios ca c hage the delay of a logic gate ad this ca potetially c hagethe delay of the circuit. The problem of power supply oise becomes severe is scaled techologies because of higher clock frequecies, icreased curret demad with sigificat variatios, ad icreasig domiace of itercoect parasitics. The impact of the power supply voltage variatios o circuit performace is also severe i scaled techologies because of the lower supply voltage ad smaller timig margis for delay variatios. A smaller timig margi implies a smaller budget for the allowable delay variatios. Also, excessive supply voltage variatios degrade the oise margis ad i extreme cases ca cause logic failures. Therefore, high-performace itegrated circuits require a robust power delivery etwork with omial supply voltage fluctuatios. The desig of such a Λ This work was performed while the authors were at Uiversity of Illiois, Urbaa-Champaig Permissio to make digital or hard copies of all or part of this work for persoal or classroom use is grated without fee provided that copies are ot made or distributed for profit or commercial advatage ad that copies bear this otice ad the full citatio o the first page. To copy otherwise, to republish, to post o servers or to redistribute to lists, requires prior specific permissio ad/or a fee. ISLPED 1, August 6-7, 21, Hutigto Beach, Califoria, USA. Copyright 21 ACM /1/8...$5.. power distributio etwork requires the realizatio of a etwork that offers a small impedace to all the frequecies that ca be excited by the curret waveform. Hece, techiques to estimate the maximum voltage variatio i the RLC power distributio etwork over all possible curret excitatios are required. The simplest electrical model for the power distributio etwork is the resistive power bus model. Although it simplifies the power bus aalysis, the results are accurate oly if the resistace effect domiates the capacitive ad iductive effects. The powerbus aalysis techiques [1, 2, 3, 4], compute the IR drop at odes i the power distributio etwork by usig the macroblock currets as a DC curret obtaied heuristically, or a DC curret obtaied by logic simulatios for a few vectors or a trasiet curret waveform obtaied by simulatios for a few vectors. A resistive model for the top-cell power distributio etwork does ot take ito accout the presece of sigificat o-chip decouplig capacitace that helps to reduce the voltage drops. I additio, igorig the iductace ca result i a uderestimatio of the supply voltage variatios. The powerbus aalysis techiques [5, 6] use the peak/ average curret or the curret waveform obtaied by simulatios for a few vectors to approximate a heuristically costructed triagular or trapezoidal macroblock curret waveform. This macroblock curret waveform is the used to estimate the voltage drop at odes i the power distributio etwork with RLC models by simulatio or by a heuristic algorithm that performs a lookup of a pre-characterized waveform library. Oe limitatio of these time-domai simulatio techiques is that the frequecy-depedet resistace ad iductace parameters are hard to iclude. At high frequecies, the resistace ad iductaces become frequecy depedet due to pheomeo such as ski-effect ad proximity-effect [7]. Accurate electrical models for the power distributio etwork that are valid at all frequecies are required to capture the worst-case istataeous voltage variatios. The proposed techique uses RLC models for the power distributio etwork ad it ca hadle frequecy depedece for ay or all of the parameters. The iput patter depedece of the curret draw by logic gates makes the problem of estimatig the maximum curret or maximum voltage drop a hard problem. Simulatio of the circuit for a feput vectors does ot guaratee the maximum curret except for circuits with a small umber of iputs. I order to reduce the complexity, the curret draw by the logic gates is abstracted as a curret

2 waveform ad the power distributio etwork is aalyzed with that waveform. Usig a lowerboud curret waveform to estimate the maximum voltage drop i the power distributio etwork does ot yield the maximum voltage drop values. All the above techiques simulate the power distributio etwork with R/RC/RLC models usig macroblock curret waveforms obtaied heuristically or by simulatio for a few vectors ad are ot guarateed to geerate the worst-case or eve the best-case voltage variatio at odes i the power distributio etwork. Aother approach is to estimate the maximum evelope curret for all the macroblocks i the circuit [8]. The maximum evelope curret is a upperboud o all possible curret waveforms draw by a macroblock. I [9], the maximum evelope curret for the macroblocks is used as a periodic waveform to estimate the maximum voltage drop for RC power distributio etworks. Although simulatio of the RC power distributio etwork with the maximum evelope currets gives the maximum voltage drops, this is ot true for ay RLC power distributio etwork. The solutio may still be a lowerboud o the maximum voltage drop. Without a good estimate of the maximum value of the voltage drop for RLC power distributio etwork ad o uderstadig of the factors that affect the maximum voltage drop at specific odes, the desig/optimizatio of the power distributio etwork becomes hard ad several ad hoc techiques are typically used i the desig process. Several importat desig decisios such as placemet of decouplig capacitors ad off-chip power distributio etwork desig require a estimate of the worst-case voltage variatio ad a excitatio that causes the worst-case values. I this paper, we preset a techique that is guarateed to geerate the maximum value of the voltage drop for the RLC power distributio etwork. I the proposed techique, we use the maximum evelope curret for each macroblock to determie the maximum curret magitude at a particular frequecy. This is described i Sectio 3. We assume that the high-frequecy cotet greater tha clock frequecy would fid a low-impedace path to the macroblock decouplig capacitaces ad focus o the high-frequecy cotet less tha clock frequecy. We use the bouds o the curret magitude at differet frequecies ad the Rayleigh's eergy theorem [1] to formulate a oliear optimizatio problem for the maximum voltage drop at a ode due to the curret excitatios at aother ode. This is described i Sectio 4. The solutio to the oliear optimizatio problem is derived usig Lagrage multipliers [11] ad it yields the maximum voltage drop at a ode due to all possible curret excitatios at aother ode. The maximum voltage drop at a ode due to all the curret excitatios is obtaied as the sum of the voltage drop due to each of the curret excitatios. This is described i Sectio 5. The complexity aalysis ad the sigificace of the proposed techique are preseted i Sectio 6. I Sectio 7, we preset the experimetal results. I Sectio 8, we give the coclusios. I the ext sectio, we formulate the problem. 2. PROBLEM FORMULATION The umber of odes i the power distributio etwork ca be extremely large because the power distributio etwork coects to every trasistor i a itegrated circuit. But a powerbus is typically desiged as a hierarchical structure i which the top-level power-grid coects to the macroblocks ad the power distributio etwork iside the mac- Curret draw from jth ode I j Macroblock Macroblock Macroblock Logic gates i the circuit Frequecy depedet RLC etlist for power distributio etwork (o-chip, package, board) V i Voltage at ith ode Figure 1: Hierarchical power bus aalysis roblock coects to the logic gates. All existigtechiques [1, 2, 3, 4, 5, 6] ad the proposed techique use the hierarchical abstractio with mior variatios. Fig. 1 shows the schematic diagram of the proposed powerbus aalysis usig the macroblock curret waveforms. I order to guaratee that the voltage drop i the power distributio etwork is maximum over all iput vectors, the curret waveform that is used to abstract the logic gate behavior should be valid over all the vectors. I this work, we use the maximum curret evelope for the macroblocks which is a istat-wise upper boud over all possible curret waveforms draw by the macroblock i a clock-cycle [8]. I the remaider of this sectio, we give the expressios for the voltage drop at odes i the power distributio etwork i terms of the curret excitatios i the frequecy domai. All voltages expressed i this paper are actually voltage deviatios from the omial value (referece value). This meas that the same aalysis is valid for both the power ad groud busses. I the remaider of this paper, we preset the aalysis of the power (Vdd) bus. Furthermore, the maximum voltage variatio from the referece value is referred to as the maximum voltage drop i this paper. We also assume that every ode i the powerbus etwork has a capacitace to the referece ode. The ode voltages ad currets i the frequecy domai for a RLC power distributio etwork ca be writte as, Y (f)v (f) = I(f) (1) where, V (f) is a vector of all ode voltages, I(f) is the curret vector, ad Y (f) is the complex admittace matrix. The admittace matrix has the capacitace terms o the diagoal ad the resistace/ iductace terms o the diagoal ad also as the off-diagoal terms of the matrix. The matrix Y (f) is complex, symmetric ad diagoally domiat. Give the curret excitatio I(f) of a particular frequecy, the voltage variatios at that frequecy ca be obtaied by computig the iverse of the Y (f) matrix ad multiplyig with I(f). Let f k be a frequecy at which the voltage at ode i, V i (f k ) is computed. The ode voltage V i (f k ) ca be expressed as, V i (f k ) = Z i1 (f k )I 1 (f k ) + + Z im (f k )I m (f k ) (2) where, (Z i1 (f k ); ;Z im (f k )) correspod to the elemets of the ith row of Y 1 (f). Let V ij (f k ) deote the voltage drop at ode i due to the curret excitatio at ode j for a particular frequecy f k. The magitude of voltage drop at ode i due to the curret excitatio at ode j for a particular frequecy f k ca be writte as, jv ij (f k )j = jz ij (f k )jji j (f k )j (3) Sice jz ij (f k )j is a costat, maximizatio of the magitude of voltage drop jv ij (f k )j, requires the maximizatio of the curret excitatio ji j (f k )j for that frequecy. I the ext sectio, we preset a techique to estimate the maximum value of the curret magitude at a particular frequecy. 377

3 -T/2 s(t) p(t) Te T/2 Figure 2: Periodic waveform s(t) for maximum magitude at a specified frequecy α p(t) g(t) T/2 Te p(t- α) Figure 3: Maximizig the itegral of the product over all time-shifts This is the maximum value of the curret magitude at a particular frequecy over all possible time-domai curret waveforms. These results are used i the subsequet sectio to formulate a optimizatio problem for the maximum voltage drop i the RLC power distributio etwork. 3. MAXIMUM CURRENT MAGNITUDE AT A PARTICULAR FREQUENCY The time-period of the maximum evelope curret is represeted by T e. If the maximum evelope curret is repeated idefiitely, we get a periodic curret waveform that is a istat-wise upper boud over all possible curret waveforms draw by a macroblock. We refer to this waveform as g(t). If suppose we set the curret waveform i alterate cycles of g(t) to zero, we get a periodic waveform i which the curret is zero for duratio T e, followed by the maximum evelope curret for duratio T e. We refer to the ew periodic waveform as s(t) ad it has a time-period 2T e. It is possible that the waveform s(t) gives the maximum magitude of the curret at frequecy 1=2T e. Fig. 2 shows aother waveform s(t) that may give the maximum magitude of the curret with a time-period 8T e. The goal is to recostruct time-domai periodic waveforms (s(t)) from g(t) for various frequecies such that the the magitude of the curret at that frequecy is maximized. I additio, o other periodic or aperiodic waveform ca geerate a larger magitude frequecy compoet. The problem of fidig the maximum magitude (C) for a particular frequecy based o the Fourier series requires the estimatio of the maximum value of the itegral of the product of the periodic maximum evelope curret g(t) ad the positive part of the sie/ cosie fuctio at that frequecy. This is graphically illustrated i Fig. 3. For arbitrary evelope currets, the value of the itegral chages with time shifts. I order to obtai the maximum value for C, the followig itegral has to be maximized over all possible values of ff, R ff = Z 1 1 g(t)p(t ff)dt (4) Propositio 1. The maximum value of R ff is give by, R max ff = g P () + 2 1X =1 jg jjp ( T e )j (5) where g i deotes the Fourier series for g(t) ad P (f) is the frequecy domai represetatio of p(t). Proof. Omitted due to lack of space Although the above expressio cotais a ifiite summatio, the values of jg j decrease rapidly with ad are isigificat for > 2 for ay realistic g(t). Hece, the summatio ca be approximated as a fiite summatio without a sigificat loss of accuracy. For a arbitrary maximum evelope curret, Eq. 5 ca be used to compute the maximum value boud o C ad it also correspods to jij max (f k )j, the maximum curret magitude at a frequecy. 4. MAXIMUM VOLTAGE VARIATION WITH RLC MODELS The magitude of voltage drop at ode i due to the curret excitatio at ode j for a particular frequecy f k ca be computed usig the jij max (f k )j value computed i the previous sectio. This process ca be repeated for differet frequecies. Give a set of frequecies S = ff 1 ; ;f k ; ;f g that could be excited by a hypothetical time-domai waveform, the voltage drop at ode i due to the curret excitatio at ode j for the set of frequecies S ca be writte as, V ij (S) = V ij (f k ) = Z ij (f k )I j (f k ) (6) The maximum magitude of the voltage drop which is also the maximum time-domai voltage drop ca be writte as, jvij max (S)j = max jz ij (f k )jji max j (f k )jx k (7) where» x k» 1 ad it deotes the fractio of the maximum curret magitude for frequecy f k that is icluded to compute the maximum magitude of the voltage drop. The maximum magitude of the voltage drop correspods to the maximum time-domai voltage drop. A trivial upperboud ca be obtaied by settig all the values of x k to 1. I reality, all the frequecy compoets may ever be maximum for ay time-domai sigal. Time-domai sigals with the maximum magitude at a particular frequecy ofte have miimum magitude at some of the other frequecies. I the remaider of this sectio, we describe the use of Rayleigh's eergy theorem to obtai costraits o the variables x k. For a arbitrary sigal u(t) ad its Fourier trasform U(f), Rayleigh's eergy theorem (Parseval's theorem) states that, Z +1 1 ju(f)j2 df = Z +1 1 ju(t)j2 dt (8) This theorem states that eergy measured i time ad frequecy domais is idetical for a sigal. It is valid for ay periodic or aperiodic sigal. Cosider a curret waveform i(t) that is obtaied by duplicatig the maximum curret evelope for a time duratio called the computatio time (T c ). The value of T c is chose to be a itegral multiple of T e. The curret waveform i(t) is a aperiodic waveform of duratio T c ad it is a upperboud over all possible waveforms draw i that duratio. Sice i(t) is aperiodic, its Fourier trasform I(f) would be a cotiuous waveform. I sectio 3, we preseted a techique to compute the maximum curret magitude at a particular frequecy f k. The curret magitude at a particular frequecy f k ca be represeted as, ji(f k )j = ji max (f k )jx k (9) 378

4 The eergy i the frequecy domai over a set of frequecies S ca the be writte as, ji(f k )j 2 = ji max (f k )j 2 x 2 k (1) Substitutig this i the Rayleigh's eergy theorem, ji max (f k )j 2 x 2 k» Z Tc ji(t)j 2 dt (11) The iequality comes from the fact that the set S does ot iclude all the frequecies i the Fourier trasform of i(t). Usig the liear objective fuctio of the form P a kx k give by Eq. 7 ad the quadratic costrait of the form P w kx 2 k» c give by Eq. 11, a optimizatio problem ca be formulated for the maximum voltage drop. This oliear optimizatio problem is described i the ext sectio. The remaiig issues are assigig values to the size of set S ad the frequecy compoets i set S. Oe of the compoets of set S is the DC compoet. It is computed from the aperiodic waveform i(t). Apart from the DC compoet, sufficiet umber of frequecies must be selected i order to cover the peaks (local maxima) i the curret magitude ad the impedace. Oe approach is to sample the frequecies uiformly. I geeral, it is ot ecessary to iclude all the frequecies because the optimizatio esures that the peak voltage drop is captured. Note that the above formulatio gives the solutio to the maximum voltage drop at a ode due to the curret excitatio. This has to be repeated for differet curret excitatio to obtai the maximum voltage drop at a ode due to each curret excitatio. The maximum voltage drop at a ode due to all the curret excitatios is obtaied as the sum of the voltage drop due to each of the curret excitatios. I the ext sectio, we derive the solutio to the oliear optimizatio problem usig Lagrage multipliers. 5. SOLUTION WITH LAGRANGE MULTI- PLIERS The objective fuctio give i Eq. 7 ca be writte as, max a k x k (12) where a k >. The costrait Eq. 11 ca be writte as, w k x 2 k» c (13) where w k > ad c >. The costraits o the bouds o the variables are represeted as, x k» 1 ; 8k. The oegativity costrait o x k is ot ecessary because it is a iactive costrait. Usig the remaiig costraits we formulate the Lagragia to trasform the problem ito a ucostraied optimizatio problem. I this formulatio, scalars called the Lagrage multipliers are used for each of the costraits ad this is added to the objective fuctio. For this problem, the Lagragia ca be writte as follows, L(x; ) = a i x i + [c x 2 i ] + i [1 x i ] (14) The goal is to fid the ucostraied maximum over x ad the miimum over for L(x; ) which produces the optimal solutio for the origial problem. Suppose this solutio say ~x, ~ exists. The the first-order coditios for a maximum of fuctio L imply that the partial derivative with respect to x i for all i must be. This meas that, Rearragig, ffil(x; ) ffix i = a i ~ 2 ~x i ~ i = 8i (15) ~x i = a i ~ i 2 ~ 8i (16) For iactive costraits the extreme (optimal) solutio are achieved i the iterior of the costrait. For these the i value is. This i effect removes the iactive costraits from the Lagragia. For active costraits the extreme (optimal) solutio costraits are satisfied with a equality. For these costraits the first-order optimality coditios imply that the partial derivative with respect to i must be. This is writte as, ffil(x; ) ffi i = (17) If the costrait correspodig to is active, the ffil(x; ) ffi =. This implies that, w 1 ~x w x~ 2 = c. Substitutig the values of ~x i from Eq. 16 ad rearragig terms, ~ = 1 2 p c vu u t X (a i ~ i ) 2 (18) If the costrait correspodig to ay of the i ~ (i = 1,, ) is active, the ffil(x; ) ffi i = ad it implies that, ~x i = 1. The problem os to determie which of the costraits are active ad which are iactive. We solve this problem by first cosiderig two extreme cases: ffl Is the costrait correspodig to ~ iactive ad all the remaiig costraits active? The aswer to the above questio ca be obtaied by testig if all the ~x i ca be 1 ad still satisfy the costrait correspodig to ~ (Eq. 13). This correspods to checkig if w w» c. If the above coditio is true, the the costrait correspodig to ~ is iactive ad all the costraits correspodig to ~ i (i = 1,, ) are active for obtaiig the maximum optimal solutio. The optimal solutio for the problem is obtaied P by settig all the ~x i to 1 ad the optimal value is a i. ffl Is the costrait correspodig to ~ active ad all the remaiig costraits iactive? I order to aswer the above questio, we assume that the costraits correspodig to ~ i (i = 1,, ) are iactive ad oly the the costrait correspodig to ~ is active to compute the optimal solutio aalytically. From the solutio, it is possible to determie the coditios for which the solutio is valid ad the preset a recursive algorithm to compute the optimal value if the above coditios are ot met. Assumig that all the costraits correspodig to ~ i (i = 1,, ) are iactive implies that ~ i is zero for (i = 1,, ) ad the costrait correspodig to ~ 379

5 is active. Substitutig these values i Eq. 18, ~ is reduced to, ~ = 1 2 p c vu u t X a 2 i (19) ad each ~x i (i = 1,, ) from Eq. 16 becomes, ~x i = a i 2 ~ (2) Substitutig the value of ~x i i the objective fuctio, a 1 ~x a x~ = 1 2 ~ a 2 i (21) Substitutig the value of ~ i the above equatio yields the optimal solutio for these coditios, vu u t X a 2 c i (22) The above solutio is the optimal value to the origial problem oly if oe of the variables are larger tha 1. This is because the costraits correspodig to ~ i (i = 1,, ) are assumed to be iactive. If the above coditio is ot true, the the optimal solutio has to be computed by the techiques described below. Note that the optimal solutio obtaied by assumig that the variables are ubouded is a upperboud o the optimal solutio for the problem with bouded variables. If oe of the above two extreme case hold true, the it implies that the costrait correspodig to ~ is active ad some of the remaiig costraits are also active. We use the followig recursive algorithm to determie the costraits correspodig to i ~ (i = 1,, ) that are active. Observe a i that if > a j w j the ~x i ~x j, for ay two variables that are ot bouded. This is idepedet of the choice of the other variables that are bouded/ ubouded. Therefore we ca use the followig recursive algorithm to idetify the variables that are set to 1. (iactive costraits) 1. Assumig all the remaiig variables are ubouded, compute the optimal solutio ad idetify the variable with the largest value. 2. If that variable is larger tha 1, the set it to 1, update costrait Eq. 13, drop the variable, repeat step 1. The above algorithm termiates whe the coditio i step 2 is false. The worst-case complexity of the algorithm is liear-time i the umber of variables. Oce the algorithm termiates, the optimal solutio for the origial problem is computed as the sum of the optimal solutio for the problem with reduced variables ad the sum of the weights i the objective fuctio correspodig to all previously dropped variables. 6. COMPLEXITY ANALYSIS Let d deote the umber of frequecy compoets for which the umerical itegratio is performed i order to evaluate the Fourier series of the periodic maximum evelope curret for a macroblock. Let m ad l deote the umber of macroblocks ad umber of odes i the circuit. The umber of frequecy compoets was previously deoted as. The proposed techique has computatioal complexity i the followig three steps: First, computatio of the Fourier series for g(t) ad the maximum curret magitude for all frequecies/ macroblock curret waveforms: O(md + m). Secod, computatio of weights for objective fuctios: O(l 3 ). Third, solvig the oliear optimizatio problem for the maximum voltage drop at all the odes: O(ml). The computatioal complexity of fidig the maximum voltage drop at all the odes i the RLC power distributio etwork is give by, O(md + m + l 3 + ml). Clearly this is bouded by O(l 3 ), the cost of evaluatig the iverse of the complex admittace matrix at differet frequecies. Techiques to speed-up this computatio ca be used to reduce the complexity. As a compariso, the SPICE simulatio for oe curret excitatio with variable time steps could have a complexity greater tha the above. Our techique gives the maximum over all excitatios ad a SPICE simulatio for oe curret excitatio would oly give the voltage waveforms for that excitatio. Sice the aalysis is performed i the frequecy domai, frequecy depedet resistace ad iductace ca be icluded i the aalysis. Furthermore, the problem of settig the iitial coditios i time-domai simulatios for a trajectory that gives the maximum voltage variatios does ot appear i frequecydomai aalysis. The maximum voltage drop computed by the proposed techique is a upperboud over all possible periodic, quasi-periodic, ad aperiodic time-domai curret excitatio waveforms of the macroblocks. Sice the power bus desig techiques attempt to modify the impedace offered by the power distributio etwork to the curret excitatios at various frequecies, this techique ca be used i the sythesis of robust power distributio etworks. 7. EXPERIMENTAL RESULTS Experimetal results are preseted for a 16-bit pipelied static CMOS adder usig.35-μm, 3-V techology. The RC itercoect parasitics of the power bus are extracted from the layout. Each resistace is replaced by two resistaces with half the value ad a iductace of a omial value (.5 H) betwee the two resistaces. A capacitace of omial value (2 ff) is placed at each ode without a capacitor to the referece ode. The parameters of the bodig pi parasitics are chose as L p is 5 H, R p is.1 Ω, ad C p is 1 pf. The other ed of the bodig pis is assumed to be coected to the referece voltage. The experimetal results are geerated for this RLC etwork. I the first experimet, the maximum curret evelope waveform for the macroblocks is used i the proposed techique ad the SPICE simulatio i order to evaluate the accuracy of the proposed techique. The computatio time T c is chose to be 1 times the time period of the curret evelope T e. Usig these values, the maximum voltage drop i the RLC power distributio etwork is computed by the proposed techique described i the previous sectios. SPICE simulatio of the RLC power distributio etwork for differet curret excitatios is performed to estimate the maximum voltage drop at odes i the power distributio etwork. All quasi-periodic waveforms with a period of 2T e (differet iteger values) i which the maximum curret evelope is applied for T e, followed by curret for T e, ad repeated for the etire duratio of the computa- 38

6 Table 1: Worst-case voltage drops usig the proposed techique ad SPICE simulatios Node Proposed Techique (V) SPICE sim. (V) tio time, are used as the curret excitatios. I additio, SPICE simulatios of the RLC power distributio etwork are performed for 2 differet radom curret excitatios of 1 cycles duratio. For each of the radom curret excitatios the curret is iitially assumed to be for all the macroblocks. At each of the 1 cycles, a ubiased coi is flipped ad if the result is a 1 the the maximum evelope curret for the macroblocks is used for that cycle. The maximum voltage drop at a ode over all the SPICE simulatio results is reported as the estimate of the maximum voltage drop at that ode. Table 1 shows a compariso of the worst-case voltage drop at various odes usig the proposed techique ad SPICE simulatios. It ca be see that the proposed techique geerates a tight upper-boud o the SPICE simulatio results. The computatio time for estimatig the maximum voltage drop at all the odes i the power distributio etwork usig the proposed techique is CPUs o a Su UltraSPARC 5. SPICE simulatio of the adder circuit alog with the power distributio etwork for a sequece of 1 radom iput vectors was also performed. These simulatios are repeated 2 times for differet iput vector sequeces to obtai the maximum voltage drop at odes i the power distributio etwork. It was observed that the maximum voltage drop at odes was uder-estimated by a factor of 4 for some odes whe compared with the maximum voltage drop estimates obtaied by the proposed method for a computatio time of 1 cycles. I geeral, simulatio of the circuit with radom iput vectors is ot guarateed to give good estimates of the maximum voltage drop except for circuits with a small umber of iputs. The proposed techique uses the maximum evelope curret of the macroblocks to geerate tight upper-boud estimates of the maximum voltage drop with omial computatioal resources. The mathematical aalysis preseted i this paper is for a geeral maximum evelope curret. If certai assumptios ca be made about the shape of the maximum evelope curret, the more accurate expressios ca be derived usig the aalysis preseted i this paper. Also, a tight maximum evelope curret for each of the macroblocks is required to reduce the pessimism i the voltage drop estimates. 8. CONCLUSIONS I this paper, we preseted a techique to estimate the worst-case voltage variatio usig a RLC model for the power distributio etwork. We use the maximum evelope curret to estimate the maximum curret magitude at a particular frequecy. A aalytical expressio is preseted for the maximum value of the curret magitude at a particular frequecy for ay periodic/ aperiodic curret waveform. We use the bouds o the curret magitude at differet frequecies ad the Rayleigh's eergy theorem to formulate a oliear optimizatio problem for the maximum voltage drop at a ode due to ay curret excitatio at aother ode. The solutio to the oliear optimizatio problem is derived usig Lagrage multipliers ad it yields the maximum voltage drop at a ode due to ay curret excitatio at aother ode. The maximum voltage drop at a ode due to the curret excitatios at all odes is obtaied as the sum of the voltage drop due to each of the curret excitatios. Comparisos with SPICE simulatios are preseted to validate our approach. The CPU time requiremets of the proposed techique are omial. The sigificace of this work lies i its applicatio to the desig of robust power distributio etwork for circuits with high curret demad. 9. REFERENCES [1] D. Stark ad M. Horowitz, Techiques for calculatig currets ad voltages i VLSI power supply etworks," IEEE trasactios o CAD, vol. 9, o. 2, pp , Feb [2] A. Dalal, L. Lev ad S. Mitra, Desig of a efficiet power distributio etwork for the UltarSPARC-I microprocessor," i Proc. of ICCD, pp , [3] G. Steele, D. Overhauser, S. Rochel ad S. Z. Hussai, Full-chip verificatio methods for DSM power distributio systems," i Proc. of DAC, pp , [4] A. Dharchoudhury, R. Pada, D. Blaauw ad R. Vaidyaatha, Desig ad aalysis of power distributio etworks i PowerPC microprocessor," i Proc. of DAC, pp , Jue [5] H. H. Che ad D. D. Lig, Power supply oise aalysis methodology for deep-submicro VLSI chip desig," i Proc. of DAC, pp , [6] Y.-M. Jiag, K.-T. Cheg ad A.-C. Deg, Estimatio of maximum power supply oise for deep sub-micro desigs," i Proc. of ISLPED, pp , Aug [7] D. Herrell ad B. Beker, Modelig of power distributio systems for high-performace microprocessors," IEEE Trasactios o Advaced Packagig, vol. 22, o. 3, pp , Aug [8] S. Bobba ad I. N. Hajj, Estimatio of maximum curret evelope for power bus aalysis ad desig," i Proc. of ISPD, pp , Apr [9] G. Bai, S. Bobba, ad I. N. Hajj, Simulatio ad optimizatio of the power distributio etwork i VLSI circuits," accepted for publicatio i Procc. of ICCAD, Nov. 2. [1] S. Hayki, Commuicatio systems. New York, NY: Joh Wiley, [11] D. Bertsekas, Noliear programmig. Belmot, MA: Athea Scietific,