8-Channel Latchable Multiplexers

Transcription

1 9-359; Rev ; 3/9 8-Channel Latchable Multiplexers General escription Maxim s G528/G529 are monolithic, 8-channel, CMOS multiplexers with on-board address and control latches that simplify design and reduce board space in microprocessor-based applications. The G528 is a single-ended, -of-8 multiplexer, while the G529 is a differential, 2-of-8 multiplexer. These devices can operate as multiplexers or demultiplexers. The G528/G529 have break-before-make switching to prevent momentary shorting of the input signals. Each device operates with dual supplies (±4.5V to ±2V) or a single supply (+5V to ). All logic inputs are TTL and CMOS compatible. The Maxim G528/G529 are pin and electrically compatible with the industry-standard G528/G529. Applications ata-acquisition Systems Automatic Test Equipment Avionics and Military Systems Communication Systems Microprocessor-Controlled Systems Audio-Signal Multiplexing Typical Operating Circuit Features Low-Power, Monolithic CMOS esign On-Board Address Latches Break-Before-Make Input Switches TTL and CMOS Logic Compatible Microprocessor-Bus Compatible r S(ON) < 4Ω Pin and Electrically Compatible with the Industry- Standard G528/G529 and AG528/AG529 Ordering Information PART TEMP. RANGE PIN-PACKAGE G528CJ G528CWN G528CK C to +7 C C to +7 C C to +7 C 8 Plastic IP 8 Wide SO 8 CERIP G528C/ C to +7 C ice* G528J -4 C to +85 C 8 Plastic IP G528N -4 C to +85 C 2 PLCC G528EWN -4 C to +85 C 8 Wide SO G528K -4 C to +85 C 8 CERIP G528AZ -55 C to +25 C 2 LCC** G528AK -55 C to +25 C 8 CERIP** Ordering Information continued at end of data sheet. * Contact factory for dice specifications. ** Contact factory for availability and processing to MIL-ST-883. Pin Configurations G528/G529 +5V -5V TOP VIEW 8 INA INB IN2A IN2B IN3A G529 OUTA OUTB 33 µp INTERFACE A S S G A GN S5 IN3B S3 7 2 S6 IN4A S4 8 S7 IN4B A A 9 S8 MUX AN A/ CONTROL IFFERTIAL FOR ATA-ACQUISITION SYSTEMS IP/SO Pin Configurations continued at end of data sheet. Maxim Integrated Products Call toll free for free samples or literature.

2 G528/G529 ABSOLUTE IMUM RATINGS Voltage Referenced to...+44v GN...+25V igital Inputs V S, V... -2V to +2V or 2mA, whichever occurs first. Current (any terminal, except S or )...3mA Continuous Current, S or Peak Current, S or...2ma (pulsed at ms, % duty cycle max)...5ma Continuous Power issipation (T A = +7 C) (Note ) 8-Pin Plastic IP (derate.mw/ C above +7 C)...889mW Note : All leads are soldered or welded to PC board. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS ( = 5V, = -5V, V = 2.4V, = V, = 2.4V, T A = T to T, unless otherwise noted.) PARAMETER Analog-Signal Range rain-source On-Resistance SYMBOL VANALOG r S(ON) (Note 2) CONITIONS V = ±V, V AL =.8V, I S = -2µA, V AH = 2.4 (Note 3) 8-Pin Wide SO (derate 9.52mW/ C above +7 C)...762mW 8-Pin CERIP (derate.53mw/ C above +7 C)...842mW 2-Pin PLCC (derate.mw/ C above +7 C)...8mW 2-Pin LCC (derate 9.9mW/ C above +7 C)...727mW Operating Temperature Ranges G52_C_... C to +7 C G52 /E_...-4 C to +85 C G52_A_ C to +25 C Storage Temperature Range C to +5 C Lead Temperature (soldering, sec)...+3 C, T T A = T G52_A TYP G52_C//E TYP UNITS V Ω Greatest Change in rain- Source On-Resistance Between Channels r S(ON) -V < V S < V 6 6 % Source-Off Leakage V = V, V S = ±V, I Current S(OFF) V = ±V T A = T V = V, G528 rain-off Leakage T A = T I V S = ±V, Current (OFF) V = ±V G529 T A = T T V AH = 2.4V, A = +25 C G528 rain-on Leakage V S = V = ±V, T A = T I Current (Notes 3, 4) (ON) V AL =.8V, V = 2.4V G529 T A = T V A = 2.4V Address Input Current, T A = T -3 I Input Voltage High AH V A = 5V T A = T 3 Address Input Current, V I A = = = V, Input Voltage Low AL V = V or 2.4V T A = T na na na µa µa 2

3 ELECTRICAL CHARACTERISTICS ( = 5V, = -5V, V = 2.4V, = V, = 2.4V, T A = T to T, unless otherwise noted.) PARAMETER YNAMIC Switching Time of Multiplexer Break-Before-Make Interval Enable, Write Turn-On Time SYMBOL CONITIONS G52_A TYP G52_C//E TYP t TRANS Figure.4.5 µs t OP Figure µs t ON(, ) Figures 3, µs Enable, Reset Turn-Off t Figures 3, 5.5 Time OFF(, ).4 µs Charge Injection Q Figure pc V = V, R L = kω, Off Isolation O IRR C L = 5pF, db V S = 7V RMS, f = 5kHz UNITS G528/G529 Logic-Input Capacitance Source-Off Capacitance C IN f = MHz pf C S(OFF) V = V, f = 4kHz, V S = V 5 5 pf V = V, G rain-off Capacitance C (OFF) f = 4kHz, V S = V G529 2 SUPPLY Positive Supply Current Negative Supply Current IMUM TIG Pulse Width t WW Figure ns AX, ata Valid to AX, ata Valid after I+ V = V AH = V ma I- V = V AH = V ma t W (Stabilization Time) Figure ns t W (Hold Time) Figure ns Pulse Width t Figure 7; V S = 5V (Note 5) ns Note 2: Guaranteed by design. Note 3: Sequence each switch on. Note 4: I (ON) is leakage from driver into on switch. Note 5: Reset pulse period must be at least 5µs during or after power-on pf 3

4 G528/G529 t r < 2ns t f < 2ns 5% V IN.8V IN8 V IN8 t TRANSITION IN ON.8V IN IN8 ON t TRANSITION 5Ω +5V IN IN2 TO IN7 OUT G528 ±V A IN8 ±V A GN +5V -5V M G529 INB ±V INA TO IN4A OUTA, IN2B TO IN3B A IN4B ±V A GN OUTB B 5Ω M -5V Figure. Transition-Time Test Circuits t r < 2ns t f < 2ns 5% V IN V +.5V +.5V G529 IN_ AN +5V OUTA 8% A, A () OUTB V GN O V 5Ω k t OP -5V +5V Figure 2. Open-Time (B.B.M.) Interval Test Circuit 4

5 t r < 2ns t f < 2ns 5% t ON()...9 V IN t OFF() 5Ω 5Ω A A GN A +5V IN IN2 TO IN8 OUT -5V +5V INB INA TO IN4A OUTA IN2B, IN3B, IN4B k G528-5V -5V G529 G528/G529 A GN OUTB OUT B k -5V Figure 3. Enable t ON /t OFF Time Test Circuit +5V G V 5% IN OR +5V A, A () INB t ON() EVICE MUST BE RESET PRIOR TO APPLYING PULSE.2 GN REMAINING ES OUTB OUT -5V k Figure 4. Write Turn-On Time t ON() Test Circuit 5

6 G528/G V 5% t OFF().8 +5V IN OR A, A () INB REMAINING ES OUTB OUT GN -5V k +5V G528* * AS SHOWN Figure 5. Reset Turn-Off Time t OFF() Test Circuit V G R G +5V A, A () S_ GN G528* CL = pf IS THE MEASURE OF VOLTAGE ERROR UE TO CHARGE INJECTION. THE CHARGE INJECTION IN COULOMBS IS Q = C L X. -5V * AS SHOWN Figure 6. Charge-Injection Test Circuit +.5V t WW t W t W +.5V t t OFF(), A, A, () +2.V +.8V.8 Figure 7. Typical Timing iagrams for G528/G529 6

7 Table. G528 Logic States A A ON Latching X X X X Reset X X X X X Transparent Operation Maintains previous switch condition None (latches cleared) Table 2. G529 Logic States A A ON Latching X X X Reset X X X X Transparent Operation Maintains previous switch condition None (latches cleared) G528/G529 X X X None X X Note: Logic : V AH 2.4V, Logic : V AL.8V. None etailed escription The internal structures of the G528/G529 include translators for the /A/A/// digital inputs, latches, and a decode section for channel selection (Truth Tables). The gate structures consist of parallel combinations of N and P MOSFETs. ITE () and RESET () strobes are provided for interfacing with µp-bus lines (Figure 9), alleviating the need for the µp to provide constant address inputs to the mux to hold a particular channel. When the strobe is in the low state (less than.8v) and the strobe is in the high state (greater than 2.4V), the muxes are in the transparent mode they act similarly to nonlatching devices, such as the G58A/ G59A or the HI58/HI59. When the goes high, the previous BC address input is latched and held in that state indefinitely. To pull the mux out of this state, either must be taken low to the transition state, or must be taken low to turn off all channels. turns off all channels when it is low, which resets channel selection to the channel mode. The G528/G529 work with both single and dual supplies and function over the +5V to single-supply range. For example, with a single +5V power supply, analog signals in the V to +5V range can be switched normally. If negative signals around V are expected, a negative supply is needed. However, only -5V is needed to normally switch signals in the -5V to +5V range (-5V, +5V supplies). No current is drawn from the negative supply, so Maxim s 635 C-C converter is an ideal choice. The latch allows all switches to be turned off under program control. This is useful when two or more G528s are cascaded to build 6-line and larger analog-signal multiplexers. 7

8 G528/G529 A_ PROTECTION PROTECTION PROTECTION PROTECTION 4-WIE LATCH CLK RESET LEVEL SHIFT ECOE S Sn Figure 8. Simplified Internal Structure Applications Operation with Supply Voltages Other Than ±5V Maxim guarantees the G528/G529 for operation from ±4.5V to ±2V supplies. The switching delays increase by about a factor of two at ±5V, and breakbefore-make action is preserved. The G528/G529 can operate with a single +5V to supply as well as asymmetrical power supplies like +5V and -5V. The digital threshold will remain approximately.6v above the GN pin, and the analog characteristics such as r S(ON) are determined by the total voltage difference between and. Connect to V when operating with a +5V to single supply. igital Interface Levels The typical digital threshold of both the address lines and is.6v with a temperature coefficient of approximately -3mV/ C, ensuring compatibility with TTL logic over the temperature range. The digital threshold is relatively independent of the power-supply voltages, going from a typical.6v when is 5V to.5v typical with = 5V. Therefore, Maxim s G528/G529 operate with standard TTL logic levels, even with ±5V power supplies. In all cases, s threshold is the same as the other logic inputs and is referenced to GN. The digital inputs can also be driven with CMOS logic levels swinging from either to or from to GN. The digital input current is just a few nanoamps of leakage at all input-voltage levels with a guaranteed maximum of µa. The digital inputs are protected from ES by a 3V zener diode between the input and and can be driven ±2V beyond the supplies without drawing excessive current. 8

9 MICROPROCESSOR SYSTEM BUS RESET ATA BUS +5V 7432 A A +5V IN IN2 IN3 IN4 IN5 IN6 ±5V ANALOG S G528/G529 IN7 ARESS BUS CS ARESS ECOER IN8-5V -OF-8 ANALOG S Figure 9. Bus Interface Pin Configurations (continued) TOP VIEW A N.C. A 8 4 V SS 5 S 6 S2 7 S3 8 G GN 6 V 5 S5 4 S6 A SA S2A S3A G A GN SB S2B S3B 4 V SS 5 SA 6 S2A 7 S3A 8 8 GN 7 V 6 SB 5 S2B 4 S3B S4A 8 S4B A 9 B S4 N.C. S8 S G S4A A N.C. B S4B A N.C. A LCC/PLCC IP/SO LCC/PLCC N.C. = NO CONNECT 9

10 G528/G529 _Ordering Information (continued) PART G529CJ G529CWN G529CK G529C/ TEMP. RANGE C to +7 C C to +7 C C to +7 C C to +7 C ice* PIN-PACKAGE 8 Plastic IP 8 Wide SO 8 CERIP G529J -4 C to +85 C 8 Plastic IP G529N -4 C to +85 C 2 PLCC G529EWN -4 C to +85 C 8 Wide SO G529K -4 C to +85 C 8 CERIP G529AZ -55 C to +25 C 2 LCC** G529AK -55 C to +25 C 8 CERIP** * Contact factory for dice specifications. ** Contact factory for availability and processing to MIL-ST-883. Chip Topographies S S2 S3 A G528 A GN S5 S6.25" (3.8mm) S4 S7 S8.3" (3.33mm) TRANSISTOR COUNT: 2 SUBSTRATE CONNECTE TO G529 A A GN.25" (3.8mm) SA S2A S3A SB S2B S3B S4A S4B A B.3" (3.33mm) TRANSISTOR COUNT: 2 SUBSTRATE CONNECTE TO

11 G528/G529 8-Channel Latchable Multiplexers Package Information IM A A A3 B B C E E e ea eb L INCHES MILLIMETE Plastic IP PLASTIC UAL-IN-LINE PACKAGE (.3 in.) IM PKG. P P P P P N INCHES MILLIMETE PINS C A E E ea eb A3 B B - 5 A L e 2-43A IM A A B C E e H L INCHES MILLIMETE 2-42A Wide SO SMALL-OUTLINE PACKAGE (.3 in.) IM INCHES MILLIMETE PINS L H E e A A C - 8.mm.4in. B

12 G528/G529 Package Information (continued) A L Q e B B L E E -5 C IM A B B C E E e L L Q S S INCHES MILLIMETE S S CERIP CERAMIC UAL-IN-LINE PACKAGE (.3 in.) IM PINS INCHES MILLIMETE A Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 2 Maxim Integrated Products, 2 San Gabriel rive, Sunnyvale, CA 9486 (48) Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.