Precision, 8-Channel/Dual 4-Channel, Low-Voltage, CMOS Analog Multiplexers

Transcription

1 9-299; Rev. 6; 6/7 Precision, 8-Channel/Dual 4-Channel, General Description The precision, monolithic, CMOS analog multiplexers (muxes) offer low on-resistance (less than Ω), which is matched to within 6Ω between channels and remai flat over the specified analog signal range (Ω max). They also offer low leakage over temperature (NO off-leakage current less than 2.5nA at +85 C) and fast switching speeds (traition time less than 25). The is an 8-channel device, and the is a dual 4-channel device. The are fabricated with Maxim s lowvoltage silicon-gate process. Design improvements yield extremely low charge injection (less than 5pC) and guarantee electrostatic discharge protection (ESD) greater than 2V. These muxes operate with a single +3V to supply or bipolar ±3V to ±8V supplies, while retaining CMOS-logic input compatibility and fast switching. CMOS inputs provide reduced input loading. The are pin compatible with the industry-standard DG48, DG49, DG58A, and DG59A. Applicatio Sample-and-Hold Circuits Automatic Test Equipment Heads-Up Displays Guidance and Control Systems Military Radios Communicatio Systems Battery-Operated Systems PBX, PABX Audio Signal Routing Low-Voltage Data-Acquisition Systems Features Pin Compatible with Industry-Standard DG48/DG49/DG58A/DG59A Guaranteed On-Resistance Match Between Channels (< 6Ω) Low On-Resistance (< Ω) Guaranteed Flat On-Resistance over Signal Range (< Ω) Guaranteed Low Charge Injection (< 5pC) NO Off-Leakage Current < na at +85 C Off-Leakage Current < 2.5nA at +85 C ESD Protection > 2V +3V to Single-Supply Operation ±3V to ±8V Bipolar-Supply Operation Low Power Coumption (< 3µW) Rail-to-Rail Signal Handling TTL/CMOS-Logic Compatible PART Ordering Information TEMP RANGE PIN- PACKAGE PKG CODE CGE C to +7 C 6 QFN-EP* G655-3 CEE C to +7 C 6 QSOP E6- CSE C to +7 C 6 Narrow S6- CPE C to +7 C 6 Plastic P6- C/D C to +7 C Dice** EGE -4 C to + 85 C 6 QFN-EP* G655-3 EEE -4 C to + 85 C 6 QSOP E6- ESE -4 C to + 85 C 6 Narrow S6- EPE -4 C to + 85 C 6 Plastic P6- EJE -4 C to + 85 C 6 CERDIP J6- MJE -55 C to +25 C 6 CERDIP J6- Ordering Information continued at end of data sheet. *EP = Exposed pad. **Contact factory for dice specificatio. Pin Configuratio TOP VIEW A A A2 A A GND A 6 A A 6 A A2 2 GND 2 5 GND 2 N N GND NO5 N N2 2 3 N5 NA N2A NOB NO2B NA N2A 2 3 NB N2B N3 N4 6 7 NO6 NO7 N3 4 *EP 9 N6 N3A N4A 6 7 NO3B NO4B N3A 4 *EP 9 N3B 8 9 NO A 8 9 B DIP/SO/QSOP *EP = EXPOSED PAD, CONNECT EP TO. N4 N8 QFN N7 DIP/SO/QSOP N4A A B QFN N4B Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS Voltage Referenced to GND...-.3V to +7V...+.3V to -7V to...-.3v to +7V Voltage into Any Terminal (Note )...( - 2V) to ( + 2V) or 3mA (whichever occurs first) Current into Any Terminal...3mA Peak Current, Any Terminal (pulsed at ms, % duty cycle max)...4ma Continuous Power Dissipation (T A = +7 C) QFN (derate 8.5mW/ C above +7 C)...484mW QSOP (derate 8.3mW/ C above +7 C)...667mW Narrow SO (derate 8.7mW/ C above +7 C)...696mW Plastic DIP (derate 7.5mW/ C above +7 C)...47mW CERDIP (derate.mw/ C above +7 C... 9mW Operating Temperature Ranges MAX39_C... C to +7 C MAX39_E...-4 C to +85 C MAX39_MJE C to +25 C Storage Temperature Range C to +5 C Lead Temperature (soldering, s)...+3 C Note : Signals on any terminal exceeding or are clamped by internal diodes. Limit forward current to maximum current ratings. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Dual Supplies ( = ±%, = ±%, GND =, V AH = V H = +2.4V, V AL = V L = +.8V,, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX (Note 2) UNITS SWITCH Analog Signal Range Channel On-Resistance R ON Matching Between Channels (Note 4) On-Resistance Flatness (Note 5) NO Off-Leakage Current (Note 6) Off-Leakage Current (Note 6) On-Leakage Current (Note 6) V, V NO R ON ΔR ON R FLAT(ON) I NO(OFF) I (OFF) I (ON) (Note 3) I NO = ma, V = ±3.5V I NO = ma, V = ±3.5V, = 5V, = I NO = ma, V = ±3V, = 5V, = V NO = ±4.5V, V = 4.5V, = 5.5V, = -5.5V V = ±4.5V, V NO = 4.5V, = 5.5V, = -5.5V ± V = ±4.5V, V NO = 4.5V, = 5.5V, = -5.5V ± V = ±4.5V, V NO = ±4.5V ± C, E M T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX C, E M C, E M C, E M C, E M V 6 25 Ω 6 8 Ω 4 Ω na na na

3 ELECTRICAL CHARACTERISTICS Dual Supplies (continued) ( = ±%, = ±%, GND =, V AH = V H = +2.4V, V AL = V L = +.8V,, unless otherwise noted.) PARAMETER DIGITAL LOGIC INPUT Logic-High Input Voltage Logic-Low Input Voltage Input Current with Input-Voltage High Input Current with Input-Voltage Low SUPPLY Power-Supply Range Positive Supply Current SYMBOL V AH, V H V AL, V L I AH, I H I AL, I L I+ CONDITIONS MIN TYP MAX (Note 2) 2.4 ±3 ±8 - + UNITS V A = V = 2.4V µa V A = V =.8V V = V A = V/, = 5.5V, = -5.5V V V µa V µa Negative Supply Current I- V = V A = V/, = 5.5V, = -5.5V - + µa Ground Current I GND V = V A = V/, = 5.5V, = -5.5V µa DYNAMIC Traition Time t TRANS Figure 2 5 Break-Before-Make Interval t OP Figure 4 4 Enable Turn-On Time t ON() Figure Enable Turn-Off Time t OFF() Figure Charge Injection (Note 3) Q C L = nf, V S =, R S = Ω 2 5 pc Off-Isolation (Note 7) V =, R L = kω, f = khz -75 db Crosstalk Between Channels V CT V = 2.4V, f = khz, V G = V P-P, R L = kω -92 db Logic Input Capacitance C IN f = MHz 8 pf NO Off-Capacitance C NO(OFF) f = MHz, V = V D = V pf Off-Capacitance C (OFF) f = MHz, V = V D = V 4 2 pf On-Capacitance C (ON) f = MHz, V = V D = V pf 3

4 ELECTRICAL CHARACTERISTICS Single ( = 5V ±%, =, GND =, V AH = V H = +2.4V, V AL = V L = +.8V,, unless otherwise noted.) PARAMETER SWITCH Analog Signal Range On-Resistance R ON Matching Between Channels (Note 4) On-Resistance Flatness NO Off-Leakage Current (Note 8) Off-Leakage Current (Note 8) On-Leakage Current (Note 8) DIGITAL LOGIC INPUT Logic-High Input Voltage Logic-Low Input Voltage Input Current with Input-Voltage High Input Current with Input-Voltage Low SUPPLY Power-Supply Range Positive Supply Current Negative Supply Current I GND Supply Current SYMBOL V, V NO R ON ΔR ON R FLAT I NO(OFF) I (OFF) I (ON) V AH, V H V AL, V L I AH, I H I AL, I L I+ I- I GND (Note 3) I NO = ma, V = 3.5V, = 4.5V I NO = ma, V = 3.5V, = 4.5V V NO = 4.5V, V =, = 5.5V V = 4.5V, V NO =, = 5.5V V = 4.5V, V NO =, = 5.5V V = 4.5V, V NO = 4.5V, = 5.5V CONDITIONS I NO = ma; V = 3V, 2V, V; = 5V V A = V =.8V C, E M T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX T A = T MIN to T MAX C, E M C, E M C, E M C, E M MIN TYP MAX (Note 2) UNITS V Ω 3 Ω Ω na na na V A = V = 2.4V µa V = V A =, ; = 5.5V; = V = V A = V, ; = 5.5V; = V =, ; V A = ; = 5.5V; = V V µa V µa µa µa 4

5 ELECTRICAL CHARACTERISTICS Single (continued) ( = 5V ±%, =, GND =, V AH = V H = +2.4V, V AL = V L = +.8V,, unless otherwise noted.) DYNAMIC PARAMETER Traition Time Break-Before-Make Interval Enable Turn-On Time Enable Turn-Off Time Charge Injection (Note 3) SYMBOL t TRANS t OP t ON() t OFF() Q V NO = 3V CONDITIONS C L = nf, V S =, R S = Ω MIN TYP MAX (Note 2) ELECTRICAL CHARACTERISTICS Single +3V ( = 3V ±%, =, GND =, V AH = V H = +2.4V, V AL = V L = +.8V,, unless otherwise noted.) UNITS pc PARAMETER SYMBOL CONDITIONS MIN TYP MAX (Note 2) UNITS SWITCH Analog Signal Range On-Resistance DYNAMIC V ANALOG R ON (Note 3) I NO = ma, V =.5V, = 3V V Ω Traition Time (Note 3) t TRANS Figure 2, V IN = 2.4V, V N =.5V, V N8 = Enable Turn-On Time (Note 3) t ON() Figure 3, V INH = 2.4V, V INL =, V N =.5V 2 5 Enable Turn-Off Time (Note 3) t OFF() Figure 3, V INH = 2.4V, V INL =, V N =.5V 75 4 Charge Injection (Note 3) Q C L = nf, V S =, R S = Ω 5 pc Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. Note 3: Guaranteed by design. Note 4: ΔR ON = R ON MAX - R ON MIN. Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges, i.e., V NO = 3V to and to -3V. Note 6: Leakage parameters are % tested at maximum rated hot operating temperature, and guaranteed by correlation at +25 C. Note 7: Worst-case isolation is on channel 4 because of its proximity to the pin. Off-isolation = 2log V / V NO, V = output, V NO = input to off switch. Note 8: Leakage testing at single supply is guaranteed by correlation testing with dual supplies. 5

6 Typical Operating Characteristics (, unless otherwise noted.) RON (Ω) ON-RESISTANCE vs. V (DUAL SUPPLIES) V (V) V± = ±3V V± = ±5V 5 /9 toc RON (Ω) = 5V = ON-RESISTANCE vs. V AND TEMPERATURE (DUAL SUPPLIES) T A = +85 C T A = -55 C V (V) 5 /9 toc2 RON (Ω) = V ON-RESISTANCE vs. V (SINGLE SUPPLY) = 3V V (V) = 5V /9 toc3 RON (Ω) = 5V = V ON-RESISTANCE vs. V AND TEMPERATURE (SINGLE SUPPLY) T A = +85 C T A = -55 C /9 toc4 OFF-LEAKAGE (pa) = 5.5V = -5.5V OFF-LEAKAGE vs. TEMPERATURE /9 toc5 ON-LEAKAGE (pa), = 5.5V = -5.5V ON-LEAKAGE vs. TEMPERATURE /9 toc V (V) TEMPERATURE ( C) TEMPERATURE ( C) CHARGE INJECTION vs. V SUPPLY CURRT vs. TEMPERATURE 5 /9 toc7 = 5V = V = V A = V, 5V /9 toc8 Qj (pc) = 5V = V I+, I- (na) I+ I- = 5V = V (V) TEMPERATURE ( C) 6

7 QSOP/DIP/ SO QFN PIN QSOP/DIP/ SO QFN NAME, 5, 6 5, 4, 3 A, A2, A Address Inputs, 6 5, 4 A, A Address Inputs Enable FUNCTION 3 3 Negative-Supply Voltage Input N N4 Analog Inputs Bidirectional NA N4A Analog Inputs Bidirectional 8 6 Analog Output Bidirectional 8, 9 6, 7 A, B Analog Outputs Bidirectional N8 N5 Analog Inputs Bidirectional 3 8 N4B NB Analog Inputs Bidirectional Positive-Supply Voltage Input GND Ground EP EP EP Exposed Pad. Connect to. Pin Description 7

8 Applicatio Information Operation with Supply Voltages Other than ±5V Using supply voltages less than ±5V reduces the analog signal range. The muxes operate with ±3V to ±8V bipolar supplies or with a +3V to single supply. Connect to GND when operating with a single supply. Both device types can also operate with unbalanced supplies, such as +V and. The Typical Operating Characteristics graphs show typical on-resistance with ±3V, ±5V, +3V, and supplies. (Switching times increase by a factor of two or more for operation at.) Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings can cause permanent damage to the devices. Always sequence on first, then, followed by the logic inputs, NO, or. If power-supply sequencing is not possible, add two small signal diodes (D, D2) in series with supply pi for overvoltage protection (Figure ). Adding diodes reduces the analog signal range to one diode drop below and one diode drop * * above, but does not affect the devices low switch resistance and low leakage characteristics. Device operation is unchanged, and the difference between and should not exceed 7V. These protection diodes are not recommended when using a single supply. D D2 * * NO * INTERNAL PROTECTION DIODES Figure. Overvoltage Protection Using External Blocking Diodes Test Circuits/Timing Diagrams V 5Ω A2 A A NO NO2 NO7 NO8 GND 3Ω 35pF LOGIC INPUT V +3V 5% t R < 2 t F < 2 V 5Ω A A NOB NOA NO4A NO4B B GND 3Ω 35pF SWITCH OUTPUT V NO V NO8 t TRANS ON 9% 9% t TRANS Figure 2. Traition Time 8

9 5Ω V V A A A2 A GND NO NO2 NO8 NOB NOA NO4A NO2B NO4B, A kω Test Circuits/Timing Diagrams (continued) 35pF LOGIC INPUT V SWITCH OUTPUT +3V t ON() 5% 9% t R < 2 t F < 2 % t OFF() 5Ω A B GND kω 35pF Figure 3. Enable Switching Time +2.4V V A NO NO8 LOGIC INPUT V A +3V 5% t R < 2 t F < 2 V A 5Ω A A2 GND 3Ω 35pF SWITCH OUTPUT 8% t OP Figure 4. Break-Before-Make Interval 9

10 V S R S CHANNEL SELECT V NO A A A2 GND Test Circuits/Timing Diagrams (continued) C L = nf LOGIC INPUT V +3V OFF ON OFF Δ Δ IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER ERROR Q WH THE CHANNEL TURNS OFF. Q = Δ x C L Figure 5. Charge Injection nf nf V IN R S = 5Ω NO NO8 A A A2 GND R L = kω R = kω R G = 5Ω V IN NO NO2 NO8 A A A2 GND R L = kω nf OFF-ISOLATION = 2log V IN nf CROSSTALK = 2log V IN Figure 6. Off-Isolation Figure 7. Crosstalk CHANNEL SELECT A2 NO A NO8 A GND MHz CAPACITANCE ANALYZER f = MHz Figure 8. NO/ Capacitance

11 NO NO2 NO3 NO4 NO5 NO6 NO7 NO8 GND DECODERS / DRIVERS Functional Diagrams/Truth Tables GND NOA NO2A A NO3A NO4A NOB NO2B B NO3B NO4B DECODERS / DRIVERS A A A2 A A A2 A A ON SWITCH A A ON SWITCH X X X NONE X X NONE LOGIC "O" V AL +.8 V, LOGIC "" V AH +2.4 V 8

12 Ordering Information (continued) PART TEMP RANGE *EP = Exposed pad. **Contact factory for dice specificatio. Contact factory for package availability. PIN- PACKAGE PKG CODE CGE C to +7 C 6 QFN-EP* G655-3 CEE C to +7 C 6 QSOP E6- CSE C to +7 C 6 Narrow S6- CPE C to +7 C 6 Plastic P6- C/D C to +7 C Dice** EGE -4 C to + 85 C 6 QFN-EP* G655-3 EEE -4 C to + 85 C 6 QSOP E6- ESE -4 C to + 85 C 6 Narrow S6- EPE -4 C to + 85 C 6 Plastic P6- EJE -4 C to + 85 C 6 CERDIP J6- MJE -55 C to +25 C 6 CERDIP J6- Chip Topographies A A A2 GND A A N.C. GND NO NO2 NO5 NO6.2" (2.59mm) NOA NO2A NOB NO2B.2" (2.59mm) NO3 N.C. NO3A NO3B NO4 NO7 NO4A NO4B NO8 A B.8" (2.3mm) TRANSISTOR COUNT: 6 SUBSTRATE CONNECTED TO.8" (2.3mm) TRANSISTOR COUNT: 6 SUBSTRATE CONNECTED TO 2

13 Package Information (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to 32L QFN.EPS 3

14 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to 4

15 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to QSOP.EPS 5

16 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to N TOP VIEW E H INCHES MILLIMETERS DIM MIN MAX MIN MAX A A B C e.5 BSC.27 BSC E H L VARIATIONS: DIM D D D INCHES MILLIMETERS MIN MAX MIN MAX N MS AA AB AC SOICN.EPS D A C e B A FRONT VIEW L SIDE VIEW -8 PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE,.5" SOIC APPROVAL DOCUMT CONTROL NO. REV. 2-4 B 6

17 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to PDIPN.EPS 7

18 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to 2,6,2, 24L QFN.EPS PACKAGE OUTLINE 2,6,2,24L QFN, 4x4x.9 MM 2-6 E 2 8

19 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information, go to PACKAGE OUTLINE 2,6,2,24L QFN, 4x4x.9 MM 2-6 E 2 2 9

20 REVISION NUMBER REVISION DATE DESCRIPTION Revision History PAGES CHANGED 9/94 9/94 Initial release of data sheet 2 7/95 3 7/96 4 5/99 Errors in commercial data 5 6/99 Add QSOP Package 6 / Add QFN Package 7 /7 Add Exposed Pad info for QFN 8 6/7 Exposed pad designation, 7, 2 Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 2 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA 9486 (48) Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.