Serially Controlled, Clickless Audio/Video Switches MAX4571 MAX4574

Transcription

1 9-44; Rev ; 4/99 Serially ontrolled, lickless General Description The serial-interface controlled switches are ideal for multimedia applicatio. Each device features 35Ω max on-resistance, -9dB audio off-isolation at 2kHz, -6dB video off-isolation at.mhz, and clickless mode operation for audio applicatio. The MX457/MX4573 contain eleven SPST switches, while the MX4572/MX4574 contain two SPST switches and six SPDT switches. The MX457/MX4572 feature a 2-wire, I 2 -compatible serial interface. The MX4573/MX4574 feature a 3-wire, SPI /QSPI / MIROWIRE -compatible serial interface. ll four parts are available in 28-pin QSOP, SSOP, and wide SO packages and operate over the commercial and extended temperature ranges. Set-Top Boxes P Multimedia Boards TOP VIEW ( ) RE FOR MX4573 NO OM 2 NO2 3 OM2 4 NO3 5 OM3 6 NO4 7 OM4 8 NO5 9 OM5 NO6 OM6 2 NO7 3 OM7 4 pplicatio udio Systems Video onferencing Systems Pin onfiguratio MX457/MX4573 QSOP/SSOP/SO 28 V+ 27 SD (DOUT) 26 SL (DIN) 25 (SL) 24 (S) 23 GND 22 NO8 2 OM8 2 NO9 9 OM9 8 NO 7 OM 6 NO 5 OM Pin onfiguratio continued at end of data sheet. Features Selectable Soft Switching Mode for lickless udio Operation 35Ω max On-Resistance -9dB udio Off-Isolation at 2kHz -5dB Video Off-Isolation at MHz -9dB udio rosstalk at 2kHz -52dB Video rosstalk at MHz Serial Interface 2-Wire, Fast-Mode, I 2 -ompatible (MX457/72) 3-Wire, SPI/QSPI/MIROWIRE-ompatible (MX4573/74) Single-Supply Operation from +2.7V to +5.25V Ordering Information PRT TEMP. RNGE PIN-PGE MX457EI MX457I MX457WI to +7 to +7 to QSOP 28 SSOP 28 Wide SO MX457EEI -4 to QSOP MX457EI -4 to SSOP MX457EWI -4 to Wide SO MX4572EI to QSOP MX4572I to SSOP MX4572WI to Wide SO MX4572EEI -4 to QSOP MX4572EI -4 to SSOP MX4572EWI -4 to Wide SO MX4573EI to QSOP MX4573I to SSOP MX4573WI to Wide SO MX4573EEI -4 to QSOP MX4573EI -4 to SSOP MX4573EWI -4 to Wide SO MX4574EI to QSOP MX4574I to SSOP MX4574WI to Wide SO MX4574EEI -4 to QSOP MX4574EI -4 to SSOP MX4574EWI -4 to Wide SO I 2 is a trademark of Philips orp. SPI/QSPI are trademarks of Motorola, Inc. MIROWIRE is a trademark of National Semiconductor orp. Maxim Integrated Products For free samples & the latest literature: or phone For small orders, phone

2 BSOLUTE MXIMUM RTINGS V+ to GND...-.3V to +6V NO, OM_, DOUT to GND (Note )...-.3V to (V+ +.3V) SL, SD, S, SL, DIN,, to GND...-.3V to +6V ontinuous urrent into ny Terminal...±m Peak urrent (pulsed at ms, % duty cycle)...±5m ontinuous Power Dissipation (T = +7 ) QSOP (derate.8mw/ above +7 )...86mW SSOP (derate 9.5mW/ above +7 )...762mW Wide SO (derate 2.5mW/ above +7 )...mw Operating Temperature Ranges MX to +7 MX457_E...-4 to +85 Storage Temperature Range to +6 Lead Temperature (soldering, sec)...+3 Note : Signals on NO or OM_ exceeding V+ or V- are clamped by internal diodes. Limit forward-diode current to maximum current rating. Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELETRIL HRTERISTIS Single +5V Supply (V+ = +5V ±5%,, unless otherwise noted. Typical values are at.) (Note 2) PRMETER NLOG ITHES nalog Signal Range (Note 3) On-Resistance On-Resistance Match Between hannels (Note 4) On-Resistance Flatness (Note 5) NO Off-Leakage urrent (Note 6) OM_ Off-Leakage urrent (Note 6) OM _ On-Leakage urrent (Note 6) UDIO PERFORMNE Total Harmonic Distortion plus Noise SYMBOL V NO, V OM _ R ON R ON R FLT I NO (OFF) I OM _ = 4m, V NO = 3V, V+ = 4.75V I OM _ = 4m; V+ = 4.75V; V NO = V, 2V, 3V V NO = 4.5V, V; V OM _ = V, 4.5V; V+ = 5.25V I OM _ (OFF) V NO = 4.5V, V; V OM _ = V, 4.5V; V+ = 5.25V I OM _ (ON) V OM _ = 4.5V, V; V NO = 4.5V, V, or floating; V+ = 5.25V THD+N I OM _ = 4m, V NO = 3V, V+ = 4.75V ONDITIONS f IN = khz, R L = 6Ω, V NO = V RMS, V NO = 2.5V Off-Isolation (Note 7) V ISO() V NO = V RMS, f IN = 2kHz, R L = 6Ω, Figure hannel-to-hannel rosstalk V T() V NO = V RMS, f IN = 2kHz, R S = 6Ω, Figure MIN TYP MX V UNITS V Ω Ω Ω n n n.7 % -9 db -9 db 2

3 ELETRIL HRTERISTIS Single +5V Supply (continued) (V+ = 5V ±5%,, unless otherwise noted. Typical values are at.) (Note 2) -3dB Bandwidth Off-apacitance Turn-On Time Turn-Off Time PRMETER VIDEO PERFORMNE Off-Isolation (Note 7) hannel-to-hannel rosstalk SYMBOL V ISO(V) V T(V) BW OFF(NO) t ONSD t OFFSD V NO = V RMS, f IN =.MHz, R S = 5Ω, Figure R SOURE = 5Ω, R L = 5Ω f IN = MHz V NO =.5V, R L = 5kΩ, L = 35pF V NO =.5V, R L = 3Ω, L = 35pF ONDITIONS V NO = V RMS, f IN =.MHz, R L = 5Ω, Figure DYNMI TIMING WITH LILESS MODE DISBLED (Notes 8 and 2, Figure 2) MIN TYP MX > UNITS db db MHz pf MX4572/MX4574, V NO =.5V, Break-Before-Make Time t BBM DYNMI TIMING WITH LILESS MODE ENBLED (Note 8, Figure 2) V NO =.5V, R L = 5kΩ, L = 35pF, Turn-On Time t ONSE 25 8 ms Turn-Off Time t OFFSE V NO or =.5V, R L = 3Ω, L = 35pF, 3 ms POWER SUPPLY Supply Voltage Range V V Supply urrent (Note 9) I+ ll logic inputs = or V+, 6 µ ELETRIL HRTERISTIS Single +3V Supply (V+ = 3V ±%,, unless otherwise noted. Typical values are at.) (Note 2) PRMETER SYMBOL ONDITIONS MIN TYP MX UNITS NLOG ITHES nalog Signal Range (Note 3) V NO, V OM _ V+ V On-Resistance R ON I OM _ = 4m, V NO =2V, V+ = 2.7V 43 9 Ω On-Resistance Match Between hannels (Note 4) R ON I OM _ = 4m, V NO = 2V, V+ = 2.7V 5 5 Ω 3

4 ELETRIL HRTERISTIS Single +3V Supply (continued) (V+ = +3V ±%,, unless otherwise noted. Typical values are at.) (Note 2) PRMETER On-Resistance Flatness (Note 5) NO Off-Leakage urrent (Notes 6 and ) OM_ Off-Leakage urrent (Notes 6 and ) OM _ On-Leakage urrent (Notes 6 and ) SYMBOL R FLT I NO (OFF) I OM _ (OFF) I OM _ (ON) I OM_ = 4m; V+ = 2.7V; V NO = V, 5V, 2V V NO = 3V,.5V; V OM _ =.5V, 3V; V+ = 3.6V V NO = 3V,.5V; V OM _ =.5V, 3V; V+ = 3.6V V OM_ = 3V,.5V; V NO = 3V,.5V, or floating; V+ = 3.6V ONDITIONS MIN TYP MX UNITS Ω n n n UDIO PERFORMNE Total Harmonic Distortion plus Noise THD+N f IN = khz, R L = 6Ω, V NO _ =.5V RMS, V NO =.5V.7 % Off-Isolation (Note 7) V ISO() V NO =.5V RMS, f IN = 2kHz, R L = 6Ω, Figure hannel-to-hannel rosstalk V T() V NO =.5V RMS, f IN = 2kHz, R S = 6Ω, Figure -9 db -9 db VIDEO PERFORMNE Off-Isolation (Note 7) V ISO(V) V NO =.5V RMS, f IN = MHz, R L = 5Ω, Figure hannel-to-hannel rosstalk V T(V) V NO =.5V RMS, f IN = MHz, R S = 5Ω, Figure -5 db -52 db -3dB Bandwidth BW R SOURE = 5Ω, R L = 5Ω, L = 35pF >5 MHz Off apacitance OFF(NO) f IN = MHz 9 pf DYNMI TIMING WITH LILESS MODE DISBLED (Notes 8 and 2, Figure 2) Turn-On Time t ONSD V NO =.5V, R L = 5kΩ, L = 35pF Turn-Off Time t OFFSD V NO =.5V, R L = 3Ω, L = 35pF Break-Before-Make Time t BBM V NO =.5V, 2 DYNMI TIMING WITH LILESS MODE ENBLED (Notes 8 and 2, Figure 2) V NO =.5V, R L = 5kΩ, L = 35pF, Turn-On Time t ONSE 8 ms V NO =.5V, R L = 3Ω, L = 35pF, Turn-Off Time t OFFSE 3 ms 4 4

5 I/O INTERFE HRTERISTIS (V+ = +2.7V to +5.25V,, unless otherwise noted. Typical values are at.) PRMETER Input Low Voltage Input High Voltage Data Hold Time Data Setup Time lock Low Period lock High Period SL/SD Rise Time SL/SD Fall Time SYMBOL DIGITL INPUTS (SL, DIN, S, SL, SD,, ) STRT ondition Hold Time V IL V IH Input Hysteresis V HYST Input Leakage urrent I LE Input apacitance IN DIGITL OUTPUTS (DOUT, SD) Output Low Voltage V OL DOUT Output High Voltage 2-WIRE INTERFE TIMING (Figure 3) SL lock Frequency f SL Bus Free Time between Stop and Start ondition STOP ondition Setup Time 3-WIRE TIMING (Figure 5) Operating Frequency DIN to SL Setup DIN to SL Hold SL Fall to Output Data Valid S to SL Rise Setup S to SL Rise Hold S High Pulse Width SL Pulse Width Low SL Pulse Width High Rise Time (SL, DIN, S) Fall Time (SL, DIN, S) V OH t BUF t HD:ST t SU:STO t HD:DT t SU:DT t LOW t HIGH t R t F f OP t DS t DH t DO t SS t SH t t L t H t R t F V+ = 5V V+ = 3V ONDITIONS Digital inputs = or V+ MIN TYP MX V+ = 3V.6 V+ = 5V I SIN = 6m I SOURE =.5m (Note ) (Note ) LOD = 5pF V b 2 +. b D D UNITS V V V µ pf V V khz µs µs µs µs µs µs MHz µs µs 5

6 Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Note 3: Guaranteed by design. Not subject to production testing. Note 4: R ON = R ON(MX) - R ON(MIN). Note 5: Resistance flatness is defined as the difference between the maximum and minimum on-resistance values, as measured over the specified analog signal range. Note 6: Leakage parameters are % tested at maximum rated temperature, and guaranteed by correlation at. Note 7: Off-isolation = 2 log [V OM _ / V NO ], V OM _ = output, V NO = input to off switch. Note 8: ll timing is measured from the rising clock edge of the bit for 2-wire, and from the rising edge of S for 3-wire. Turnoff time is defined at the output of the switch for a.5v change, tested with a 3Ω load to ground. Turn-on time is measured with a 5kΩ load resistor to GND. ll timing is shown with respect to 2% V+ and 7% V+, unless otherwise noted. Note 9: Supply current can be as high as 2m per switch during switch traitio in the clickless mode, corresponding to a 28m total supply traient current requirement. Note : Leakage testing for single-supply operation is guaranteed by testing with a single +5.25V supply. Note : b = capacitance of one bus line in pf. Tested with b = 4pF. Note 2: Typical values are for MX4573/MX4574 devices. (V+ = +5V,, unless otherwise noted.) Typical Operating haracteristics ON-RESISTNE (Ω) ON-RESISTNE vs. V OM V+ = 2.7V V OM (V) V+ = 3.3V V+ = 5.V MX457-4 toc ON-RESISTNE (Ω) ON-RESISTNE vs. V OM ND TEMPERTURE T = +7 T = +85 T = V OM (V) MX457-4 toc2 URRENT (n)... LEGE URRENT vs. TEMPERTURE OM_ OFF TEMPERTURE ( ) NO OFF NO ON MX457-4 toc SUPPLY URRENT vs. TEMPERTURE MX457-4 toc4 3 2 HRGE INJETION vs. V OM MX457-4 toc5 6 5 ON/OFF TIME vs. TEMPERTURE (HRD MODE) MX457-4 toc6 URRENT (µ) Q (p) - TIME () t ON, V+ = 3V t ON, V+ = 5V t OFF, V+ = 3V TEMPERTURE ( ) V OM (V) t OFF, V+ = 5V TEMPERTURE ( ) 6

7 (V+ = 5V,, unless otherwise noted.) THD + N (%). TOTL HRMONI DISTORTION + NOISE vs. FREQUENY 6Ω IN ND OUT SIGNL = V RMS.,, FREQUENY (Hz) MX457-4 toc7 LOSS (db) Typical Operating haracteristics (continued) UDIO FREQUENY RESPONSE 6Ω IN ND OUT ROSSTL OFF-ISOLTION -2 FREQUENY (Hz) MX457-4 toc8,, LOSS (db) VIDEO FREQUENY RESPONSE INSERTION-LOSS OFF-ISOLTION. FREQUENY (MHz) ROSSTL 5Ω IN ND OUT MX457-4 toc9 ON/OFF TIMES (SOFT MODE) ON/OFF TIMES (HRD MODE) S 5V/div MX457-4 toc S 5V/div MX457-4 toc3 V/div t ON V/div t ON V/div t OFF V/div t OFF TIME (2ms/div) TIME (5/div) SOFT MODE RISE TIME SOFT MODE FLL TIME MPLITUDE (5mV/div) MPLITUDE (5mV/div) MX457-4 toc MX457-4 toc2 TIME (5µs/div) TIME (5µs/div) 7

8 MX457, 3, 5, 7, 9,, 3, 22, 2, 8, 6 PIN MX4572 NME MX457 MX4572 NO NO Normally Open Terminals, 4, 7, NO NO4 Normally Open Terminals 3, 6, 9, 2 NOB NO4B Normally Open Terminals 3, 6 NO5, NO8 Normally Open Terminals NO6, NO7, 22, 9, 2, 7 Normally Open Terminals NO6B, NO7B 2, 4, 6, 8,, 2, 4, 2, 9, 7, 5 2, 5, 8,, 4, 2, 8, 5 OM OM OM OM8 ommon Terminals FUNTION Pin Descriptio GND GND Ground of 2-Wire Serial Interface ddress Field of 2-Wire Serial Interface ddress Field SL SL lock Input of 2-Wire Serial Interface SD SD Data Input of 2-Wire Serial Interface V+ V+ Positive Supply Voltage MX4573, 3, 5, 7, 9,, 3, 22, 2, 8, 6 2, 4, 6, 8,, 2, 4, 2, 9, 7, 5 PIN MX4574 NO NO Normally Open Terminals, 4, 7, NO NO4 Normally Open Terminals 3, 6, 9, 2 NOB NO4B Normally Open Terminals 3, 6 NO5, NO8 Normally Open Terminals 2, 5, 8,, 4, 2, 8, 5 NME MX4573 MX4574 NO6, NO7, 22, 9, 2, 7 Normally Open Terminals NO6B, NO7B OM OM OM OM8 ommon Terminals FUNTION GND GND Ground S S hip Select of 3-Wire Serial Interface SL SL lock Input of 3-Wire Serial Interface DIN DIN lock Input of 3-Wire Serial Interface DOUT DOUT Data Output of 3-Wire Serial Interface V+ V+ Positive Supply Voltage 8

9 NLYZER R L SIGNL GENERTOR dbm nf NO V+ OM_ V+ GND DEODER/ ONTROLLER MX457 MX4572 MX4573 MX4574 2/3 NLYZER SIGNL GENERTOR dbm a) Off-Isolation b) rosstalk R L nf NO2 V+ V+ OM GND DEODER/ ONTROLLER NO OM2 MX457 MX4572 MX4573 MX4574 2/3 N.. 5Ω Figure. Off-Isolation and rosstalk MX457 MX4572 MX4573 MX4574 V+ 2-Wire 3V SL V OUT 5% NOWLEDGE BIT t r < 2 t f < 2 t ON.9 V OUT NO NO V+ OM_ V OUT V OUT t OFF. V OUT µp 2 OR 3 DEODER/ ONTROLLER SERIL INTERFE R L 3Ω L 35pF S 3V 5% GND 3-Wire V OUT t ON.9 V OUT L INLUDES FIXTURE ND STRY PITNE V OUT = V OM [R L / (R L + R ON )] V OUT t OFF. V OUT Figure 2. Switching Time 9

10 Detailed Description The are serial-interface controlled switches with soft-mode clickless and hard-mode operating capability. The MX457/MX4573 contain SPST switches, while the MX4572/MX4574 contain two SPST switches and six SPDT switches. The SPDT switches are actually 2-to- multiplexers, in that each SPDT is really two independent SPST switches with a common node, as shown in the Pin onfiguratio. Each switch is controlled independently by either the SPI or I 2 interface. udio off-isolation is -9dB at 2kHz, crosstalk is at least -9dB at 2kHz, and video off-isolation is at least -5dB at MHz. Each switch of any device may be set to operate in either soft or hard mode. In soft mode, the switching traition is slowed to avoid the audible clicking that can occur when switches are used to route audio signals. In hard mode, the switches are not slowed down, making this mode useful when a faster respoe is required. If a new command is issued while any softmode switch is traitioning, the switch traition time is decreased so it reaches its final state before the new command is executed. Soft mode is the power-up default state for all switches. Switches in the same mode are guaranteed to be break-before-make relative to each other. Break-before-make does not apply between switches operating in different modes. These devices operate from a single supply of +2.7V to +5.25V. The MX457/MX4572 feature a 2-wire, I 2 - compatible serial interface, and the MX4573/ MX4574 feature a 3-wire, SPI/QSPI/MIROWIRE-compatible serial interface. pplicatio Information Switch ontrol The have a common command and control-bit structure, the differences being only in the interface type (2-wire or 3-wire) and in the switch configuratio. The ITHSET command controls the open/closed states of the various switches. MODESET controls soft/hard-mode states of the switches. There are also NO_OP and RESET commands. The NO_OP command is useful for daisy-chaining multiple 3-wire parts. The RESET command places a device in a state identical to its power-up state, with all switches open and in soft switching mode. Table shows the configuration of the command bits and their related commands. Table 2 shows the configuration of the data bits and their related switches. The arrangement of the command bits and the data bits depends on the interface type (2-wire or 3-wire). fter a ITHSET command is issued, a logic in any databit location closes the associated switch, while a logic ope it. fter a MODESET command, a logic in any data-bit location sets the associated switch into hard mode, while a logic sets it into soft mode. 2-Wire Serial Interface The MX457/MX4572 use a 2-wire, I 2 -compatible serial interface requiring only two I/O lines of a standard microprocessor port for communication. These devices use the SendByte and WriteWord protocols. The SendByte protocol is used only for the RESET command. The WriteWord protocol is used for the MODESET and ITHSET commands. The first byte of any 2-wire serial-interface traaction is always the address byte. To address a given chip, the and bits in the address byte (Table 3) must duplicate the values present at the and pi of that chip, and the rest of the address bits must be configured as shown in Table 3. onnect the and pi to V+ or to GND, or drive them with MOS logic levels. The second byte is the command byte. The possible commands are RESET, MODESET, and ITHSET. RESET sets all switches to the initial power-up state (open and in soft switching mode). The RESET command is executed on the rising clock edge of the acknowledge bit after the command byte. The MODE- SET and ITHSET commands are each followed by two data bytes. The first data byte is buffered so all the data latches switch together. MODESET and ITH- SET are executed on the rising clock edge of the acknowledge bit after the second data byte. Table 3 details the 2-wire interface data structure. Figures 3 and 4 and the I/O Interface haracteristics detail the timing of the 2-wire serial-interface protocol. ll bytes of the tramission, whether address, command, or data, are sent first. The MX457/MX4572 are receive-only devices and must be controlled by a bus master device. bus master signals the beginning of a tramission with a start condition by traitioning SD from high to low while SL is high. The slave devices monitor the serial bus continuously, waiting for a start condition followed by an address byte. When a device recognizes its address byte, it acknowledges by pulling the SD line low for one clock period; it is then ready to accept command and data bytes. The device then issues a similar acknowledgment after the command byte, and again after each data byte. When the master has finished SendByte and WriteWord are trademarks of Philips orp.

11 Table. ommand Bit Mapping - OMMND DESRIPTION Table 2. Data-Bit Switch ontrol X = Don t care RESET Sets all switches open and in soft switching mode. MODESET Sets specified switches to soft or hard mode. NO_OP No Operation. ITHSET Sets specified switches open or closed. DT BIT ITH MX457/MX4573 ITH TERMINLS ITH D3 X X 8 D2 X X 5 D X X 7B D 5, 6 7 D8 9 9, 2 6 D7 8 2, 22 4B D6 7 3, 4 4 D5 6, 2 3B D4 5 9, 3 D3 4 7, 8 2B D2 3 5, 6 2 D 2 3, 4 B D (), 2 MX4572/MX4574 ITH TERMINLS 5, 6 3, 4 7, 8 8, 9 D9 7, 8 6B 2, 2 2, 22, 2, 8, 9 7, 8 5, 6 4, 5 2, 3, 2 communicating with the slave, it issues a stop condition by traitioning SD from low to high while SL is high. The bus is then free for another tramission. 3-Wire Serial Interface The MX4573/MX4574 use a 3-wire SPI/QSPI/ MIROWIRE-compatible serial interface. n active-low chip-select pin, S, enables the device to receive data from the serial input pin, DIN. ommand and data information are clocked in on the rising edge of the serialclock signal (SL) first. total of 6 bits are needed in each write cycle. The write cycle allows two 8-bit-wide trafers if S remai low for the entire 6 bits. The command code is contained in the two s of the 6-bit word. The remaining bits control the switches as shown in Table 4. While shifting in the serial data, the device remai in its original configuration. rising edge on S latches the data into the MX4573/MX4574 internal registers, initiating the device s change of state. Table 4 shows the details of the 3-wire interface data structure. Figures 5 and 6 and the I/O Interface haracteristics show the timing details of the 3-wire interface. If the two command bits initiate a ITHSET command, a logic in a switch control location closes the associated switch, while a logic ope it. If the command bits initiate a MODESET command, a logic in a switch control location sets the associated switch into hard mode, while a logic sets it into soft, clickless mode. For command-bit configuratio, see Table. Using Multiple Devices There are two ways to connect multiple devices to the same 3-wire serial interface. The first involves using the DOUT pin. DOUT presents a copy of the last bit of the internal shift register, useful for daisy-chaining multiple devices. Data at DOUT are simply the input data delayed by 6 clock cycles, appearing synchronous with SL s falling edge. fter S goes high, DOUT holds the last bit in the shift register until new data are shifted into DIN. For a simple interface using several MX4573/MX4574 devices, daisy-chain the shift reg-

12 Table 3. 2-Wire Serial-Interface Data Format RESET ommand ddress Byte ommand Byte (RESET) S R T ITHSET ommand ddress Byte S R T MX457 First Data Byte X X X X X X ommand Byte (ITHSET) X X X X X X Second Data Byte X X X X X S T P S T P MX4572 First Data Byte Second Data Byte X X S 8 5 7B 7 6B 6 4B 4 3B 3 2B 2 B T P MODESET ommand ddress Byte ommand Byte (MODESET) S X X X X X X R T MX457 First Data Byte Second Data Byte X X X X X S T P MX4572 First Data Byte Second Data Byte X X S 8 5 7B 7 6B 6 4B 4 3B 3 2B 2 B T P X = Don't are SRT = Start ondition = cknowledge ondition STP = Stop ondition Logic "" in any data bit location places the associated switch open or in soft (clickless) switching mode. Logic "" in any data bit location places the associated switch closed or in hard switching mode. For command bit configuration see Table. 2

13 Table 4. 3-Wire Serial-Interface Data Format OMMND D5 D4 D3 X OMMND D5 D4 D3 8 D2 X D X D D2 D D 5 7B 7 MX4573 ( SPST) ITH ONTROL D9 D8 9 D7 D6 D MX4574 (6 SPDT + 2 SPST) ITH ONTROL D9 D8 6B 6 D7 D6 4B 4 D5 3B D4 5 D4 3 D3 4 D3 2B D2 3 D2 2 D 2 D B D D SD 2% 7% 7% 2% 7% 2% 7% 2% 7% 2% t LOW t BUF t SU, DT t SU, ST t HD, ST t HD, DT t SU, STO SL t HD, ST 7% 2% 7% 7% 2% 2% t HIGH 7% 7% 7% t R t F STRT ONDITION REPETED STRT ONDITION STOP ONDITION STRT ONDITION Figure 3. 2-Wire Serial-Interface Timing Diagram DDRESS BYTE OMMND BYTE FIRST DT BYTE SEOND DT BYTE SD SL STRT ONDITION STOP ONDITION Figure 4. omplete 2-Wire Serial-Interface Tramission 3

14 isters by connecting DOUT of the first device to DIN of the second, etc. onnect the S pi of all devices together. Data are shifted through the MX4573/ MX4574s in series. When S is brought high, all devices are updated simultaneously. If any of the devices in the chain are to be left unchanged, use a NO_OP command for that device, as shown in Table. S 2% SL t SS t L t H t DS n alternate way of connecting multiple devices is to decode the S line. In this case the DOUT pin is not used and the DIN pi of all devices are connected together. ddress decode logic individually controls the S line of each device. When a device is to be selected its S line is brought low, data are shifted in, and its S is then brought high to execute the command. 2% 2% 2% 2% 7% 7% 2% 7% t DH 2% t SH t 7% t SO DIN D5 D4 D D t DO DOUT Figure 5. 3-Wire Serial-Interface Timing Diagram S SL OMMND EXEUTED DIN D5 D4 D3... D2 D D... DOUT Q5... FROM PREVIOUS WRITE... FROM PREVIOUS WRITE Figure 6. omplete 3-Wire Serial-Interface Tramission 4

15 Pin onfiguratio (continued) TOP VIEW MX4572/MX4574 NO OM NOB NO2 OM2 NO2B NO3 OM3 NO3B NO4 OM V+ SD (DOUT) SL (DIN) (SL) (S) GND NO6 OM6 NO6B NO7 OM7 hip Information TRNSISTOR OUNT: 5397 NO4B 2 7 NO7B NO5 3 6 NO8 OM5 4 5 OM8 ( ) RE FOR MX4574 QSOP/SSOP/SO Package Information QSOP.EPS 5

16 Package Information (continued) SOIW.EPS SSOP.EPS Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 6 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, Maxim Integrated Products Printed US is a registered trademark of Maxim Integrated Products.