Dual, 256-Tap, Nonvolatile, SPI-Interface, Linear-Taper Digital Potentiometers MAX5487/MAX5488/ MAX5489. Benefits and Features

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1 EVALUATION KIT AVAILABLE MAX5487/MAX5488/ General Description The MAX5487/MAX5488/ dual, linear-taper, digital potentiometers function as mechanical potentiometers with a simple 3-wire SPI -compatible digital interface that programs the wipers to any one of 256 tap positions. These digital potentiometers feature a nonvolatile memory (EEPROM) to return the wipers to their previously stored positions upon power-up. The MAX5487 has an end-to-end resistance of kω, while the MAX5488 and have resistances of 5kΩ and kω, respectively. These devices have a low 35ppm/ C end-to-end temperature coefficient, and operate from a single +2.7V to +5.25V supply. The MAX5487/MAX5488/ are available in 6-pin 3mm x 3mm x.8mm TQFN or 4-pin TSSOP packages. Each device is guaranteed over the extended -4 C to +85 C temperature range. Applications LCD Screen Adjustment Audio Volume Control Mechanical Potentiometer Replacement Low-Drift Programmable Filters Low-Drift Programmable-Gain Amplifiers Functional Diagram Benefits and Features Wiper Position Stored in Nonvolatile Memory (EEPROM) and Recalled Upon Power-Up or Recalled by an Interface Command 3mm x 3mm x.8mm, 6-Pin TQFN or 4-Pin TSSOP Packages ± LSB INL, ±.5 LSB DNL (Voltage-Divider Mode) 256 Tap Positions 35ppm/ C End-to-End Resistance Temperature Coefficient 5ppm/ C Ratiometric Temperature Coefficient kω, 5kΩ, and kω End-to-End Resistance Values SPI-Compatible Serial Interface Reliability 2, Wiper Store Cycles 5-Year Wiper Data Retention +2.7V to +5.25V Single-Supply Operation SPI is a trademark of Motorola, Inc. V DD HA GND 8-BIT LATCH 8 DECODER 256 WA SCLK DIN SPI INTERFACE 6-BIT NV RAM POR LA HB 8-BIT LATCH 8 DECODER 256 WB MAX5487 MAX5488 LB ; Rev 4; 4/

2 Absolute Maximum Ratings V DD to GND...-.3V to +6.V All Other Pins to GND...-.3V to the lower of (V DD +.3V) and +6.V Maximum Continuous Current into H_, W_, and L_ MAX ±5.mA MAX ±.3mA...±.6mA Continuous Power Dissipation (T A = +7 C) 6-Pin TQFN (derate 7.5mW/ C above +7 C)...398mW 4-Pin TSSOP (derate 9.mW/ C above +7 C)...727mW Operating Temperature Range C to +85 C Junction Temperature...+5 C Storage Temperature Range C to +5 C Lead Temperature (soldering, s)...+3 C Soldering Temperature (reflow) C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (V DD = +2.7V to +5.25V, V H = V DD, V L = GND, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C, unless otherwise noted.) (Note ) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Voltage-Divider Mode, Figure ) Resolution N 256 Taps Integral Nonlinearity INL (Note 2) ± LSB Differential Nonlinearity DNL (Note 2) ±.5 LSB Dual-Code Matching Register A = register B 2 LSB End-to-End Resistor Tempco TC R 35 ppm/ C Ratiometric Resistor Tempco 5 ppm/ C Full-Scale Error Zero-Scale Error DC PERFORMANCE (Variable-Resistor Mode, Figure ) MAX MAX MAX MAX Resolution 256 Taps Integral Nonlinearity (Note 3) Differential Nonlinearity (Note 3) DC PERFORMANCE (Resistor Characteristics) V DD = 5.V ±.5 V DD = 3.V ±3 V DD = 5.V ± V DD = 3.V ± V DD = 5.V 2 35 Wiper Resistance (Note 4) R W V DD = 3.V Wiper Capacitance C W 5 pf End-to-End Resistance R HL MAX MAX LSB LSB LSB LSB W kw Maxim Integrated 2

3 DC Electrical Characteristics (continued) (V DD = +2.7V to +5.25V, V H = V DD, V L = GND, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C, unless otherwise noted.) (Note ) DIGITAL INPUTS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input High Voltage (Note 5) V IH V DD = 3.6V to 5.25V 2.4 V DD = 2.7V to 3.6V Input Low Voltage V IL V DD = 2.7V to 5.25V (Note 5).8 V Input Leakage Current I IN ±. µa Input Capacitance C IN 5. pf AC PERFORMANCE Crosstalk -3dB Bandwidth Total Harmonic Distortion TIMING CHARACTERISTI (Analog) BW THD f H_ = khz, L_ = GND, measurement at W_ (Note 6) Wiper at midscale C W_ = pf Wiper-Settling Time t S Code to 27 (Note 7) TIMING CHARACTERISTI (Digital, Figure 2, Note 8) V H_ = V RMS at khz, L_ = GND, measurement at W_.7 x V DD MAX MAX MAX MAX V -9 db khz.2 % SCLK Frequency 5 MHz SCLK Clock Period t CP 2 ns SCLK Pulse-Width High t CH 8 ns SCLK Pulse-Width Low t CL 8 ns Fall to SCLK Rise Setup t S 8 ns SCLK Rise to Rise Hold t H ns DIN to SCLK Setup t DS 5 ns DIN Hold after SCLK t DH ns SCLK Rise to Fall Delay t 2 ns Rise to SCLK Rise Hold t 8 ns Pulse-Width High t W 2 ns Write NV Register Busy Time t BUSY 2 ms Read NV Register Access Time t ACC µs Write Wiper Register to Output Delay t WO µs NONVOLATILE MEMORY RELIABILITY Data Retention T A = +85 C 5 Years Endurance T A = +25 C 2, Stores T A = +85 C 5, µs Maxim Integrated 3

4 DC Electrical Characteristics (continued) (V DD = +2.7V to +5.25V, V H = V DD, V L = GND, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C, unless otherwise noted.) (Note ) POWER SUPPLIES PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Power-Supply Voltage V DD V Supply Current I DD During write cycle only, digital inputs = V DD or GND 4 µa Standby Current Digital inputs = V DD or GND, T A = +25 C.5 µa Note : All devices are production tested at TA = +85 C and are guaranteed by design and characterization for -4 C < TA < +85 C. Note 2: DNL and INL are measured with the potentiometer configured as a voltage-divider with H_ = VDD and L_ =. The wiper terminal is unloaded and measured with an ideal voltmeter. Note 3: DNL and INL are measured with the potentiometer configured as a variable resistor. H_ is unconnected and L_ =. For VDD = +5V, the wiper terminal is driven with a source current of 4µA for the kω configuration, 8µA for the 5kΩ configuration, and 4µA for the kω configuration. For VDD = +3V, the wiper terminal is driven with a source current of 2µA for the kω configuration, 4µA for the 5kΩ configuration, and 2µA for the kω configuration. Note 4: The wiper resistance is the worst value measured by injecting the currents given in Note 3 into W_ with L_ = GND. RW = (VW - VH) / IW. Note 5: The device draws higher supply current when the digital inputs are driven with voltages between (VDD -.5V) and (GND +.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics section. Note 6: Wiper at midscale with a pf load. Note 7: Wiper-settling time is the worst-case -to-5% rise time, measured between tap and tap 27. H_ = VDD, L_ = GND, and the wiper terminal is unloaded and measured with a pf oscilloscope probe (see Tap-to-Tap Switching Transient in the Typical Operating Characteristics section). Note 8: Digital timing is guaranteed by design and characterization, and is not production tested. Maxim Integrated 4

5 Typical Operating Characteristics (V DD = +5.V, TA = +25 C, unless otherwise noted.) SUPPLY CURRENT (A) V DD = 5V V DD = 3V SUPPLY CURRENT vs. TEMPERATURE MAX toc SUPPLY CURRENT (µa), SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE V CC = 3V V CC = 5V MAX toc2 WIPER RESISTANCE () WIPER RESISTANCE vs. MAX toc TEMPERATURE ( C) DIGITAL INPUT VOLTAGE (V) TAP-TO-TAP SWITCHING TRANSIENT (MAX5487) MAX toc4 TAP-TO-TAP SWITCHING TRANSIENT (MAX5488) MAX toc5 TAP-TO-TAP SWITCHING TRANSIENT () MAX toc6 V H_ = 5.V 2.V/div 2.V/div V H_ = 5.V 2.V/div V H_ = 5.V WIPER 2mV/div WIPER 2mV/div WIPER 2mV/div µs/div.µs/div.µs/div WIPER TRANSIENT AT POWER-ON V H_ = V DD MAX toc7-2 MIDSCALE FREQUENCY RESPONSE (MAX5487) MAX toc8 V DD 2.V/div WIPER 2.V/div GAIN (db) C W = pf C W_ = 5pF -8 2.µs/div -2. FREQUENCY (khz) Maxim Integrated 5

6 Typical Operating Characteristics (continued) (V DD = +5.V, TA = +25 C, unless otherwise noted.) GAIN (db) MIDSCALE FREQUENCY RESPONSE (MAX5488) C W_ = 5pF C W_ = pf MAX toc9 GAIN (db) MIDSCALE FREQUENCY RESPONSE () C W_ = 5pF C W_ = pf MAX toc DNL (LSB) VARIABLE-RESISTOR DNL vs. (MAX5488) MAx toc -5. FREQUENCY (khz) -5. FREQUENCY (khz) INL (LSB) VARIABLE-RESISTOR INL vs. (MAX5488) MAx toc2 DNL (LSB) VOLTAGE-DIVIDER DNL vs. (MAX5487) MAX toc3 INL (LSB) VOLTAGE-DIVIDER INL vs. (MAX5487) MAX toc DNL (LSB) VOLTAGE-DIVIDER DNL vs. (MAX5488) MAx toc5 INL (LSB) VOLTAGE-DIVIDER INL vs. (MAX5488) MAx toc Maxim Integrated 6

7 Typical Operating Characteristics (continued) (V DD = +5.V, TA = +25 C, unless otherwise noted.) DNL (LSB) VARIABLE-RESISTOR DNL vs. () MAx toc7 INL (LSB) VARIABLE-RESISTOR INL vs. () MAx toc8 DNL (LSB) VOLTAGE-DIVIDER DNL vs. () MAx toc INL (LSB) VOLTAGE-DIVIDER INL vs. () MAx toc2 CROSSTALK (db) C W_ = pf CROSSTALK vs. FREQUENCY MAX5488 MAX5487 MAX toc2 RESISTANCE CHANGE (%) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE (MAX5487) MAX toc FREQUENCY (khz) TEMPERATURE ( C) RESISTANCE CHANGE (%) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE (MAX5488) MAX toc23 RESISTANCE CHANGE (%) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE () MAX toc TEMPERATURE ( C) TEMPERATURE ( C) Maxim Integrated 7

8 Pin Configurations TOP VIEW LA WA HA I.C HB + VDD SCLK WB LB 3 DIN N.C. 2 9 MAX5487 MAX TQFN 3mm x 3mm *EP I.C. GND N.C. N.C. TOP VIEW HA WA LA HB WB LB N.C MAX5487 MAX5488 TSSOP V DD SCLK DIN N.C. N.C. GND *EXPOSED PAD. Pin Description PIN NAME FUNCTION TQFN TSSOP 4 V DD Power Supply. Bypass V DD to GND with a.µf capacitor as close to the device as possible. 2 3 SCLK Serial-Interface Clock Input 3 2 DIN Serial-Interface Data Input 4 Active-Low Chip-Select Digital Input 5, 6, 9 7, 9, N.C. No Connection. Not internally connected. 7 8 GND Ground 8, 6 I.C. Internally connected to EP. Leave unconnected. 6 LB Low Terminal of Resistor B. The voltage at L can be greater than or less than the voltage at H. Current can flow into or out of L. 5 WB Wiper Terminal of Resistor B 2 4 HB 3 3 LA High Terminal of Resistor B. The voltage at H can be greater than or less than the voltage at L. Current can flow into or out of H. Low Terminal of Resistor A. The voltage at L can be greater than or less than the voltage at H. Current can flow into or out of L. 4 2 WA Wiper Terminal of Resistor A 5 HA High Terminal of Resistor A. The voltage at H can be greater than or less than the voltage at L. Current can flow into or out of H. EP Exposed Pad (TQFN only). Internally connected to pins 8 and 6. Leave unconnected. Maxim Integrated 8

9 Detailed Description The MAX5487/MAX5488/ contain two resistor arrays, with 255 resistive elements each. The MAX5487 has an end-to-end resistance of kω, while the MAX5488 and have resistances of 5kΩ and kω, respectively. These devices allow access to the high, low, and wiper terminals on both potentiometers for a standard voltage-divider configuration. Connect the wiper to the high terminal, and connect the low terminal to ground, to make the device a variable resistor (see Figure ). A simple 3-wire serial interface programs either wiper directly to any of the 256 tap points. The nonvolatile memory stores the wiper position prior to power-down and recalls the wiper to the same point upon power-up or by using an interface command (see Table ). The nonvolatile memory is guaranteed for 2, wiper store cycles and 5 years for wiper data retention. SPI Digital Interface These devices use a 3-wire SPI-compatible serial data interface (Figure 2 and Figure 3). This write-only interface contains three inputs: chip-select (), data clock (SCLK), and data in (DIN). Drive low to enable the serial interface and clock data synchronously into the shift register on each SCLK rising edge. The WRITE commands (C, C = or ) require 6 clock cycles to clock in the command, address, and data (Figure 3a). The COPY commands (C, C =, ) can use either eight clock cycles to transfer only command and address bits (Figure 3b) or 6 clock cycles, with the device disregarding 8 data bits (Figure 3a). After loading data into the shift register, drive high to latch the data into the appropriate potentiometer control register and disable the serial interface. Keep low during the entire serial data stream to avoid corruption of the data. Digital-Interface Format The data format consists of three elements: command bits, address bits, and data bits (see Table and Figure 3). The command bits (C and C) indicate the action to be taken such as changing or storing the wiper position. The address bits (A and A) specify which potentiometer the command affects and the 8 data bits (D7 to D) specify the wiper position. VOLTAGE-DIVIDER CONFIGURATION H VARIABLE-RESISTOR CONFIGURATION H W Table. Register Map CLOCK EDGE C C A A D7 D6 D5 D4 D3 D2 D D Write Wiper Register A D7 D6 D5 D4 D3 D2 D D Write Wiper Register B D7 D6 D5 D4 D3 D2 D D Write NV Register A D7 D6 D5 D4 D3 D2 D D Write NV Register B D7 D6 D5 D4 D3 D2 D D Copy Wiper Register A to NV Register A Copy Wiper Register B to NV Register B Copy Both Wiper Registers to NV Registers Copy NV Register A to Wiper Register A Copy NV Register B to Wiper Register B Copy Both NV Registers to Wiper Registers Figure. Voltage-Divider/Variable-Resistor Configurations L L Maxim Integrated 9

10 t O t S t CL t CH t CP t H t W t SCLK t DS t DH DIN Figure 2. Timing Diagram Write-Wiper Register (Command ) Data written to the write-wiper registers (C, C = ) controls the wiper positions. The 8 data bits (D7 to D) indicate the position of the wiper. For example, if DIN =, the wiper moves to the position closest to L_. If DIN =, the wiper moves closest to H_. This command writes data to the volatile RAM, leaving the NV registers unchanged. When the device powers up, the data stored in the NV registers transfers to the volatile wiper register, moving the wiper to the stored position. Write-NV Register (Command ) This command (C, C = ) stores the position of the wipers to the NV registers for use at power-up. Alternatively, the copy wiper register to NV register command can be used to store the position of the wipers to the NV registers. Writing to the NV registers does not affect the position of the wipers. Copy Wiper Register to NV Register (Command ) This command (C, C = ) stores the current position of the wiper to the NV register, for use at power-up. This command may affect one potentiometer at a time, A) 6-BIT COMMAND/DATA WORD SCLK DIN C C A A D7 D6 D5 D4 D3 D2 D D B) 8-BIT COMMAND WORD SCLK DIN C C A A Figure 3. Digital-Interface Format Maxim Integrated

11 or both simultaneously, depending on the state of A and A. Alternatively, the write NV register command can be used to store the current position of the wiper to the NV register. Copy NV Register to Wiper Register (Command ) This command (C, C = ) restores the wiper position to the previously stored position in the NV register. This command may affect one potentiometer at a time, or both simultaneously, depending on the state of A and A. Nonvolatile Memory The internal EEPROM consists of a nonvolatile register that retains the last stored value prior to power-down. The nonvolatile register is programmed to midscale at the factory. The nonvolatile memory is guaranteed for 2, wiper write cycles and 5 years for wiper data retention. Power-Up Upon power-up, these devices load the data stored in the nonvolatile wiper register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile wiper register. This initialization period takes 5µs. MAX5487 MAX5488 5V H_ L_ W_ 3V MAX48 V OUT Standby The MAX5487/MAX5488/ feature a lowpower standby mode. When the device is not being programmed, it enters into standby mode and supply current drops to.5µa (typ). Applications Information The MAX5487/MAX5488/ are ideal for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the display contrast), or for programmable filters with adjustable gain and/or cutoff frequency. Positive LCD Bias Control Figure 4 and Figure 5 show an application where the devices provide an adjustable, positive LCD-bias voltage. The op amp provides buffering and gain to the resistordivider network made by the potentiometer (Figure 4) or by a fixed resistor and a variable resistor (Figure 5). Programmable Filter Figure 6 shows the MAX5487/MAX5488/ in a st-order programmable-filter application. Adjust the gain of the filter with R 2, and set the cutoff frequency with R 3. Use the following equations to calculate the gain (A) and the -3dB cutoff frequenc y (f C ) V IN HA R 3 WA LA C V+ MAX4 V OUT /2 MAX5487 /2 MAX5488 /2 V- R Figure 4. Positive LCD-Bias Control Using a Voltage-Divider 5V 3V R 2, R 3 = R HL x D / 256 WHERE R HL = END-TO-END RESISTANCE AND D = DECIMAL VALUE OF WIPER CODE /2 MAX5487 /2 MAX5488 /2 R 2 HB LB WB MAX5487 MAX5488 H_ W_ MAX48 V OUT Figure 6. Programmable Filter L_ Figure 5. Positive LCD-Bias Control Using a Variable Resistor Maxim Integrated

12 5V IN OUT MAX66 ADJ GND WA HA R LA V OUT /2 MAX5487 /2 MAX5488 /2 IN OUT MAX66 ADJ GND WB HB R LB V OUT2 /2 MAX5487 /2 MAX5488 /2 V OUT_ =.23V x kω R V OUT_ =.23V x 5kΩ R V OUT_ =.23V x kω R FOR THE MAX5487 FOR THE MAX5488 FOR THE R 2 = R HL x D / 256 WHERE R HL = END-TO-END RESISTANCE AND D = DECIMAL VALUE OF WIPER CODE Figure 7. Adjustable Voltage Reference R A= + R 2 5V /2 MAX5487/MAX5488/ WA f C = 2 π R3 C Adjustable Voltage Reference Figure 7 shows the devices used as the feedback resistors in multiple adjustable voltage-reference applications. Independently adjust the output voltages of the MAX66s from.23v to V IN -.2V by changing the wiper positions of the MAX5487/MAX5488/. Offset Voltage and Gain Adjustment Connect the high and low terminals of one potentiometer of a MAX5487/MAX5488/ to the NULL inputs of a MAX4, and connect the wiper to the op amp s positive supply to nullify the offset voltage over the operating temperature range. Install the other potentiometer in the feedback path to adjust the gain of the MAX4 (see Figure 8). R2 HB LB MAX4 WB HA Figure 8. Offset Voltage and Gain Adjustment 8 R 6 LA R 2 = R HL x D / 256 WHERE R HL = END-TO-END RESISTANCE AND = D DECIMAL VALUE OF WIPER CODE /2 MAX5487/MAX5488/ Maxim Integrated 2

13 Ordering Information PART TEMP RANGE PIN-PACKAGE *EP = Exposed pad. +Denotes a lead(pb)-free/rohs-compliant package. /V denotes an automotive qualified part. END-TO-END RESISTANCE (kw) TOP MARK MAX5487ETE+ -4 C to +85 C 6 TQFN-EP* ABR MAX5487EUD+ -4 C to +85 C 4 TSSOP MAX5488ETE+ -4 C to +85 C 6 TQFN-EP* 5 ABS MAX5488EUD+ -4 C to +85 C 4 TSSOP 5 ETE+ -4 C to +85 C 6 TQFN-EP* ABT EUD+ -4 C to +85 C 4 TSSOP ETE/V+ -4 C to +85 C 6 TQFN-EP* AIE Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Chip Information PROCESS: BiCMOS PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 6 TQFN-EP T633F TSSOP U Maxim Integrated 3

14 Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 3 /7, 8, 2, 5 4 4/ Updated Ordering Information (added lead-free packaging and automotive qualified part, released TSSOP package), and updated Absolute Maximum Ratings, 2, 2 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim Integrated s website at Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 2 Maxim Integrated Products, Inc. 4