MJ16018 MJW kv SWITCHMODE Series SEMICONDUCTOR TECHNICAL DATA POWER TRANSISTORS 10 AMPERES 800 VOLTS 125 AND 175 WATTS
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1 SEMIONDUTOR TEHNIL DT Order this document by MJ68/D. kv SWITHMODE Series These transistors are designed for high voltage, high speed, power switching in inductive circuits where fall time is critical. They are particularly suited for line operated switchmode applications. Typical pplications: Features: Switching Regulators ollector Emitter Voltage VEV = Inverters Fast Turn Off Times Solenoids 8 ns Inductive Fall Time (Typ) Relay Drivers ns Inductive rossover Time (Typ) Motor ontrols. µs Inductive Storage Time (Typ) Deflection ircuits Performance Specified for: Reverse Biased SO with Inductive Load Switching Times with Inductive Loads Saturation Voltages Leakage urrents Î MXIMUM RTINGS ÎÎÎ Rating Symbol MJ68 MJW68ÎÎÎ Unit ollector Emitter Voltage VEO(sus)ÎÎ 8 ÎÎÎ ÎÎÎ ollector Emitter Voltage VEV ÎÎÎ ÎÎÎ Emitter Base Voltage VEB 6 Î ollector urrent ontinuous ÎÎÎ Peak() I ÎÎ dc IM Base urrent ontinuous IB 8 ÎÎÎ Peak() Î dc IBM Total Power Dissipation PD T = Watts T = ÎÎÎ Derate above T = W/ Operating and Storage Junction TJ, TstgÎ 6 to to ÎÎÎ Î Î Temperature Range THERML HRTERISTIS haracteristic Max ÎÎÎ SymbolÎÎ Unit Thermal Resistance, Junction to ase RθJ ÎÎ /W Lead Temperature for Soldering TL Purposes: /8 from ase for ÎÎÎ ÎÎÎ Seconds () Pulse Test: Pulse Width = µs, Duty ycle %. *Motorola Preferred Device POWER TRNSISTORS MPERES 8 VOLTS ND WTTS SE TO MJ68 SE F TO E MJW68 Designer s Data for Worst ase onditions The Designer s Data Sheet permits the design of most circuits entirely from the information presented. SO Limit curves representing boundaries on device characteristics are given to facilitate worst case design. Preferred devices are Motorola recommended choices for future use and best overall value. Designer s and SWITHMODE are trademarks of Motorola, Inc. REV
2 Î ELETRIL HRTERISTIS (T = unless otherwise noted) Î haracteristic SymbolÎ Min Typ Max Unit Î OFF HRTERISTIS() Î ollector Emitter Sustaining Voltage (Table ) (I = m, IB = ) VEO(sus) 8 ÎÎÎ Î ollector utoff urrent IEV ÎÎ mdc (VEV =, VBE(off) =. ). ÎÎÎ (VEV =, VBE(off) =., T = ). ÎÎÎ ollector utoff urrent (VE =, RBE = Ω, T = ) IER. mdc Î Emitter utoff urrent (VEB = 6, I = ) IEBO. mdc Î SEOND BREKDOWN Î Second Breakdown ollector urrent with Base Forward Biased IS/b See Figure Î lamped Inductive SO with Base Reverse Biased RBSOÎ See Figure Î ON HRTERISTIS() Î ollector Emitter Saturation Voltage Î Î (I = dc, IB = dc) (I = dc, IB = dc) VE(sat) ÎÎ ÎÎ (I = dc, IB = dc, T = ) ÎÎÎ Î. Base Emitter Saturation Voltage (I = dc, IB = dc) VBE(sat). ÎÎÎ Base Emitter Saturation Voltage (I = dc, IB = dc, T = ). D urrent Gain (I = dc, VE = ) hfe ÎÎÎ Î DYNMI HRTERISTIS Î ÎÎ Output apacitance (VB =, IE =, ftest = khz) ob pf Î SWITHING HRTERISTIS Î Inductive Load (Table ) ÎÎ Storage Time ÎÎÎ tsv 8 ÎÎÎ ns ÎÎ Fall Time Baker lamped (TJ = ) tfi 6 ÎÎÎ ÎÎ Time J rossover (I = dc, IB = dc, tc 9 ÎÎÎ ÎÎ Storage Time ÎÎÎ VBE(off) =, tsv 9 ÎÎÎ VE(pk) = ) ÎÎ Fall Time PW = µs (TJ J = ) tfi 8 ÎÎÎ rossover ÎÎ TimeÎÎÎ tc ÎÎ Resistive Load (Table ) Î Delay Time Baker lamped td 8 ns Î Rise Time (I = dc, V =, IB tr 9 ÎÎ Storage Time = dc, IB = dc, ÎÎÎ ts 9 Î RB = Ω, PW = µs, Fall Time Duty ycle ÎÎ %) () Pulse Test: PW = µs, Duty ycle %. tf hfe, D URRENT GIN T =. VE = V. T = VE, OLLETOR EMITTER VOLTGE (VOLTS). I = IB, BSE URRENT (MPS) 8 Figure. D urrent Gain Figure. ollector Saturation Region
3 TYPIL STTI HRTERISTIS VE, OLLETOR EMITTER VOLTGE (VOLTS), OLLETOR URRENT ( µ ) I I/IB =. T = Figure. ollector Emitter Saturation Region TJ = REVERSE I/IB =. T = I/IB = T = FORWRD I/IB = T = VE = V, PITNE (pf) VBE, BSE EMITTER VOLTGE (VOLTS) K K I/IB =. T = THRU... Figure. Base Emitter Saturation Region ib ob T = VBE, BSE EMITTER VOLTGE (VOLTS) K VB, OLLETOR BSE VOLTGE (VOLTS) Figure. ollector utoff Region Figure 6. Typical apacitance TYPIL INDUTIVE SWITHING HRTERISTIS t sv, STORGE TIME ( µ s)... VBE(off) = V T = I/IB =.. I/IB =. NO BKER LMP BKER LMPED t fi, FLL TIME (ns). VBE(off) = V T = NO BKER LMP BKER LMPED Figure. Storage Time Figure 8. Inductive Switching Fall Time
4 TYPIL INDUTIVE SWITHING HRTERISTIS 6 t c, ROSSOVER TIME (ns). VBE(off) = V T = I/IB =. NO BKER LMP BKER LMPED, STORGE TIME ( s) tsv µ I = IB = IB = OR VBE = V 9 PULSE WIDTH (µs) Figure 9. Inductive Switching rossover Time Figure. (tsv) Storage Time versus IB Pulse Width I B, REVERSE BSE URRENT (MPS) 6 I = IB = VE = V VOLTGE ND URRENT I IB VE 9% IB tsv I pk trv VE(pk) 9% VE(pk) 9% I(pk) tc tfi % VE(pk) % I pk tti % I 6 VBE(off), REVERSE BSE EMITTER VOLTGE (VOLTS) Figure. Reverse Base urrent versus Off Voltage TIME Figure. Inductive Switching Measurements GURNTEED SFE OPERTING RE LIMITS.... T = dc MJ68 MJW68 BONDING WIRE LIMIT THERML LIMIT SEOND BREKDOWN LIMIT ms K VE, OLLETOR EMITTER VOLTGE (VOLTS) µs I(pk), PEK OLLETOR URRENT (MPS) 6 I/IB =., 8 T 6 VBE(off) = V VBE(off) = V 6 8 K.K.K.6K.8K VE(pk), PEK OLLETOR VOLTGE (VOLTS) K Figure. Maximum Forward Bias Safe Operating rea Figure. Maximum Reverse Bias Safe Operating rea
5 POWER DERTING FTOR (%) 8 6 THERML DERTING MJ68 MJW68 SEOND BREKDOWN DERTING 8 6 T, SE TEMPERTURE ( ) Figure. Power Derating SFE OPERTING RE INFORMTION FORWRD BIS There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I VE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure is based on T = ; TJ(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to % but must be derated when T. Second breakdown limitations do not derate the same as thermal limitations. llowable current at the voltages shown on Figure may be found at any case temperature by using the appropriate curve on Figure. TJ(pk) may be calculated from the data in Figure 6. t high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. REVERSE BIS For inductive loads, high voltage and high current must be sustained simultaneously during turn off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, R snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating rea and represents the voltage current condition allowable during reverse biased turnoff. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure gives the RBSO characteristics. r(t), TRNSIENT THERML RESISTNE (NORMLIZED) D = SINGLE PULSE.. RθJ(t) = r(t) RθJ RθJ =. /W MX D URVES PPLY FOR POWER PULSE TRIN SHOWN RED t TJ(pk) T = P(pk) RθJ(t) k t, TIME (ms) P(pk) t t DUTY YLE, D = t/t Figure 6. Thermal Response
6 Table. Test onditions for Dynamic Performance VEO(sus) RBSO Inductive Switching Drive ircuit + µ F Ω Ω µ F MTP8P MTP8P R B + Ω MUR R B MTPN µ F Ω MJE µ F V off Note: djust V off to obtain desired V BE(off) at Point L = mh RB = V = Volts I(pk) = m S losed L = RB = µh V = Volts R B selected for desired I B S losed L = µh RB = when V BE(off) is specified or selected for desired IB V Volts, djusted to obtain desired I RB selected for desired IB S = Open for baker clamp condition T V T L coil (I pk ) V +V V T adjusted to obtain I (pk) MUR MUR T.U.T. L MUR8 V *I V B Vclamp E MUR *Tektronix M P6 or Equivalent S *I Scope Tektronix or Equivalent I I B I B I B I (pk) V E(pk) R B Resistive Switching For t d and tf : H.P. OR EQUIV. P.G. Ω V in V t r ns For ts and tf : Inductive Switching Drive ircuit for td and tr V = Volts RB selected for desired IB RL selected for desired I for ts and tf V = Volts RB = RB & RB selected for IB & IB R L selected for desired I MUR *I B MUR T.U.T. MUR S *Tektronix M P6 or Equivalent *I R L V Input onditions ircuit Values Test ircuit 6
7 PKGE DIMENSIONS V H E N U Q T SETING PLNE D PL K. (.) M T Q M Y M L G Y. (.) M T B Y M NOTES:. DIMENSIONING ND TOLERNING PER NSI Y.M, 98.. ONTROLLING DIMENSION: INH.. LL RULES ND NOTES SSOITED WITH REFERENED TO OUTLINE SHLL PPLY. INHES MILLIMETERS DIM MIN MX MIN MX. REF 9. REF B D E.... G. BS.9 BS H. BS.6 BS K L.66 BS 6.89 BS N.8.8 Q U.8 BS. BS V STYLE : PIN. BSE. EMITTER SE: OLLETOR SE TO (TO ) ISSUE Z Q. (.) M T B M K R P F D. (.) M Y Q S B G U L Y V J E T H NOTES:. DIMENSIONING ND TOLERNING PER NSI Y.M, 98.. ONTROLLING DIMENSION: MILLIMETER. MILLIMETERS INHES DIM MIN MX MIN MX B D.9... E F G. BS. BS H J K L P..8.. Q...8. R..8.. U. BS.9 BS V.... STYLE : PIN. BSE. OLLETOR. EMITTER. OLLETOR SE F TO E ISSUE E
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