Pulse IV and pulsed S-parameter Parametric Analysis with AMCAD PIV & AGILENT PNA-X

Transcription

1 Pulse IV and pulsed S-parameter Parametric Analysis with AMCAD PIV & AGILENT PNA-X Tony Gasseling 1

2 Components PA Design Flow Measurement system Measurement Data base Circuits Prototypes Simulation & design Equivalent models

3 Design Flow Solutions and tools for semiconductor professionals Pulsed IV/ RF meas. VNA Load-Pull meas. Component Model extraction STAN TOOL Design, Stability Analysis, Behavioral Modeling System LP system Circuit PIV-RF system Modelling tool (FET) IVCAD software platform

4 Pulsed measurements Pulsed IV measurements Pulsed S parameter measurements

5 Pulsed measurements The quiescent bias point defines the thermal state of the transistor under state. In both cases, using a low duty cycle pulse waveform, typically around 1% or less is used to minimize the energy dissipated in the device under test. Even if low duty cycle are necessary, it is also important to provide short pulses to avoid self-heating during the pulse. Quiescent bias point Temperature increase of AlGaN/GaN HEMTs (SiC substrate), with a chuck temperature of 0 C.

6 Pulsed measurements Electro-thermal measurement Chip temperature Chip temperature DC bias Not only the impulse width, but also the impulse repetition affects self-heating DC bias time time

7 Pulsed measurements Advantages of pulsed IV measurements: High power dissipated areas // safe operating conditions Thermal effects : influence of QP on Idss Trapping effects (gate lag, drain lag) Precious modelling data inputs

8 Pulsed measurements Ideal World PIV Meas. Transistor Characteristic DUT PIV Input PIV Output

9 Pulsed measurements Real World : PIV Meas. Parasitic inductance Parasitic Resistance IV Calibration Transistor Characteristic Bias T Bias T 50W DUT 50W Impedance Stabilization Network PIV Input PIV Output

10 Pulsed measurements Real World for pulsed measurements :

11 Pulsed measurements Real World for pulsed measurements : VOUT IOUT Z=0.5W Ic R L=0 C=0

12 Pulsed measurements Pulsed S parameter measurements Why? How?

13 Pulsed measurements Pulsed S parameter are used for the Extraction of linear model

14 Pulsed measurements Dynamic measurements from a quiescent bias point Starting point of the pulses is the quiescent bias point (Vgs0,Vds0) that defines the thermal and trapping state of the device Small-signal RF during the steady state of the pulses

15 Pulsed measurements Pulsed RF Measurement and pulsed IV Pulsed S2P Measurements in Forward & reverse Mode

16 Rs, Rd Idss Model extraction Compact FET model extraction flow Rd y = x Rs 0.8 y = x T C y = x T C Small-Signal IV Model Non-linear capacitances Thermal model Trapping effects Rg Lg Cpg Ls Cpd Ld Rs Rd Ri Cds τ Gm Gd Cgs Cgd Rgd Dgs=f(Vgs) Dgd=f(Vgd) Ids=f(Vgs,Vds) Cgs=f(Vgs) Cgd=f(Vgd) Dgs=f(Vgs,T) Dgd=f(Vgd,T) Ids=f(Vgs,Vds,T) Rs=f(T) Rd=f(T) Ids=f(Vgs_trap,Vds,T) Various effects are successively added

17 Model extraction Parameter extraction methodology Core device model Pulsed IV / S parameter measurement results Model Enhancement Specific measurements Model Validation Power measurements 1 st step: bias-dependant S parameters Multibias set of linear models 2 nd step: large signal fitting - diodes - g-d breakdown - thermal effects - charge carrier trapping 3 rd step: setting of additional parameters 4 th step: implementation in commercial simulator -load-pull measurements CW, pulsed 2-tones time domain 5 th step: validation and refinement Nonlinear model Enhanced Nonlinear model Final Nonlinear model

18 Pout (dbm) and Gain (db) Pout (dbm) and Gain (db) Model Validation Large-signal Model validation of a 8x75 µm GaN HEMT with load-pull measurements performed at 6 GHz for optimum PAE load impedance in class-ab Model validation of a 8x400 µm GaN HEMT with load-pull measurements performed at 3 GHz for the optimum Pout load impedance in class-b meas. model Pout PAE gain PAE (%) meas. model Pout gain PAE PAE (%) Pin dbm Pin dbm -20

19 Model Validation VNA Based load pull system is preferred for model validation Specific Architecture DC or pulse DC supplies + meas Units PA Gate T Low loss directional couplers DUT Drain T 50W Tuner f0 VNA Tuner f0, 2f0, 3f0 CW or pulse RF signal f0 or f1+f2

20 Model Validation VNA Based load pull system is preferred for model validation because of the input impedance measurement capability

21 Model Validation Power meter based system are wideband measurement system f0 2.f0 3.f0 VNA based system can be narrowband measurement system f0 f0 f0 2.f0 3.f0 2.f0 3.f0 2.f0 3.f0 More information for model validation or efficient design

22 Model Validation VNA Based load pull system is preferred for model validation Specific Architecture DC or pulse DC supplies + meas Units PA Gate T Low loss directional couplers DUT Drain T 50W Tuner f0 VNA Tuner f0, 2f0, 3f0 CW or pulse RF signal f0 or f1+f2 Phase reference

23 Model Validation Large signal impact - class AB, 25V, 10 GHz Comparison with measurements With non optimal loads : Time domain load pull measurements Deembedding in the intrinsic reference plane Parasitic extrinsic elements must be accurately extracted by previous S parameter measurements

24 Q&A Thank you AMCAD Engineering 20, rue Atlantis Limoges, France Web Site: 24