Load Pull Validation of Large Signal Cree GaN Field Effect Transistor (FET) Model

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1 APPLICATION NOTE Load Pull Validation of Large Signal Cree GaN Field Effect Transistor (FET) Model Introduction Large signal models for RF power transistors, if matched well with measured performance, are an ideal tool for reducing PA design iterations, design time and development costs. Self heating of the device and the complex dependence of the nonlinearity of component parameters on signal level, thermal effects and ambient conditions often makes it difficult to predict exactly the large signal performance of RF power devices. Cree s GaN HEMT devices on SiC substrate, because of their high efficiency, high gain and relatively easy matching characteristics are becoming popular in many applications. As such the users of these devices look to the accuracy of models to be able to evaluate Cree s devices within their simulation environments. One of the main advantages of this approach is that no hardware needs to be developed, and there is no need for time consuming and potentially inaccurate load-pull measurements. It is also possible to do more in-depth what-if analysis, which enables faster design cycles, closes links with layout and results in more first pass design successes. At Cree, there is significant historical information available to demonstrate successful use of large signal models in validating designs over drive levels, frequency, bias, and temperature for many diverse design practices for discrete, hybrid and MMIC products development. Cree s GaN HEMT Large Signal Model Application Note: APPNOTE-017 Rev. A The model is based on an equivalent-circuit approach where parameter extraction is relatively. simple. It has built in process sensitivity on individual elements. The model can be implemented easily using commercial harmonic balance simulators and the non-linearity is introduced as required by element. The Drain current source has been shown to have the dominant non-linearity. The gate current formulation includes breakdown and forward conduction and all voltage variations of parasitic capacitances are derived from charge formulations. The model was derived by using on-wafer s-parameters measurements of 0.5 mm HEMT at 25 C baseplate temperature. The major challenge of this method was the scaling from reasonable test cells to large periphery transistors. However, design after design show successful implementation for scaling factors >100:1. The non-linear model fits small-signal parameters over a range of bias voltages where all measurements are performed using 1% duty cycle, 20ms pulsed bias to control thermal effects. Copyright 2014 All rights reserved. The information in this document is subject to change without notice. Cree and the Cree logo are registered trademarks of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor

2 Load Pull Measurement Data As A Starting Point For Large Signal Design It has been an industry practice that designers depend for their large signal designs, on Load Pull measurements and as such vendors usually provide load pull data for the designers to implement the matching circuits for power transistors. As mentioned earlier if large signal models for large periphery devices can be proven to match well with Load Pull data, the need for time consuming load pull measurements can be eliminated and load pull on the simulation bench can be relied upon to give accurate information for design. In order to demonstrate the accuracy of Cree s Large Signal models this application note provides a comparison of measured versus model data for large periphery GaN HEMT transistors. This application note shows close agreement between modeled and load pull data thus eliminating the need for load pull measurements. Designers can depend on a first pass design success using Cree GaN model even for large signal designs of large periphery devices. As part of this application note, two large periphery Cree GaN transistors have been chosen and rigorous load pull measurements have been made to show agreement between these measured results and those derived from simulation of large signal performance using Cree large signal models. Modeled Vs. Measured Validation of a 100 Watt GaN HEMT, CGHV27100F A carefully designed break apart fixture which accurately measures very low impedance yet high Q (typical of large periphery transistor input and output impedances) was used to perform load pull measurements using a Maury Microwave load pull system. The metrics used for validation of the models were saturated power, gain and PAE at saturated power. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 2 APPNOTE-017 Rev. A

3 Modeled Vs. Measured Validation of CGHV27100F In Figure 1, the modeled versus measured performance of the CGHV27100F with optimized Load and Source Pull for gain and power added efficiency compared with model based simulation results is presented. The impedances for Figure 1 were set to optimize for best output power and Power Added Efficiency (PAE). In Figure 2 the impedances are optimized for output power, plotting the modeled versus measured performance of saturated output power and Power Added Efficiency (PAE) versus frequency. In this plot, the discrete data points represent individual source and load conditions. Power Gain (db) CGHV27100F Gain and PAE vs Output Power with Tuner Impedances set for best Output Power (V DD = 50 V, I DQ = 500 ma, Pulse Width = 100 µs and Duty Cycle = 10%) Output Power (dbm) Figure 1. Cree Model_Power Gain Load Pull Power Gain Cree Model PAE Load Pull PAE Power Added Efficiency (%) CGHV27100F Output Power and PAE vs Frequency with Tuner Impedances set for best Output Power (V DD = 50 V, I DQ = 500 ma, Pulse Width = 100 µs and Duty Cycle = 10%) Saturated Outp put Power ( dbm), PAE (%) PAE Model PAE Load Pull Psat_Model Psat_Load Pull Frequency (GHz) Figure 2. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 3 APPNOTE-017 Rev. A

4 Modeled Vs. Measured Validation of CGHV27100F Figures 3, 4 and 5 show the CGHV27100F load pull contours at GHz compared with model-based simulated load contours. The blue line is the measured result. The red line is the simulated / modeled result. Figure 3 shows contours for maximum output power. Figure 4 shows contours for maximum Power Added Efficiency (PAE). In Figure 5, the load pull impedances are displayed for best output power. CGHV27100F Load Pull Contours for Output Power at GHz Compared with Model-based Simulated Load Contours. Blue = Measured, Red = Modeled CGHV27100F Load Pull Contours for PAE at GHz Compared with Model-based Simulated PAE Contours. Blue = Measured, Red = Modeled. Figure 3. CGHV27100F Modeled vs Measured Optimal ZS for best Output Power. Blue = Measured, Red = Modeled. Figure 4. Figure 5. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 4 APPNOTE-017 Rev. A

5 Modeled vs Measured Validation of CGHV27100F In Figure 6, the modeled vs measured performance based on the optimal load impedance for the best output power of the CGHV27100F, sweeping frequency from 2560MHz to 2750MHz. The plot is normalized to 10 ohms. The markers at 2655MHz indicate the incredible accuracy of Cree s proprietary large signal model. CGHV27100F Modeled vs Measured Optimal ZL for Best Output Power. Blue = Measured, Red = Modeled. Z 0 = 10 Table 1 shows the results of the modeled versus measured performance of the CGHV27100F at P MAX. The difference between the predicted performance and the measured performance for saturated output power (PSAT) is less than 0.4dB, Power Added Efficiency (PAE), is less than 1.6%, and gain is less than 0.45dB. Figure 6. Measured Load Pull Data Model Prediction Z SOURCE Z LOAD Best Power Z SOURCE Z LOAD Best Power Frequency (GHz) R (Ω) jx (Ω) R (Ω) jx (Ω) P SAT (dbm) PAE (%) G a i n (db) R (Ω) jx (Ω) R (Ω) jx (Ω) P SAT (dbm) PAE (%) G a i n (db) Table 1. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 5 APPNOTE-017 Rev. A

6 Modeled vs Measured Validation of CGHV27100F Continued Parameter Load Pull Measurement Model Based Simulations Peak Output Power 51.8 dbm / 151 W 51.7 dbm / 148 W Peak Efficiency 64 % 66 % Gain at 30 dbm P OUT 21.3 db 21.0 db Gain at P SAT 16.5 db 16.4 db Table 2. Table 2 lists a summary of the modeled versus the measured results for peak power and efficiency as well as linear and saturated gain. The conditions for Table 2 are pulsed at 100 micro seconds, 10% duty cycle, at GHz. Modeled vs Measured Validation of CGHV27200F The same break apart fixture mentioned earlier was used to perform load pull measurements on the CGHV27200F. Both the CGHV27100F and CGHV27200F are housed in the same package. Same metrics for validation were also used for this part. CGHV27200F Gain and PAE vs Output Power with Tuner Impedances set for best Output Power (V DD = 50 V, I DQ = 1 A, Pulse Width = 100 µs and Duty Cycle = 10%) Power Gain (db) Powe er Added Efficiency (%) Cree Model_Power Gain Load Pull Power Gain Cree Model PAE Load Pull PAE Output Power (dbm) Figure 7. Figure 7 displays the modeled and measured results of the CGHV27200F with optimized load and source pull for power and gain. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 6 APPNOTE-017 Rev. A

7 Modeled vs Measured Validation of CGHV27200F Continued Figure 8 displays the modeled and measured results of the CGHV27200F with optimized load and source pull for power. The model displays very accurate predictions. The next set of figures includes load pull contours on a Smith chart with modeled versus measured performance under various optimizations. Both Figures 9 and 10 are normalized to 5 ohms. The blue curves are measured and the red curves are modeled for both figures. utput Power (dbm), ded Efficiency (%) Saturated Ou Power Add CGHV27200F Output Power and PAE vs Frequency with Tuner Impedances set for best Output Power (V DD = 50 V, I DQ = 1 A, Pulse Width = 100 µs and Duty Cycle = 10%) Psat_Modeled Psat_Load Pull PAE Model PAE Load Pull Frequency (GHz) Figure 8. CGHV27200F Load Pull Contours for Output Power at GHz, Compared with Model-based Simulated Load Contours CGHV27200F Load Pull Contours for PAE at GHz, Compared with Model-based Simulated Load Contours Figure 9. Figure 10. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 7 APPNOTE-017 Rev. A

8 Modeled vs Measured Validation of CGHV27200F Continued CGHV27200F Modeled vs Measured Optimal Z SOURCE for Best Output Power CGHV27200F Modeled vs Measured Optimal Z LOAD for Best Output Power Z 0 =5 Z 0 = 10 Figure 11. Figure 12. Figures 11 and 12 are normalized to 10 ohms and 5 ohms respectively. The blue curves are measured and the red curves are modeled for both figures. Table 3 shows the results of the modeled versus measured performance of the CGHV27200F at P MAX. The difference between the predicted performance and the measured performance for saturated output power (P SAT ) is less than 0.8dB, Power Added Efficiency (PAE), is less than 1.4%, and gain is less than 0.7dB. Measured Load Pull Data Model Prediction Z SOURCE Z LOAD Best Power Z SOURCE Z LOAD Best Power Frequency (GHz) R (Ω) jx (Ω) R (Ω) jx (Ω) P SAT (dbm) PAE (%) G a i n (db) R (Ω) jx (Ω) R (Ω) jx (Ω) P SAT (dbm) PAE (%) G a i n (db) Table 3. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 8 APPNOTE-017 Rev. A

9 Modeled vs Measured Validation of CGHV27200F Continued Parameter Load Pull Measurement Model Based Simulations Peak Output Power 54.7 dbm / 295 W 54.8 dbm / 300 W Peak Efficiency 66 % 64 % Gain at 30 dbm P OUT 20.4 db 20.7 db Gain at P SAT 15.0 db 14.7 db Table 4. Table 4 lists a summary of the modeled versus the measured results for peak power and efficiency as well as linear and saturated gain. The conditions for Table 4 are pulsed at 100 micro seconds, 10% duty cycle, at GHz. Conclusions Cree s proprietary Large Signal Models were used in a harmonic balance simulator to compare measured and modeled data for both the 100 W and 200 W transistors. The performance of these devices was verified using an industry standard load pull system at optimal impedances over multiple frequencies. Also the power and efficiency contours around the optimal impedances matched those provided by the model. The large signal model represents accurately the performance of the devices and can be used to obtain the best performance of these devices while shortening the time to market with first pass design success. Copyright All rights reserved. Permission is given to reproduce this document provided the entire document (including this of Other trademarks, product and company names are the property of their respective owners and do not imply specific product and/or vendor 9 APPNOTE-017 Rev. A

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