EE251: Thursday October 25

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1 EE251: Thursday October 25 Review SysTick (if needed) General-Purpose Timers A Major Topic in ECE251 An entire section (11) of the TM4C Data Sheet Basis for Lab #8, starting week after next Homework #5 Due today 4 pm Do Lab #6 (A/D) this week. Lab #5 due this week Lab 7 (SysTick/Interrupts) is a one-week lab next week-pretty straightforward using supplied code. Lecture #20 1

2 Tutorial: Engineering Notation Big Idea: Express numbers as values between 1 and 999 with base 10 exponents that are multiples of 3 and using appropriate exponent labels 10-3 (milli or m) 10-6 (micro or µ) 10-9 (nano or n) (pico or p) 10 3 (kilo or K) 10 6 (mega or M) 10 9 (giga or G) (tera or T) Examples:.01 amps 10 milliamps or 10 ma 24*10 2 volts 2.4 kilovolts or 2.4 kv 0.8 MHz 800 KHz 4.5*10-5 seconds 45 microseconds or 45 µsec. $21,663,647,191 = terrabucks (current US National debt) A few exceptions common sense. When including other numbers similar in size, it is OK to have numbers smaller than 1 or larger than 1000 Current limit choices: 0.8 ma, 1.6 ma, 5 ma, 20 ma Frequencies tested: 150 MHz, 300 MHz, 500 MHz, 800 MHz, 1200 MHz In tables where putting units within the table entry itself is clumsy We will use engineering notation for the rest of ECE 251. Why? Good practice Aids in creating intuition about sizes of numbers. E.g. 2.5 *10 7 Hz is easier understood as 25 MHz Or 10-4 amp as 100 µa or even 0.1 ma You ll be expected to use these from now on in ECE251. Lecture #20 2

3 General-Purpose Timer Module (GPTM) Input Capture: Allows the characteristic of a digital input signal to be measured. For example, our processor can be programmed to measure parameters of an input pulse train, such as pulse length, frequency, period, and duty cycle Output: Allows generation of a digital output signal or signals to user specification, including individual pulses, pulse trains, and square waves Pulse Count: Counts Pulse edges over some time period You need to understand all the fundamental capabilities of GPTM, as described above Lecture #20 3

4 Fundamental Pulse Timing Concepts V DD 0 v. Rising Edge Pulse Length Trailing Edge Positive Assertion Pulse On-time Period Off time Frequency (Hz) = 1/Period (sec.) For positive assertion pulse train: Duty Cycle = On-time/Period * 100% Or, for negative assertion pulse train: Duty Cycle = Off-time/Period * 100% Lecture #20 4

5 GPTM Channels GPTM contains six complete, individual 16/32-bit dualfunction input-capture/output channels and six complete, individual 31/64-bit dual-function inputcapture/output channels Each of channels can be configured for either input capture or output operations The input-capture/output pins use various GPIO port pins, which must be configured (see table following) In addition to input-capture and output, GPTM contains an Edge Count capability We ll discuss each of these capabilities in turn. Lab #8 includes each of these capabilities. Lecture #20 5

6 Channels Individually Configurable Each of the Channels mentioned previously can be configured in any of the following modes: One shot: Channel Counter counts up (down) to (from) a specific value one time, giving a fixed time interval Periodic: Same as one shot, but counter counts these intervals repetitively Edge Time: Starts counting when timer is enabled and detects an edge on a pulse signal, saving the count value at that time Edge Count: Counts number of edges on pulse signal and saves that value PWM: Simple Pulse Width Modulation Mode, where counter is a 24 or 48 bit down-counter with a start value that defines the signal s period The following slides will show how these configurations are used for the various timing capabilities mentioned. Lecture #20 6

7 Block Diagram of Each Channel Lecture #20 7

8 Channel Inputs and Outputs Lecture #20 8

9 Timer Clocks within each Channel Lecture #20 9

10 Free Running Up/Down Timer Registers Lecture #20 10

11 Timer Functionality Note from previous Timer Channel Block Diagrams that there are 2 sets of all Timer hardware in each channel, called Timer A and Timer B, e.g. GPTMTAR and GPTMTBR are the names of the two timer registers. These can be used independently to double the number of effective channels, or their counter registers can be combined to create a 64-bit counter. In ECE251 we will use just the 32-bit counter version to make our task easier, but the full capability of the Timer Channel is explained in the TM4C Data Sheet, Section 11. Lecture #20 11

Channel Timer Clock Based on Bus Clock, with a programmable prescaling divider (GPTMTAPR) into a a free-running 16-bit up counter register, GPTMTAR.

12 Channel Timer Clock Based on Bus Clock, with a programmable prescaling divider (GPTMTAPR) into a a free-running 16-bit up counter register, GPTMTAR. The frequency of the channel clock is given by: The Prescaler is 8 bits, with a value between 0 and 255, so the channel clock frequency can be programmed between 16 Mhz and 62.5 KHz based on the application s need for resolution vs. total time of data collection. While many configurations of these counter register, prescaling divider, and counting up/down are possible, we will simplify the task by using the configuration described above. Lecture #20 12

13 Table of Some Prescaler Values GPTMTAR [7:0] PR[7:0] This table assumes Bus Clock is 16 MHz: Channel Ck Period Wraparound Time Prescale Factor nsec msec nsec msec nsec msec nsec msec nsec msec nsec msec nsec msec µsec sec 256 Lecture #20 13

14 Some Practice with Channel Timer Clock If the prescaler bits are 2_ , the prescaler divisor is 9+1=10, which means only one Channel Timer Clock pulse is provided to the free-running counter for every 10 Bus Clock pulses. For our system, the Channel Timer Clock frequency would then be 16 MHz/10 = and Timer register wraparound time (period) would be. What if f CL_BUS = 80 MHz and prescaler has value 127? f CL_CH = Timer Register Period = Other values or questions? Lecture #20 14

15 Measuring Signal Pulse Width Special hardware allows the GPTM to capture the free running counter value on the rising or falling edge of the signal under analysis. This signal is connected to a GPIO pin associated with the particular channel in use. See next slide. To measure a pulse width, a rising edge counter value is captured, followed by the following falling edge counter value. The pulse width is computed as: PW = (CNT FE CNT RE ) * Channel_Clock_Period For example if GPTM capture GPTMTAR=124 on a signal s rising edge and GPTMTAR=521 on it s next falling edge, and f CK_CH = 500 KHz, then PW = ( )*2 µsec = 794 µsec. Lecture #20 15

16 Measuring Signal Period To measure the period, a rising edge counter value is captured, followed by the following rising edge counter value. The period is computed as: Period = (CNT RE2 CNT RE1 ) * Clock_Period For example if GPTM capture GPTMTAR=124 on the same signal s rising edge and GPTMTAR=1268 on it s next rising edge, then Period = ( )*2 µsec = 2,288 µsec. = msec Duty_Cycle = (794 µsec / 2,288 µsec)*100% = 34.7% What if we made 3 measurements on a signal, using a 250 KHz Channel clock and found: CNT RE1 =45, CNT FE =95, and CNT RE2 =295. What are the period, frequency, pulse width, and duty cycle of this signal? Lecture #20 16

17 Channel Clock Frequency Choice RESOLUTION of measurements are no better than channel clock period: faster clocks better resolution Wraparound time of channel clock determines SLOWEST signal which can be measured or does it? Wraparound can trigger an interrupt. Could this be used? But, messing with interrupts is a bother and error prone Usually a reasonable tradeoff can be made between resolution and signal period by a good choice of prescaler value AND other choices are available to users of GPTM with more complex initialization routines (in ARM documentation but we won t cover them in class) 64-bit counter 8 bit prescaler values Up to 80 MHz Bus Clock With GPTM you can create measurements that have 12.5ns resolution on signals that have periods of! Lecture #20 17

18 Wraparound Computation and Engineering Unit Practice 12.5ns * 2 64 = 12.5 * 2 4 * 2 60 nsec = 12.5 * 16 * (1.024) 6 * * 10-9 sec = * 10 9 sec = G sec * 10 9 / 60 = 3.84 * 10 9 min = 3.84 G min 3.84 * 10 9 / 60 = * 10 6 hr = M hr * 10 6 /24 = * 10 6 days = M days * 10 6 / = * 10 3 years = 7.3 K years 7,307 years or over 7.3 millenia Lecture #20 18

19 Timer Use of GPIO Pins Lecture #20 19

20 Selecting a GPIO Pin for GPTM I/O Remember the GPIO Register AFSEL? It s Alternative Function Select and that s what we use here It s active bits are 7:0. If a bit is clear, the associated pin is used as a GPIO and is controlled by the GPIO registers. If a bit is set, it configures the corresponding GPIO pin to be controlled by an associated peripheral. Several possible peripheral functions are multiplexed on each GPIO. See some of these alternate functions on the next slide. Choosing from the multiple options (up to 15) is done using the GPIO Port Control Register (GPIOPCTL). This register has eight 4-bit fields, each of which contains the alternate function for its associated pin: For details search for AFSEL and GPIOCTL in TM4C Data Sheet Lecture #20 20

21 Some GPIO Pins & Their Alternate Use Lecture #20 21

22 Key Registers associated with GPTM First, several GPIO Registers are needed to associate GPIO Pins with GPTM signals (input and output): GPIO DIR, DEN, GPTM is a Register Hog: too many to describe completely here, but more are documented in Lab #8 and all are well documented in the TM4C Data Sheet. Here are some key ones: GPTM Configuration Register (TIMERn_CFG or GPTMCFG) Disables/enables each channel separately Prescaling divider (TIMERn_TAPR or GPTMAPR) Divides Bus Clock frequency; described earlier Counter register (TIMERn_TAR or GPTMTAR) Register containing current clock count; described earlier GPT Run Mode Clock Gating Control (SYSCTL_RCGCTIMER) Used for powering up each channel separately GPTM Control Register (TIMERn_CTL or GPTMCTL) Disables/enables each channel separately Lecture #20 22

23 More Key GPTM Registers GPTM Timer A Mode Register (TIMER0_TAMR or GPTMTAMR) Determines whether channel has a one shot counter (doesn t repeat, a periodic counter, or is used to capture signal edges GPTM Interval Load Register (TIMER0_TAILR or GPTMTAILR) Contains 16-bit value that counter will count up to or down from, usually but not necessarily 0xFFFF GPTM Timer A Match Register (TIMER0_TAMATCHR or GPTMTAMATCHR) Used for Matching Counter with a fixed value in creating signals Several Interrupt Registers, to be discussed later Don t fret, Don t panic! We ll discuss the key registers you need to use and will have example code showing how to set up programs to do key GPTM tasks. Lecture #20 23

24 About the Names of GPTM Registers The Assembly files we use from TI, including a complete set of I/O register names in one useful file, starts with the characters TIMERn_ where n is the timer channel number, e.g. TIMER0_CTL These names are used in our lab example code and in many online TI and University of Texas files The file of register names, tm4c123gh6pm.s, is online Our TM4C Data Sheet Bible starts the names with the characters GPTM, e.g. GPTMCTL. We will use the Assembly file name, but keep these equivalences in mind as you read through the data sheet. Lecture #20 24

25 Names of Some GPTM Registers Taken from TI s file tm4c123gh6pm.s ;********************************************************** ; ; Timer registers (TIMER0) ; ;********************************************************** TIMER0_CFG_R EQU 0x TIMER0_TAMR_R EQU 0x TIMER0_TBMR_R EQU 0x TIMER0_CTL_R EQU 0x C TIMER0_SYNC_R EQU 0x TIMER0_IMR_R EQU 0x TIMER0_RIS_R EQU 0x C TIMER0_MIS_R EQU 0x TIMER0_ICR_R EQU 0x TIMER0_TAILR_R EQU 0x TIMER0_TBILR_R EQU 0x C TIMER0_TAMATCHR_R EQU 0x TIMER0_TBMATCHR_R EQU 0x ;********************************************************** TIMER0_TAPR_R EQU 0x TIMER0_TBPR_R EQU 0x C TIMER0_TAPMR_R EQU 0x TIMER0_TBPMR_R EQU 0x TIMER0_TAR_R EQU 0x TIMER0_TBR_R EQU 0x C TIMER0_TAV_R EQU 0x TIMER0_TBV_R EQU 0x TIMER0_RTCPD_R EQU 0x TIMER0_TAPS_R EQU 0x C TIMER0_TBPS_R EQU 0x TIMER0_TAPV_R EQU 0x TIMER0_TBPV_R EQU 0x TIMER0_PP_R EQU 0x40030FC0 Lecture #20 25

26 Using Timer System to Measure Pulse Signals To measure a pulse signal, we need an input timer pin and we need to choose one of the Timer Channels available to us. Let s choose Timer Channel 0, Module A. We already know this uses Port B, pin 6 for its input signal. The GPTM mode used for this measurement is the Edge Time mode, in which the channel clock is free running (we will choose down-counting) and a snapshot is taken of it s value when the desired edge of the input signal is sensed. We will also choose the 16-bit timer mode for simplicity. The following slide shows which registers and bits we must set. Lecture #20 26

27 Using Timer System to Measure Pulse Signals In the CFG register, set value to 0x4 for 16-bit mode In the MR register, set the TACMR bit for edge time mode, set TAMR bits to 0x3 for capture, and TACDIR to 0 to count down. In the CTL register, we set TAEVENT bits to 0x3 to capture both rising and falling edges for this example. In a lab project, you would choose the appropriate edge for collecting the next measurement. First a rising edge and then a falling edge to capture a pulse width Two sequential edges of same shape to capture a period Rising, then falling, then rising edge to capture pulse width and period Details of all this in next lecture Lecture #20 27

28 Summary Introduction to TIMER Module for capabilities such as Input Capture, Output, and Pulse Count GPTM Channels and their specific capabilities Setting and using the Channel Timer Clock, including prescaling Next Lecture Specific of signal measurement, including channels, initialization of Timer Module, and capture algorithm Creating Pulse Trains using TIMER Module As time allows: Using TIMER Module for counting pulses Lecture #20 28

ECE251: Tuesday October 3 0

ECE251: Tuesday October 3 0 Timer Module Continued Review Pulse Input Characterization Output Pulses Pulse Count Capture Homework #6 due Thursday Lab 7 (Maskable Interrupts/ SysTick Timer) this week. Significant