CHAPTER 4: 555 TIMER. Dr. Wan Mahani Hafizah binti Wan Mahmud

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1 CHAPTE 4: 555 TIME Dr. Wan Mahani Hafizah binti Wan Mahmud

2 555 TIME Introduction Pin configuration Basic architecture and operation Astable Operation Monostable Operation Timer in Triggering Circuits

3 555 Timer Introduction Timer is a highly stable & inexpensive device for generating accurate time delay or oscillation It can provide time delays ranging from microseconds to hours It can be used with power supply voltage ranging from +3V to +8V It can source or sink up to 00mA It is compatible with both TTL & CMOS logic circuits It has very high temperature stability & it is designed to operate in the temperature range -55 to +5 C

4 555 Timer : Application The 555 integrated circuit has been around for more than two decades, but continues to be popular in electronic design It is a versatile device that can perform as a timer, time-delay circuit, oscillator, voltage-controlled oscillator, and many other functions Applications examples: Waveform generators Burglar Alarms Measurement, Process & Control Circuits Missing pulse detectors Traffic light control Automatic Battery chargers Logic probes DC to DC Converters 4

5 555 Timer - IC Configuration First introduced in 97 by Signetics Corporation and it was called The IC Time Machine. Designed and invented by Hans. Camenzind. Comes in packages, either the round metal-can called the T package and the more familiar 8-pin DIP V package. There is also 4 pins version. Has eight connections (called pins) to its plastic case, arranged as four on one side and four on the other, as shown in the following pin-out. 5 Fig. 4.

6 The 555 Timer A Black Box! Eight connections called pins Little white dot and dimple denote pin

7 555 Timer : Pin Functions PIN : Ground - usually connected to ground. The voltage should be the most negative of any voltage appearing at the other pins. PIN : Trigger - level-sensitive point to /3 V CC. When the voltage at this pin is brought below /3 V CC the flip-flop is set causing pin 3 to produce a high state. Allowable applied voltage is between V CC (pin 8) and ground (pin ). PIN 3 : Output level here is normally low and goes high during the timing interval. Since the output stage is active in both directions, it can source or sink up 00 ma. 7

8 555 Timer : Pin Functions (cont.) PIN 4 : eset - when voltage at this pin is less than 0.4 V, the timing cycle is interrupted returning the timer to its non-triggered state. This is an overriding function so that the timer cannot be triggered unless reset is released (pin 4 >.0 V). When not used, connect to V CC. PIN 5 : Control Voltage - internally derived /3 V CC point. A resistor-to-ground or an external voltage may be connected to pin 5 to change the comparator reference points. When not used for this purpose, a capacitor-toground greater than or equal to 0.0 mf is recommended for all applications. PIN 6 : Threshold level sensitive point to /3 V CC. When the voltage at this pin is brought greater than /3 V CC, the flip-flop is reset causing pin 3 to produce a low state. 8

9 555 Timer : Pin Functions (cont.) PIN 7 : Discharge - collector of a transistor switch to ground (pin ). It is normally used to discharge the timing capacitor. PIN 8 : Power Supply - the power-supply voltage (V CC ) connected here can range from 4.5 to 8 V with respect to ground (pin ). This depends on the manufacturer specification. The common value is 5V DC when working with digital ICs. The supply current between 3 to 6mA and a ise/fall time of 00ns. 9

10 Internal Circuitry - Example 0 Manufacturer : Philips Semiconductors

11 Timer Architecture : Block Diagram Fig. 4.: Timer architecture

12 Different Internal Block Diagram Different manufacturer will have different architecture (internal structure, circuitry and block diagram)

13 555 Timer Mode of Operation The 555 timer has essentially two modes of operation: Astable multivibrator (free running) no stable state (never stable) : generating continuous train of pulses and Monostable multivibrator (one shot) one stable state Gnd 8 +Vcc Trigger Output Timer 7 6 Discharge Threshold 3 eset 4 5 Control voltage

14 Astable Multivibrator The frequency of output is determined by the external components,, and C The output at pin 3 is a square-wave The frequency of output or called frequency of oscillation is given by this equation: C f =.44 ( + ) C C 4

15 Astable Circuit Operation +V CC 8 4 C initially uncharged (V C = 0) C 7 Pin 6 0V 6 5 C V CC /3 V CC /3 off V - > V + C A C B = 0 S= Pin 0V V + > V - S Q Q Q= 0 Q= V ref 3 V V CC O 0 5

16 Astable Circuit Operation (cont.) +V CC on V + > V - V CC /3 V CC C 6 5 V CC /3 V CC /3 C A C B = S= 0 V - > V + S Q Q Q= V ref Q= 0 3 V O V CC C

17 Astable Circuit Operation (cont.) +V CC V CC /3 C 6 5 V CC /3 V CC /3 off V - > V + C A C B = 0 S= V + > V - S Q Q Q= 0 Q= V ref 3 V CC V O 0 0 V CC /3 C 7

18 Astable Circuit Operation (cont.) When power is first applied to the circuit, the capacitor will be uncharged therefore, both the trigger (Pin ) and threshold (Pin 6) inputs will be near zero volts. The lower comparator (C B ) sets the control flip-flop causing the output (Pin 3) to switch HIGH. That also turns off internal transistor Q. That allows the capacitor to begin charging through and towards the supply voltage (V CC ). As soon as the charge on the capacitor reaches /3 of the supply voltage, the upper comparator (C A ) will trigger causing the flip-flop to reset. That causes the output to switch LOW. Internal transistor Q also conducts (ON). The effect of Q conducting causes capacitor C to be connected to ground through resistor, and Q. The result of that is that the capacitor now begins to discharge with current flowing through into the discharge pin (Pin 7). As soon as the voltage across the capacitor reaches /3 of the supply voltage, the lower comparator is triggered. That again causes the control flip-flop to set and the output to go HIGH. Transistor Q cuts off and the discharge pin is disconnected, allowing the capacitor to charge again. That cycle continues to repeat with the capacitor alternately charging and discharging, as the comparators cause the flip-flop to be repeatedly set and reset. The resulting output is a continuous stream of rectangular pulses unless the eset input connected to 0V which causes the output LOW while eset is 0V. 8

19 Astable : Output waveform t high = t H = t mark = t m t low = t L = t space = t S V CC V o 0 V V CC /3 V c V CC /3 t 0 t 9

20 Finding Time and Frequency of Oscillation The principle used : the timing of capacitor being charged and discharged (remember relaxation oscillator) The basic equation used: v c ( t) = = v v c c (0) + ( ) + ( v ( ) v (0)) e t τ ( v (0) v ( ) ) e where v c (0) : the initial value of capacitor voltage v c ( ) : the steady state value of the capacitor voltage c c c c t τ 0

21 Time High Capacitor V C (t ) = V CC /3 V C (0) = V CC /3 charging ( v (0) v ( ) ) e τ Use: vc( t ) = vc( ) + c c From graph: t v C V CC V C ( ) = V CC V + 3 e t VCC CC τ 3 V 3 e t CC τ = V CC = t V 3 e V t CC t τ τ = e e CC = t τ = = τ ln V CC /3 V CC /3 0 τ =( + )C t ( ) t = C t

22 Time Low Capacitor discharging Use: v From graph: c t ( v (0) v ( ) ) e τ ( t ) = v ( ) + c c c v C V C (t ) = V CC /3 V C (0) = V CC /3 V CC V C ( ) = 0 VCC 3 V 3 CC V CC = e 3 t V CC τ = e 3 = e t τ t τ V CC /3 V CC /3 0 τ = C t t = ln t τ t = C

23 Time and Frequency of Oscillation Time: T = = t + t ( + ) C C Frequency: ( ) T = C f = T = ( + ) C 3 f =.44 ( + ) C

24 Astable : Duty Cycle The formula: t D = thigh + t = D = low t t + t t T high = = + + ( + ) C ( + ) C Usually it is expressed in %: D = t t high high + t low thigh 00 % = T 00% 4 t = t high = t mark t = t low = t space

25 Duty Cycle - Example 5 Fig. 4.6

26 Exercise: Determine f o and duty cycle Frequency of oscillation: f.44 = ( + ) C.44 = = 5.64 khz ext (. k k )( 0.0 µ ) Duty Cycle: D = = ( + ) +.k (.k + (4.7k) ) = 59.5% + 4.7k x 00% 6

27 Astable - Exercise C C +V CC V 0 Compute and to generate a pulse of 0 beats/minute Given C = 47µF T ON = 60% T T = T ON + T OFF T ON =.693( ) C 0 + T OFF = 0.693( ) C 7

28 Astable Exercise : Solution Time period of one beat, T = = = Number of beats per minute T ON 60 = 60 % T = 0.5 = 0.3sec 00 T OFF 40 = 40 % T = 0.5 = 00 0.sec T OFF = = C 0. = = Ω T ON = ( 0.3 = ( = = 3070.Ω ) C )

29 Monostable Multivibrator +V CC Trigger Input C V o C The monostable circuit generates a single pulse of fixed time duration each time it receives an input trigger pulse, thus it is named one-shot Fig

30 Monostable Multivibrator (cont.) 30 Monostable multivibrator is used to turn circuit or external component ON or OFF for a specific length of time. It is also used to generate delays. When multiple one-shots are cascaded, a variety of sequential timing pulses can be generated. Those pulses will allow to time and sequence a number of related operations. It is called a monostable because it is stable in just one state: 'output low'. The 'output high' state is temporary or unstable. If there is no triggering input, the circuit stays in its stable condition which is the OFF-state. The output stays at zero. Whenever it is triggered by an input pulse, the monostable switches to its temporary state. It remains in that state for a period of time determined by an and C network. It then returns to its stable state.

31 Monostable Circuit Operation +V CC C initially on uncharged C Pin 6 V - > V + (V C = 0) 0V C remain uncharged And no trigger voltage is applied V T C >V CC /3 Note: V T must < V CC /3 to trigger comparator C B output to high V CC /3 V CC /3 C A C B = 0 S= 0 V - > V + S Q Q V ref Q= Q= 0 3 V O 0 Stable state

32 Monostable Circuit Operation +V CC 8 4 V T C initially off now on uncharged is being C Pin 6 V - > V + (V C = 0) 0V charged 6 Now trigger voltage is applied V T C <V CC /3 7 5 V CC /3 V CC /3 C A C B = 0 S= V + > V - S Q Q Q= Q= 0 Q= 0 Q= V ref 3 V O 0 V CC Stable state V CC 3 /3 0

33 v C Monostable Circuit Operation V CC +V CC V CC /3 8 4 τ = C 0 V T T t C V T high C V CC /3 V CC /3 on off V + > V - C A C B = S= 0 V - > V + S Q Q Q= Q= 0 Q= 0 Q= V ref 3 V O 0 T unstable state V CC 33 /3 0

34 Operation Concept The timing period is triggered (started) when the Trigger input (pin ) is less than /3 V CC, this makes the Output HIGH (V CC ) and the capacitor C starts to charge through resistor. Once the time period has started further trigger pulses are ignored. The Threshold input (pin 6) monitors the voltage across C and when this reaches /3 V CC, the time period is over and the Output becomes LOW. At the same time the Discharge (pin 7) is connected to 0V, discharging the capacitor and ready for the next trigger. The eset input (pin 4) will overrides all other inputs and the timing may be cancelled at any time by connecting eset pin to 0V, this instantly makes the output low and discharges the capacitor. Therefore, if the eset function is not required then the reset pin should be connected to +V CC. If the trigger input is still less than /3 Vs at the end of the time period the output will remain high until the trigger is greater than /3 V CC. This situation can occur if the input signal is from an on-off switch or sensor. 34

35 35 Waveforms elationship

36 Output Waveform 36 Fig. 4.

37 Time Period The time at the unstable state is the time period or time at High state : T =. C where: T = time period in seconds (s) = resistance in ohms (Ω) C = capacitance in farads (F) This equation arises from the time it takes the exponential C transient to reach the resetting voltage of /3 of the supply 37

38 Use: v From graph: Time High Capacitor charging c ( T ) V C (T) = V CC /3 V C (0) = 0 c T τ ( v (0) v ( ) e = v ( ) + ) c c v C V CC V C ( ) = V CC V 3 CC VCC 3 3 = V = CC = e T τ + ( 0 V ) e T τ CC ( V ) e T τ CC V CC /3 0 τ = C T t 38 e T τ = = 3 T τ ln 3 T =. C

39 Edge-Triggering The monostable can be made edge triggered, responding only to changes of an input signal, by connecting the trigger signal through a capacitor to the trigger input The capacitor passes sudden changes (AC) but blocks a constant (DC) signal. The circuit is 'negative edge triggered' because it responds to a sudden fall in the input signal The resistor between the trigger (pin ) and Vs ensures that the trigger is normally high (Vs) 39 Fig. 4.

40 555 timer : Pulse-width modulation (PWM) When the 555 timer is connected in the monostable mode, an external signal applied to the control voltage terminal will change the charging time of the timing capacitor and the pulse width If the one-shot is triggered with a continuous pulse train, the output pulse width will be modulated by the external signal. This circuit is known as a pulse width modulator (PWM) In PWM, a low-frequency signal called a modulating signal is capacitively coupled into pin 5. This signal could be a voice or computer data Since pin 5 controls the value of UTP, V mod is being added to the quiescent UTP. This means that the instantaneous UTP varies sinusoidally between ±V mod 40 V = + Vmod 3 CC Where: V UTP mod is the peak value of the modulating signal

41 555 timer : Pulse-width modulation (PWM) (cont.) 4 C +V CC Clock in T PWM out The output frequency is established by the input clock T A W B V CC UTP = + Vmod 3 UTP W = C ln VCC f=/t Modulating signal in

42 555 timer : Pulse-width modulation (PWM) (cont.) A train of triggers called the clock is the input to pin. Each trigger produces an output pulse Since the period of the triggers is T, the output will be a series of rectangular pulse with a period of T The modulating signal has no effect on the period T, but it does change the width of each output pulse PWM out A Modulating signal W T B 4 UTP W = C ln VCC At point A, the positive peak of the modulating signal, the output pulse is wide. At point B, the negative peak of the modulating signal, the output pulse is narrow

43 555 timer : Pulse-width modulation (PWM) (cont.) With PWM the pulse width changes, but the period is constant because it is determined by the frequency of the input triggers Because the period is fixed, the position of each pulse is the same, which means that the leading edge of the pulse always occurs after a fixed interval of time PWM is widely used in communication. It allows a lowfrequency modulating signal (voice or data) to change the pulse width of a high-frequency signal called the carrier. The modulated carrier then can be transmitted 43

44 PWM Application : Speed Controller V Vs LM555CM Timer GND DIS 7 OUT 3 ST 4 VCC 8 TH 6 CON 5 TI 3 kω 4.kΩ 5 33kΩ Q N3906 amp V Vs 44 00nF C 00nF Cf amp 00nF C 00nF Cf V Vs LM555CM Timer GND DIS 7 OUT 3 ST 4 VCC 8 TH 6 CON 5 TI 3 kω 4.kΩ 5 33kΩ Q N3906 amp UB TLC393MJG kΩ Key=A 0% 7 kω PWMout V Vs 0kΩ 0kΩ

45 555 timer : Pulse-position modulation (PPM) For PPM, the 555 timer is in astable mode. The PPM circuit configuration is quite similar to VCO Just like PWM, the modulating signal is coupled into pin 5 (the control voltage terminal) The modulating signal will vary the instantaneous UTP: UTP V CC = + Vmod 3 where: V mod is the peak value of the modulating signal When the modulating signal increases, UTP increases and the pulse width increases too. But when the modulating signal decreases, UTP decreases and the pulse width decreases. The result is the pulse width (time high) will be varied 45

46 555 timer : Pulse-position modulation (PPM) (cont.) +V CC The leading edge of each pulse is a function of the modulation Pulse width is variable PPM output 555 Space is constant C 6 5 A B Modulating signal in 46

47 555 timer : Pulse-position modulation (PPM) (cont.) The output period: T = W C The pulse width (W = t H ): W = V UTP CC ( ) + C ln VCC 0. 5UTP The space width (S = t L ): S = 0.693C The space is the time between the trailing edge of one pulse and the leading edge of the next pulse The space between pulses is constant 47

48 555 timer : Pulse-position modulation (PPM) (cont.) Since the space is constant, the position of the leading edge of any pulse depends on how wide the preceding pulse is W Pulse width is variable Space is constant PPM output T Both the width (W) and the period (T) of pulses vary with modulating signal Like PWM, PPM is used in communication systems to transfer voice or data 48

49 555 timer : amp Generator A linear ramp generator can be constructed using 555 timer in monostable mode The normal charging, pattern of the timing capacitor is exponential because of the C circuit If resistor is replaced by a constant current source, a linear ramp will be generated The resistor in monostable configuration is replaced with a pnp current source that produces a constant charging current: VCC VE IC = E When a trigger pulse (V T ) is applied at pin, the pnp current source forces a constant charging current into the capacitor. Therefore the voltage across the capacitor is a ramp 49

50 555 timer : amp Generator (cont.) E +V CC V B = V CC + 4 V B V T V E I C V = V + V I E C = V B CC E BE V E 0.0µF 5 6 C V o 0V S V 50 T

51 555 timer : amp Generator (cont.) Trigger Voltage: V T 0V Output Voltage: 0V S T V : Peak value of the ramp V = V 3 CC T : Duration of the ramp T = V 3S CC S : Slope of the ramp IC S = C 5

52 Q & A 5

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